1*7345574dSahoka /* $NetBSD: nand_micron.c,v 1.8 2012/11/03 12:12:48 ahoka Exp $ */
275875a52Srmind
37550675bSahoka /*-
47550675bSahoka * Copyright (c) 2011 Department of Software Engineering,
57550675bSahoka * University of Szeged, Hungary
67550675bSahoka * Copyright (c) 2011 Adam Hoka <ahoka@NetBSD.org>
77550675bSahoka * All rights reserved.
87550675bSahoka *
97550675bSahoka * This code is derived from software contributed to The NetBSD Foundation
107550675bSahoka * by the Department of Software Engineering, University of Szeged, Hungary
117550675bSahoka *
127550675bSahoka * Redistribution and use in source and binary forms, with or without
137550675bSahoka * modification, are permitted provided that the following conditions
147550675bSahoka * are met:
157550675bSahoka * 1. Redistributions of source code must retain the above copyright
167550675bSahoka * notice, this list of conditions and the following disclaimer.
177550675bSahoka * 2. Redistributions in binary form must reproduce the above copyright
187550675bSahoka * notice, this list of conditions and the following disclaimer in the
197550675bSahoka * documentation and/or other materials provided with the distribution.
207550675bSahoka *
217550675bSahoka * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
227550675bSahoka * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
237550675bSahoka * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
247550675bSahoka * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
257550675bSahoka * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
267550675bSahoka * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
277550675bSahoka * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
287550675bSahoka * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
297550675bSahoka * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
307550675bSahoka * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
317550675bSahoka * SUCH DAMAGE.
327550675bSahoka */
337550675bSahoka
347550675bSahoka /*
357550675bSahoka * Device specific functions for legacy Micron NAND chips
367550675bSahoka *
377550675bSahoka * Currently supported:
387550675bSahoka * MT29F2G08AACWP, MT29F4G08BACWP, MT29F8G08FACWP
397550675bSahoka */
407550675bSahoka
4175875a52Srmind #include <sys/cdefs.h>
42*7345574dSahoka __KERNEL_RCSID(0, "$NetBSD: nand_micron.c,v 1.8 2012/11/03 12:12:48 ahoka Exp $");
4375875a52Srmind
447550675bSahoka #include "nand.h"
457550675bSahoka #include "onfi.h"
467550675bSahoka
47c67c74e3Scliff #define MT29F2G08AAC 0xda
48c67c74e3Scliff #define MT29F2G08ABC 0xaa
49c67c74e3Scliff #define MT29F2G16AAC 0xca
50c67c74e3Scliff #define MT29F2G16ABC 0xba
51c67c74e3Scliff #define MT29F4G08BAC 0xdc
52c67c74e3Scliff #define MT29F8G08FAC 0xdc /* each 4GB section */
53c67c74e3Scliff
54c67c74e3Scliff #define MT29FxG_PARAM_WIDTH(p) (((p) >> 1) & __BIT(0))
55c67c74e3Scliff #define MT29FxG_PAGESIZE (2 * 1024)
56c67c74e3Scliff #define MT29FxG_BLOCK_PAGES 64 /* pages per block */
57c67c74e3Scliff #define MT29FxG_BLOCKSIZE (128 * 1024) /* not including spares */
58c67c74e3Scliff #define MT29FxG_SPARESIZE 64
59c67c74e3Scliff
60c67c74e3Scliff struct nand_micron_devices {
61c67c74e3Scliff const char *name;
62c67c74e3Scliff uint8_t id;
63c67c74e3Scliff uint8_t width; /* bus width */
64c67c74e3Scliff u_int lun_blocks; /* number of blocks per LUN */
65c67c74e3Scliff u_int num_luns; /* number LUNs */
66c67c74e3Scliff };
67c67c74e3Scliff
68c67c74e3Scliff static const struct nand_micron_devices nand_micron_devices[] = {
69c67c74e3Scliff { "MT29F2G08AAC", MT29F2G08AAC, 8, 2048, 1 },
70c67c74e3Scliff { "MT29F2G08ABC", MT29F2G08ABC, 8, 2048, 1 },
71c67c74e3Scliff { "MT29F2G16AAC", MT29F2G16AAC, 16, 2048, 1 },
72c67c74e3Scliff { "MT29F2G16ABC", MT29F2G16ABC, 16, 2048, 1 },
73c67c74e3Scliff { "MT29F4G08BAC", MT29F4G08BAC, 8, 4096, 1 },
74c67c74e3Scliff #ifdef NOTYET
75c67c74e3Scliff /* how do we recognize/match this? */
76c67c74e3Scliff { "MT29F8G08FAC", MT29F8G08FAC, 8, 4096, 2 },
77c67c74e3Scliff #endif
78c67c74e3Scliff };
79c67c74e3Scliff
80c67c74e3Scliff static int mt29fxgx_parameters(device_t, struct nand_chip *, u_int8_t, uint8_t);
81c67c74e3Scliff
82c67c74e3Scliff static const struct nand_micron_devices *
nand_micron_device_lookup(u_int8_t id)83c67c74e3Scliff nand_micron_device_lookup(u_int8_t id)
84c67c74e3Scliff {
85c67c74e3Scliff for (int i=0; i < __arraycount(nand_micron_devices); i++)
86c67c74e3Scliff if (nand_micron_devices[i].id == id)
87c67c74e3Scliff return &nand_micron_devices[i];
88c67c74e3Scliff return NULL;
89c67c74e3Scliff }
90c67c74e3Scliff
917550675bSahoka int
nand_read_parameters_micron(device_t self,struct nand_chip * const chip)9248b433b6Scliff nand_read_parameters_micron(device_t self, struct nand_chip * const chip)
937550675bSahoka {
94c67c74e3Scliff uint8_t mfgrid;
95c67c74e3Scliff uint8_t devid;
96c67c74e3Scliff uint8_t dontcare;
97c67c74e3Scliff uint8_t params;
987550675bSahoka
997550675bSahoka KASSERT(chip->nc_manf_id == NAND_MFR_MICRON);
100c67c74e3Scliff switch (chip->nc_manf_id) {
101c67c74e3Scliff case NAND_MFR_MICRON:
102c67c74e3Scliff break;
103c67c74e3Scliff default:
104c67c74e3Scliff return 1;
105c67c74e3Scliff }
1067550675bSahoka
1077550675bSahoka nand_select(self, true);
1087550675bSahoka nand_command(self, ONFI_READ_ID);
1097550675bSahoka nand_address(self, 0x00);
11088d35f1eSahoka nand_read_1(self, &mfgrid);
11188d35f1eSahoka nand_read_1(self, &devid);
11288d35f1eSahoka nand_read_1(self, &dontcare);
11388d35f1eSahoka nand_read_1(self, ¶ms);
1147550675bSahoka nand_select(self, false);
1157550675bSahoka
116c67c74e3Scliff KASSERT(chip->nc_manf_id == mfgrid);
117c67c74e3Scliff
118c67c74e3Scliff switch(devid) {
119c67c74e3Scliff case MT29F2G08AAC:
120c67c74e3Scliff case MT29F2G08ABC:
121c67c74e3Scliff case MT29F2G16AAC:
122c67c74e3Scliff case MT29F2G16ABC:
123c67c74e3Scliff case MT29F4G08BAC:
124c67c74e3Scliff return mt29fxgx_parameters(self, chip, devid, params);
1257550675bSahoka default:
126c67c74e3Scliff aprint_error_dev(self, "unsupported device id %#x\n", devid);
127c67c74e3Scliff return 1;
128c67c74e3Scliff }
129c67c74e3Scliff }
130c67c74e3Scliff
131c67c74e3Scliff static int
mt29fxgx_parameters(device_t self,struct nand_chip * const chip,u_int8_t devid,uint8_t params)13248b433b6Scliff mt29fxgx_parameters(device_t self, struct nand_chip * const chip,
133c67c74e3Scliff u_int8_t devid, uint8_t params)
134c67c74e3Scliff {
135c67c74e3Scliff const struct nand_micron_devices *dp;
136c67c74e3Scliff const char *vendor = "Micron";
137c67c74e3Scliff
138c67c74e3Scliff dp = nand_micron_device_lookup(devid);
139c67c74e3Scliff if (dp == NULL) {
140c67c74e3Scliff aprint_error_dev(self, "unknown device id %#x\n", devid);
1417550675bSahoka return 1;
1427550675bSahoka }
1437550675bSahoka
144c67c74e3Scliff /*
145c67c74e3Scliff * MT29FxGx params across models are the same
146c67c74e3Scliff * except for luns, blocks per lun, and bus width
147c67c74e3Scliff * (and voltage)
148c67c74e3Scliff */
149c67c74e3Scliff chip->nc_addr_cycles_column = 2; /* XXX */
150c67c74e3Scliff chip->nc_addr_cycles_row = 3; /* XXX */
151c67c74e3Scliff if (dp->width == 16)
152c67c74e3Scliff chip->nc_flags |= NC_BUSWIDTH_16;
153c67c74e3Scliff chip->nc_page_size = MT29FxG_PAGESIZE;
154c67c74e3Scliff chip->nc_block_size = MT29FxG_BLOCK_PAGES * MT29FxG_PAGESIZE;
155c67c74e3Scliff chip->nc_spare_size = MT29FxG_SPARESIZE;
156c67c74e3Scliff chip->nc_lun_blocks = dp->lun_blocks;
157c67c74e3Scliff chip->nc_num_luns = dp->num_luns;
158c67c74e3Scliff chip->nc_size = MT29FxG_PAGESIZE * MT29FxG_BLOCK_PAGES *
159c67c74e3Scliff dp->lun_blocks * dp->num_luns;
1607550675bSahoka
161a686d9aaSahoka aprint_normal_dev(self, "%s %s, size %" PRIu64 "MB\n",
162c67c74e3Scliff vendor, dp->name, chip->nc_size >> 20);
1637550675bSahoka
1647550675bSahoka return 0;
1657550675bSahoka }
166