xref: /netbsd/sys/dev/pci/auixp.c (revision db751219)
1 /* $NetBSD: auixp.c,v 1.48 2019/10/16 21:52:22 maya Exp $ */
2 
3 /*
4  * Copyright (c) 2004, 2005 Reinoud Zandijk <reinoud@netbsd.org>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. The name of the author may not be used to endorse or promote products
13  *    derived from this software without specific prior written permission.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
20  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
22  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 
29 /*
30  * NetBSD audio driver for ATI IXP-{150,200,...} audio driver hardware.
31  *
32  * Recording and playback has been tested OK on various sample rates and
33  * encodings.
34  *
35  * Known problems and issues :
36  * - SPDIF is untested and needs some work still (LED stays off)
37  * - 32 bit audio playback failed last time i tried but that might an AC'97
38  *   codec support problem.
39  * - 32 bit recording works but can't try out playing: see above.
40  * - no suspend/resume support yet.
41  * - multiple codecs are `supported' but not tested; the implemetation needs
42  *   some cleaning up.
43  */
44 
45 #include <sys/cdefs.h>
46 __KERNEL_RCSID(0, "$NetBSD: auixp.c,v 1.48 2019/10/16 21:52:22 maya Exp $");
47 
48 #include <sys/types.h>
49 #include <sys/errno.h>
50 #include <sys/null.h>
51 #include <sys/param.h>
52 #include <sys/systm.h>
53 #include <sys/kmem.h>
54 #include <sys/device.h>
55 #include <sys/conf.h>
56 #include <sys/exec.h>
57 #include <sys/select.h>
58 #include <sys/audioio.h>
59 #include <sys/queue.h>
60 #include <sys/bus.h>
61 #include <sys/intr.h>
62 
63 #include <dev/audio/audio_if.h>
64 
65 #include <dev/ic/ac97var.h>
66 #include <dev/ic/ac97reg.h>
67 
68 #include <dev/pci/pcidevs.h>
69 #include <dev/pci/pcivar.h>
70 #include <dev/pci/auixpreg.h>
71 #include <dev/pci/auixpvar.h>
72 
73 
74 /* #define DEBUG_AUIXP */
75 
76 
77 /* why isn't this base address register not in the headerfile? */
78 #define PCI_CBIO 0x10
79 
80 
81 /* macro's used */
82 #define KERNADDR(p)	((void *)((p)->addr))
83 #define	DMAADDR(p)	((p)->map->dm_segs[0].ds_addr)
84 
85 
86 /* the differences might be irrelevant */
87 enum {
88 	IXP_200,
89 	IXP_300,
90 	IXP_400
91 };
92 
93 
94 /* our `cards' */
95 static const struct auixp_card_type {
96 	uint16_t pci_vendor_id;
97 	uint16_t pci_product_id;
98 	int type;
99 } auixp_card_types[] = {
100 	{ PCI_VENDOR_ATI, PCI_PRODUCT_ATI_IXP_AUDIO_200, IXP_200 },
101 	{ PCI_VENDOR_ATI, PCI_PRODUCT_ATI_IXP_AUDIO_300, IXP_300 },
102 	{ PCI_VENDOR_ATI, PCI_PRODUCT_ATI_IXP_AUDIO_400, IXP_400 },
103 	{ 0, 0, 0 }
104 };
105 
106 
107 struct audio_device auixp_device = {
108 	"ATI IXP audio",
109 	"",
110 	"auixp"
111 };
112 
113 /*
114  * current AC'97 driver only supports SPDIF outputting channel 3&4 i.e. STEREO
115  */
116 #define AUIXP_FORMAT(aumode, ch, chmask) \
117 	{ \
118 		.mode		= (aumode), \
119 		.encoding	= AUDIO_ENCODING_SLINEAR_LE, \
120 		.validbits	= 16, \
121 		.precision	= 16, \
122 		.channels	= (ch), \
123 		.channel_mask	= (chmask), \
124 		.frequency_type	= 0, \
125 		.frequency	= { 7000, 48000 }, \
126 	}
127 static const struct audio_format auixp_formats[AUIXP_NFORMATS] = {
128 	AUIXP_FORMAT(AUMODE_PLAY | AUMODE_RECORD, 2, AUFMT_STEREO),
129 	AUIXP_FORMAT(AUMODE_PLAY                , 4, AUFMT_SURROUND4),
130 	AUIXP_FORMAT(AUMODE_PLAY                , 6, AUFMT_DOLBY_5_1),
131 };
132 
133 /* codec detection constant indicating the interrupt flags */
134 #define ALL_CODECS_NOT_READY \
135 	    (ATI_REG_ISR_CODEC0_NOT_READY |\
136 	     ATI_REG_ISR_CODEC1_NOT_READY |\
137 	     ATI_REG_ISR_CODEC2_NOT_READY)
138 #define CODEC_CHECK_BITS (ALL_CODECS_NOT_READY|ATI_REG_ISR_NEW_FRAME)
139 
140 
141 /* autoconfig */
142 static int	auixp_match(device_t, cfdata_t, void *);
143 static void	auixp_attach(device_t, device_t, void *);
144 static int	auixp_detach(device_t, int);
145 
146 
147 /* audio(9) function prototypes */
148 static int	auixp_query_format(void *, audio_format_query_t *);
149 static int	auixp_set_format(void *, int,
150 			const audio_params_t *, const audio_params_t *,
151 			audio_filter_reg_t *, audio_filter_reg_t *);
152 static int	auixp_commit_settings(void *);
153 static int	auixp_round_blocksize(void *, int, int, const audio_params_t *);
154 static int	auixp_trigger_output(void *, void *, void *, int,
155 				     void (*)(void *),
156 		void *, const audio_params_t *);
157 static int	auixp_trigger_input(void *, void *, void *, int,
158 				    void (*)(void *),
159 		void *, const audio_params_t *);
160 static int	auixp_halt_output(void *);
161 static int	auixp_halt_input(void *);
162 static int	auixp_set_port(void *, mixer_ctrl_t *);
163 static int	auixp_get_port(void *, mixer_ctrl_t *);
164 static int	auixp_query_devinfo(void *, mixer_devinfo_t *);
165 static void *	auixp_malloc(void *, int, size_t);
166 static void	auixp_free(void *, void *, size_t);
167 static int	auixp_getdev(void *, struct audio_device *);
168 static size_t	auixp_round_buffersize(void *, int, size_t);
169 static int	auixp_get_props(void *);
170 static int	auixp_intr(void *);
171 static int	auixp_allocmem(struct auixp_softc *, size_t, size_t,
172 		struct auixp_dma *);
173 static int	auixp_freemem(struct auixp_softc *, struct auixp_dma *);
174 
175 /* Supporting subroutines */
176 static int	auixp_init(struct auixp_softc *);
177 static void	auixp_autodetect_codecs(struct auixp_softc *);
178 static void	auixp_post_config(device_t);
179 
180 static void	auixp_reset_aclink(struct auixp_softc *);
181 static int	auixp_attach_codec(void *, struct ac97_codec_if *);
182 static int	auixp_read_codec(void *, uint8_t, uint16_t *);
183 static int	auixp_write_codec(void *, uint8_t, uint16_t);
184 static int	auixp_wait_for_codecs(struct auixp_softc *, const char *);
185 static int	auixp_reset_codec(void *);
186 static enum ac97_host_flags	auixp_flags_codec(void *);
187 
188 static void	auixp_enable_dma(struct auixp_softc *, struct auixp_dma *);
189 static void	auixp_disable_dma(struct auixp_softc *, struct auixp_dma *);
190 static void	auixp_enable_interrupts(struct auixp_softc *);
191 static void	auixp_disable_interrupts(struct auixp_softc *);
192 
193 
194 /* statics */
195 static void	auixp_link_daisychain(struct auixp_softc *,
196 				      struct auixp_dma *, struct auixp_dma *,
197 				      int, int);
198 static int	auixp_allocate_dma_chain(struct auixp_softc *,
199 					 struct auixp_dma **);
200 static void	auixp_program_dma_chain(struct auixp_softc *,
201 					struct auixp_dma *);
202 static void	auixp_dma_update(struct auixp_softc *, struct auixp_dma *);
203 static void	auixp_update_busbusy(struct auixp_softc *);
204 static void	auixp_get_locks(void *, kmutex_t **, kmutex_t **);
205 
206 static bool	auixp_resume(device_t, const pmf_qual_t *);
207 
208 
209 #ifdef DEBUG_AUIXP
210 static struct auixp_softc *static_sc;
211 static void auixp_dumpreg(void) __unused;
212 #	define DPRINTF(x) printf x;
213 #else
214 #	define DPRINTF(x)
215 #endif
216 
217 
218 static const struct audio_hw_if auixp_hw_if = {
219 	.query_format		= auixp_query_format,
220 	.set_format		= auixp_set_format,
221 	.round_blocksize	= auixp_round_blocksize,
222 	.commit_settings	= auixp_commit_settings,
223 	.halt_output		= auixp_halt_output,
224 	.halt_input		= auixp_halt_input,
225 	.getdev			= auixp_getdev,
226 	.set_port		= auixp_set_port,
227 	.get_port		= auixp_get_port,
228 	.query_devinfo		= auixp_query_devinfo,
229 	.allocm			= auixp_malloc,
230 	.freem			= auixp_free,
231 	.round_buffersize	= auixp_round_buffersize,
232 	.get_props		= auixp_get_props,
233 	.trigger_output		= auixp_trigger_output,
234 	.trigger_input		= auixp_trigger_input,
235 	.get_locks		= auixp_get_locks,
236 };
237 
238 
239 CFATTACH_DECL_NEW(auixp, sizeof(struct auixp_softc), auixp_match, auixp_attach,
240     auixp_detach, NULL);
241 
242 
243 /*
244  * audio(9) functions
245  */
246 
247 static int
248 auixp_query_format(void *hdl, audio_format_query_t *afp)
249 {
250 	struct auixp_codec *co;
251 	struct auixp_softc *sc;
252 
253 	co = (struct auixp_codec *) hdl;
254 	sc = co->sc;
255 	return audio_query_format(sc->sc_formats, AUIXP_NFORMATS, afp);
256 }
257 
258 
259 static int
260 auixp_set_rate(struct auixp_codec *co, int mode, u_int srate)
261 {
262 	int ret;
263 	u_int ratetmp;
264 
265 	ratetmp = srate;
266 	if (mode == AUMODE_RECORD) {
267 		ret = co->codec_if->vtbl->set_rate(co->codec_if,
268 			AC97_REG_PCM_LR_ADC_RATE, &ratetmp);
269 		return ret;
270 	}
271 
272 	/* play mode */
273 	ret = co->codec_if->vtbl->set_rate(co->codec_if,
274 		AC97_REG_PCM_FRONT_DAC_RATE, &ratetmp);
275 	if (ret)
276 		return ret;
277 
278 	ratetmp = srate;
279 	ret = co->codec_if->vtbl->set_rate(co->codec_if,
280 		AC97_REG_PCM_SURR_DAC_RATE, &ratetmp);
281 	if (ret)
282 		return ret;
283 
284 	ratetmp = srate;
285 	ret = co->codec_if->vtbl->set_rate(co->codec_if,
286 		AC97_REG_PCM_LFE_DAC_RATE, &ratetmp);
287 	return ret;
288 }
289 
290 
291 /* commit setting and program ATI IXP chip */
292 static int
293 auixp_commit_settings(void *hdl)
294 {
295 	struct auixp_codec *co;
296 	struct auixp_softc *sc;
297 	bus_space_tag_t    iot;
298 	bus_space_handle_t ioh;
299 	struct audio_params *params;
300 	uint32_t value;
301 
302 	/* XXX would it be better to stop interrupts first? XXX */
303 	co = (struct auixp_codec *) hdl;
304 	sc = co->sc;
305 	iot = sc->sc_iot;
306 	ioh = sc->sc_ioh;
307 
308 	/* process input settings */
309 	params = &sc->sc_play_params;
310 
311 	/* set input interleaving (precision) */
312 	value  =  bus_space_read_4(iot, ioh, ATI_REG_CMD);
313 	value &= ~ATI_REG_CMD_INTERLEAVE_IN;
314 	if (params->precision <= 16)
315 		value |= ATI_REG_CMD_INTERLEAVE_IN;
316 	bus_space_write_4(iot, ioh, ATI_REG_CMD, value);
317 
318 	/* process output settings */
319 	params = &sc->sc_play_params;
320 
321 	value  =  bus_space_read_4(iot, ioh, ATI_REG_OUT_DMA_SLOT);
322 	value &= ~ATI_REG_OUT_DMA_SLOT_MASK;
323 
324 	/* TODO SPDIF case for 8 channels */
325 	switch (params->channels) {
326 	case 6:
327 		value |= ATI_REG_OUT_DMA_SLOT_BIT(7) |
328 			 ATI_REG_OUT_DMA_SLOT_BIT(8);
329 		/* fallthru */
330 	case 4:
331 		value |= ATI_REG_OUT_DMA_SLOT_BIT(6) |
332 			 ATI_REG_OUT_DMA_SLOT_BIT(9);
333 		/* fallthru */
334 	default:
335 		value |= ATI_REG_OUT_DMA_SLOT_BIT(3) |
336 			 ATI_REG_OUT_DMA_SLOT_BIT(4);
337 		break;
338 	}
339 	/* set output threshold */
340 	value |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
341 	bus_space_write_4(iot, ioh, ATI_REG_OUT_DMA_SLOT, value);
342 
343 	/* set output interleaving (precision) */
344 	value  =  bus_space_read_4(iot, ioh, ATI_REG_CMD);
345 	value &= ~ATI_REG_CMD_INTERLEAVE_OUT;
346 	if (params->precision <= 16)
347 		value |= ATI_REG_CMD_INTERLEAVE_OUT;
348 	bus_space_write_4(iot, ioh, ATI_REG_CMD, value);
349 
350 	/* enable 6 channel reordering */
351 	value  =  bus_space_read_4(iot, ioh, ATI_REG_6CH_REORDER);
352 	value &= ~ATI_REG_6CH_REORDER_EN;
353 	if (params->channels == 6)
354 		value |= ATI_REG_6CH_REORDER_EN;
355 	bus_space_write_4(iot, ioh, ATI_REG_6CH_REORDER, value);
356 
357 	if (sc->has_spdif) {
358 		/* set SPDIF (if present) */
359 		value  =  bus_space_read_4(iot, ioh, ATI_REG_CMD);
360 		value &= ~ATI_REG_CMD_SPDF_CONFIG_MASK;
361 		value |=  ATI_REG_CMD_SPDF_CONFIG_34; /* NetBSD AC'97 default */
362 
363 		/* XXX this prolly is not nessisary unless splitted XXX */
364 		value &= ~ATI_REG_CMD_INTERLEAVE_SPDF;
365 		if (params->precision <= 16)
366 			value |= ATI_REG_CMD_INTERLEAVE_SPDF;
367 		bus_space_write_4(iot, ioh, ATI_REG_CMD, value);
368 	}
369 
370 	return 0;
371 }
372 
373 
374 /* set audio properties in desired setting */
375 static int
376 auixp_set_format(void *hdl, int setmode,
377     const audio_params_t *play, const audio_params_t *rec,
378     audio_filter_reg_t *pfil, audio_filter_reg_t *rfil)
379 {
380 	struct auixp_codec *co;
381 	struct auixp_softc *sc;
382 	const audio_params_t *params;
383 	int mode, index;
384 
385 	/*
386 	 * In current NetBSD AC'97 implementation, SPDF is linked to channel 3
387 	 * and 4 i.e. stereo output.
388 	 */
389 
390 	co = (struct auixp_codec *) hdl;
391 	sc = co->sc;
392 	for (mode = AUMODE_RECORD; mode != -1;
393 	     mode = (mode == AUMODE_RECORD) ? AUMODE_PLAY : -1) {
394 		if ((setmode & mode) == 0)
395 			continue;
396 
397 		params = (mode == AUMODE_PLAY) ? play : rec;
398 		if (params == NULL)
399 			continue;
400 
401 		index = audio_indexof_format(sc->sc_formats, AUIXP_NFORMATS,
402 					     mode, params);
403 
404 		/* if variable speed and we can't set the desired rate, fail */
405 		if ((sc->sc_formats[index].frequency_type != 1) &&
406 		    auixp_set_rate(co, mode, params->sample_rate))
407 			return EINVAL;
408 
409 		/* preserve the settings */
410 		if (mode == AUMODE_PLAY)
411 			sc->sc_play_params = *params;
412 		if (mode == AUMODE_RECORD)
413 			sc->sc_rec_params  = *params;
414 	}
415 
416 	return 0;
417 }
418 
419 
420 /* called to translate a requested blocksize to a hw-possible one */
421 static int
422 auixp_round_blocksize(void *hdl, int bs, int mode,
423     const audio_params_t *param)
424 {
425 	uint32_t new_bs;
426 
427 	new_bs = bs;
428 	/* Be conservative; align to 32 bytes and maximise it to 64 kb */
429 	/* 256 kb possible */
430 	if (new_bs > 0x10000)
431 		bs = 0x10000;			/* 64 kb max */
432 	new_bs = (bs & ~0x20);			/* 32 bytes align */
433 
434 	return new_bs;
435 }
436 
437 
438 /*
439  * allocate dma capable memory and record its information for later retrieval
440  * when we program the dma chain itself. The trigger routines passes on the
441  * kernel virtual address we return here as a reference to the mapping.
442  */
443 static void *
444 auixp_malloc(void *hdl, int direction, size_t size)
445 {
446 	struct auixp_codec *co;
447 	struct auixp_softc *sc;
448 	struct auixp_dma *dma;
449 	int error;
450 
451 	co = (struct auixp_codec *) hdl;
452 	sc = co->sc;
453 	/* get us a auixp_dma structure */
454 	dma = kmem_alloc(sizeof(*dma), KM_SLEEP);
455 
456 	/* get us a dma buffer itself */
457 	error = auixp_allocmem(sc, size, 16, dma);
458 	if (error) {
459 		kmem_free(dma, sizeof(*dma));
460 		aprint_error_dev(sc->sc_dev, "auixp_malloc: not enough memory\n");
461 
462 		return NULL;
463 	}
464 	SLIST_INSERT_HEAD(&sc->sc_dma_list, dma, dma_chain);
465 
466 	DPRINTF(("auixp_malloc: returning kern %p,   hw 0x%08x for %zd bytes "
467 	    "in %d segs\n", KERNADDR(dma), (uint32_t) DMAADDR(dma), dma->size,
468 	    dma->nsegs)
469 	);
470 
471 	return KERNADDR(dma);
472 }
473 
474 
475 /*
476  * free and release dma capable memory we allocated before and remove its
477  * recording
478  */
479 static void
480 auixp_free(void *hdl, void *addr, size_t size)
481 {
482 	struct auixp_codec *co;
483 	struct auixp_softc *sc;
484 	struct auixp_dma *dma;
485 
486 	co = (struct auixp_codec *) hdl;
487 	sc = co->sc;
488 	SLIST_FOREACH(dma, &sc->sc_dma_list, dma_chain) {
489 		if (KERNADDR(dma) == addr) {
490 			SLIST_REMOVE(&sc->sc_dma_list, dma, auixp_dma,
491 			    dma_chain);
492 			auixp_freemem(sc, dma);
493 			kmem_free(dma, sizeof(*dma));
494 			return;
495 		}
496 	}
497 }
498 
499 
500 static int
501 auixp_getdev(void *hdl, struct audio_device *ret)
502 {
503 
504 	*ret = auixp_device;
505 	return 0;
506 }
507 
508 
509 /* pass request to AC'97 codec code */
510 static int
511 auixp_set_port(void *hdl, mixer_ctrl_t *mc)
512 {
513 	struct auixp_codec *co;
514 
515 	co = (struct auixp_codec *) hdl;
516 	return co->codec_if->vtbl->mixer_set_port(co->codec_if, mc);
517 }
518 
519 
520 /* pass request to AC'97 codec code */
521 static int
522 auixp_get_port(void *hdl, mixer_ctrl_t *mc)
523 {
524 	struct auixp_codec *co;
525 
526 	co = (struct auixp_codec *) hdl;
527 	return co->codec_if->vtbl->mixer_get_port(co->codec_if, mc);
528 }
529 
530 /* pass request to AC'97 codec code */
531 static int
532 auixp_query_devinfo(void *hdl, mixer_devinfo_t *di)
533 {
534 	struct auixp_codec *co;
535 
536 	co = (struct auixp_codec *) hdl;
537 	return co->codec_if->vtbl->query_devinfo(co->codec_if, di);
538 }
539 
540 
541 static size_t
542 auixp_round_buffersize(void *hdl, int direction,
543     size_t bufsize)
544 {
545 
546 	/* XXX force maximum? i.e. 256 kb? */
547 	return bufsize;
548 }
549 
550 
551 static int
552 auixp_get_props(void *hdl)
553 {
554 
555 	return AUDIO_PROP_PLAYBACK | AUDIO_PROP_CAPTURE |
556 	    AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX;
557 }
558 
559 
560 /*
561  * A dma descriptor has dma->nsegs segments defined in dma->segs set up when
562  * we claimed the memory.
563  *
564  * Due to our demand for one contiguous DMA area, we only have one segment. A
565  * c_dma structure is about 3 kb for the 256 entries we maximally program
566  * -arbitrary limit AFAIK- so all is most likely to be in one segment/page
567  * anyway.
568  *
569  * XXX ought to implement fragmented dma area XXX
570  *
571  * Note that _v variables depict kernel virtual addresses, _p variables depict
572  * physical addresses.
573  */
574 static void
575 auixp_link_daisychain(struct auixp_softc *sc,
576 		struct auixp_dma *c_dma, struct auixp_dma *s_dma,
577 		int blksize, int blocks)
578 {
579 	atiixp_dma_desc_t *caddr_v, *next_caddr_v;
580 	uint32_t caddr_p, next_caddr_p, saddr_p;
581 	int i;
582 
583 	/* just make sure we are not changing when its running */
584 	auixp_disable_dma(sc, c_dma);
585 
586 	/* setup dma chain start addresses */
587 	caddr_v = KERNADDR(c_dma);
588 	caddr_p = DMAADDR(c_dma);
589 	saddr_p = DMAADDR(s_dma);
590 
591 	/* program the requested number of blocks */
592 	for (i = 0; i < blocks; i++) {
593 		/* clear the block just in case */
594 		memset(caddr_v, 0, sizeof(atiixp_dma_desc_t));
595 
596 		/* round robin the chain dma addresses for its successor */
597 		next_caddr_v = caddr_v + 1;
598 		next_caddr_p = caddr_p + sizeof(atiixp_dma_desc_t);
599 
600 		if (i == blocks-1) {
601 			next_caddr_v = KERNADDR(c_dma);
602 			next_caddr_p = DMAADDR(c_dma);
603 		}
604 
605 		/* fill in the hardware dma chain descriptor in little-endian */
606 		caddr_v->addr   = htole32(saddr_p);
607 		caddr_v->status = htole16(0);
608 		caddr_v->size   = htole16((blksize >> 2)); /* in dwords (!!!) */
609 		caddr_v->next   = htole32(next_caddr_p);
610 
611 		/* advance slot */
612 		saddr_p += blksize;	/* XXX assuming contiguous XXX */
613 		caddr_v  = next_caddr_v;
614 		caddr_p  = next_caddr_p;
615 	}
616 }
617 
618 
619 static int
620 auixp_allocate_dma_chain(struct auixp_softc *sc, struct auixp_dma **dmap)
621 {
622 	struct auixp_dma *dma;
623 	int error;
624 
625 	/* allocate keeper of dma area */
626 	*dmap = NULL;
627 	dma = kmem_zalloc(sizeof(struct auixp_dma), KM_SLEEP);
628 
629 	/* allocate for daisychain of IXP hardware-dma descriptors */
630 	error = auixp_allocmem(sc, DMA_DESC_CHAIN * sizeof(atiixp_dma_desc_t),
631 	    16, dma);
632 	if (error) {
633 		aprint_error_dev(sc->sc_dev, "can't malloc dma descriptor chain\n");
634 		kmem_free(dma, sizeof(*dma));
635 		return ENOMEM;
636 	}
637 
638 	/* return info and initialise structure */
639 	dma->intr    = NULL;
640 	dma->intrarg = NULL;
641 
642 	*dmap = dma;
643 	return 0;
644 }
645 
646 
647 /* program dma chain in its link address descriptor */
648 static void
649 auixp_program_dma_chain(struct auixp_softc *sc, struct auixp_dma *dma)
650 {
651 	bus_space_tag_t    iot;
652 	bus_space_handle_t ioh;
653 	uint32_t value;
654 
655 	iot = sc->sc_iot;
656 	ioh = sc->sc_ioh;
657 	/* get hardware start address of DMA chain and set valid-flag in it */
658 	/* XXX always at start? XXX */
659 	value = DMAADDR(dma);
660 	value = value | ATI_REG_LINKPTR_EN;
661 
662 	/* reset linkpointer */
663 	bus_space_write_4(iot, ioh, dma->linkptr, 0);
664 
665 	/* reset this DMA engine */
666 	auixp_disable_dma(sc, dma);
667 	auixp_enable_dma(sc, dma);
668 
669 	/* program new DMA linkpointer */
670 	bus_space_write_4(iot, ioh, dma->linkptr, value);
671 }
672 
673 
674 /* called from interrupt code to signal end of one dma-slot */
675 static void
676 auixp_dma_update(struct auixp_softc *sc, struct auixp_dma *dma)
677 {
678 
679 	/* be very paranoid */
680 	if (!dma)
681 		panic("%s: update: dma = NULL", device_xname(sc->sc_dev));
682 	if (!dma->intr)
683 		panic("%s: update: dma->intr = NULL", device_xname(sc->sc_dev));
684 
685 	/* request more input from upper layer */
686 	(*dma->intr)(dma->intrarg);
687 }
688 
689 
690 /*
691  * The magic `busbusy' bit that needs to be set when dma is active; allowing
692  * busmastering?
693  */
694 static void
695 auixp_update_busbusy(struct auixp_softc *sc)
696 {
697 	bus_space_tag_t    iot;
698 	bus_space_handle_t ioh;
699 	uint32_t value;
700 	int running;
701 
702 	iot = sc->sc_iot;
703 	ioh = sc->sc_ioh;
704 	/* set bus-busy flag when either recording or playing is performed */
705 	value  = bus_space_read_4(iot, ioh, ATI_REG_IER);
706 	value &= ~ATI_REG_IER_SET_BUS_BUSY;
707 
708 	running = ((sc->sc_output_dma->running) || (sc->sc_input_dma->running));
709 	if (running)
710 		value |= ATI_REG_IER_SET_BUS_BUSY;
711 
712 	bus_space_write_4(iot, ioh, ATI_REG_IER, value);
713 
714 }
715 
716 
717 /*
718  * Called from upper audio layer to request playing audio, only called once;
719  * audio is refilled by calling the intr() function when space is available
720  * again.
721  */
722 /* XXX allmost literaly a copy of trigger-input; could be factorised XXX */
723 static int
724 auixp_trigger_output(void *hdl, void *start, void *end, int blksize,
725     void (*intr)(void *), void *intrarg, const audio_params_t *param)
726 {
727 	struct auixp_codec *co;
728 	struct auixp_softc *sc;
729 	struct auixp_dma   *chain_dma;
730 	struct auixp_dma   *sound_dma;
731 	uint32_t blocks;
732 
733 	co = (struct auixp_codec *) hdl;
734 	sc = co->sc;
735 	chain_dma = sc->sc_output_dma;
736 	/* add functions to call back */
737 	chain_dma->intr    = intr;
738 	chain_dma->intrarg = intrarg;
739 
740 	/*
741 	 * Program output DMA chain with blocks from [start...end] with
742 	 * blksize fragments.
743 	 *
744 	 * NOTE, we can assume its in one block since we asked for it to be in
745 	 * one contiguous blob; XXX change this? XXX
746 	 */
747 	blocks = (size_t) (((char *) end) - ((char *) start)) / blksize;
748 
749 	/* lookup `start' address in our list of DMA area's */
750 	SLIST_FOREACH(sound_dma, &sc->sc_dma_list, dma_chain) {
751 		if (KERNADDR(sound_dma) == start)
752 			break;
753 	}
754 
755 	/* not ours ? then bail out */
756 	if (!sound_dma) {
757 		printf("%s: auixp_trigger_output: bad sound addr %p\n",
758 		    device_xname(sc->sc_dev), start);
759 		return EINVAL;
760 	}
761 
762 	/* link round-robin daisychain and program hardware */
763 	auixp_link_daisychain(sc, chain_dma, sound_dma, blksize, blocks);
764 	auixp_program_dma_chain(sc, chain_dma);
765 
766 	/* mark we are now able to run now */
767 	chain_dma->running = 1;
768 
769 	/* update bus-flags; XXX programs more flags XXX */
770 	auixp_update_busbusy(sc);
771 
772 	/* callbacks happen in interrupt routine */
773 	return 0;
774 }
775 
776 
777 /* halt output of audio, just disable its dma and update bus state */
778 static int
779 auixp_halt_output(void *hdl)
780 {
781 	struct auixp_codec *co;
782 	struct auixp_softc *sc;
783 	struct auixp_dma   *dma;
784 
785 	co  = (struct auixp_codec *) hdl;
786 	sc  = co->sc;
787 	dma = sc->sc_output_dma;
788 	auixp_disable_dma(sc, dma);
789 
790 	dma->running = 0;
791 	auixp_update_busbusy(sc);
792 
793 	return 0;
794 }
795 
796 
797 /* XXX allmost literaly a copy of trigger-output; could be factorised XXX */
798 static int
799 auixp_trigger_input(void *hdl, void *start, void *end, int blksize,
800     void (*intr)(void *), void *intrarg, const audio_params_t *param)
801 {
802 	struct auixp_codec *co;
803 	struct auixp_softc *sc;
804 	struct auixp_dma   *chain_dma;
805 	struct auixp_dma   *sound_dma;
806 	uint32_t blocks;
807 
808 	co = (struct auixp_codec *) hdl;
809 	sc = co->sc;
810 	chain_dma = sc->sc_input_dma;
811 	/* add functions to call back */
812 	chain_dma->intr    = intr;
813 	chain_dma->intrarg = intrarg;
814 
815 	/*
816 	 * Program output DMA chain with blocks from [start...end] with
817 	 * blksize fragments.
818 	 *
819 	 * NOTE, we can assume its in one block since we asked for it to be in
820 	 * one contiguous blob; XXX change this? XXX
821 	 */
822 	blocks = (size_t) (((char *) end) - ((char *) start)) / blksize;
823 
824 	/* lookup `start' address in our list of DMA area's */
825 	SLIST_FOREACH(sound_dma, &sc->sc_dma_list, dma_chain) {
826 		if (KERNADDR(sound_dma) == start)
827 			break;
828 	}
829 
830 	/* not ours ? then bail out */
831 	if (!sound_dma) {
832 		printf("%s: auixp_trigger_input: bad sound addr %p\n",
833 		    device_xname(sc->sc_dev), start);
834 		return EINVAL;
835 	}
836 
837 	/* link round-robin daisychain and program hardware */
838 	auixp_link_daisychain(sc, chain_dma, sound_dma, blksize, blocks);
839 	auixp_program_dma_chain(sc, chain_dma);
840 
841 	/* mark we are now able to run now */
842 	chain_dma->running = 1;
843 
844 	/* update bus-flags; XXX programs more flags XXX */
845 	auixp_update_busbusy(sc);
846 
847 	/* callbacks happen in interrupt routine */
848 	return 0;
849 }
850 
851 
852 /* halt sampling audio, just disable its dma and update bus state */
853 static int
854 auixp_halt_input(void *hdl)
855 {
856 	struct auixp_codec *co;
857 	struct auixp_softc *sc;
858 	struct auixp_dma   *dma;
859 
860 	co = (struct auixp_codec *) hdl;
861 	sc = co->sc;
862 	dma = sc->sc_input_dma;
863 	auixp_disable_dma(sc, dma);
864 
865 	dma->running = 0;
866 	auixp_update_busbusy(sc);
867 
868 	return 0;
869 }
870 
871 
872 /*
873  * IXP audio interrupt handler
874  *
875  * note that we return the number of bits handled; the return value is not
876  * documentated but i saw it implemented in other drivers. Prolly returning a
877  * value > 0 means "i've dealt with it"
878  *
879  */
880 static int
881 auixp_intr(void *softc)
882 {
883 	struct auixp_softc *sc;
884 	bus_space_tag_t    iot;
885 	bus_space_handle_t ioh;
886 	uint32_t status, enable, detected_codecs;
887 	int ret;
888 
889 	sc = softc;
890 	mutex_spin_enter(&sc->sc_intr_lock);
891 
892 	iot = sc->sc_iot;
893 	ioh = sc->sc_ioh;
894 	ret = 0;
895 	/* get status from the interrupt status register */
896 	status = bus_space_read_4(iot, ioh, ATI_REG_ISR);
897 
898 	if (status == 0) {
899 		mutex_spin_exit(&sc->sc_intr_lock);
900 		return 0;
901 	}
902 
903 	DPRINTF(("%s: (status = %x)\n", device_xname(sc->sc_dev), status));
904 
905 	/* check DMA UPDATE flags for input & output */
906 	if (status & ATI_REG_ISR_IN_STATUS) {
907 		ret++; DPRINTF(("IN_STATUS\n"));
908 		auixp_dma_update(sc, sc->sc_input_dma);
909 	}
910 	if (status & ATI_REG_ISR_OUT_STATUS) {
911 		ret++; DPRINTF(("OUT_STATUS\n"));
912 		auixp_dma_update(sc, sc->sc_output_dma);
913 	}
914 
915 	/* XXX XRUN flags not used/needed yet; should i implement it? XXX */
916 	/* acknowledge the interrupts nevertheless */
917 	if (status & ATI_REG_ISR_IN_XRUN) {
918 		ret++; DPRINTF(("IN_XRUN\n"));
919 		/* auixp_dma_xrun(sc, sc->sc_input_dma);  */
920 	}
921 	if (status & ATI_REG_ISR_OUT_XRUN) {
922 		ret++; DPRINTF(("OUT_XRUN\n"));
923 		/* auixp_dma_xrun(sc, sc->sc_output_dma); */
924 	}
925 
926 	/* check if we are looking for codec detection */
927 	if (status & CODEC_CHECK_BITS) {
928 		ret++;
929 		/* mark missing codecs as not ready */
930 		detected_codecs = status & CODEC_CHECK_BITS;
931 		sc->sc_codec_not_ready_bits |= detected_codecs;
932 
933 		/* disable detected interrupt sources */
934 		enable  = bus_space_read_4(iot, ioh, ATI_REG_IER);
935 		enable &= ~detected_codecs;
936 		bus_space_write_4(iot, ioh, ATI_REG_IER, enable);
937 	}
938 
939 	/* acknowledge interrupt sources */
940 	bus_space_write_4(iot, ioh, ATI_REG_ISR, status);
941 
942 	mutex_spin_exit(&sc->sc_intr_lock);
943 	return ret;
944 }
945 
946 
947 /* allocate memory for dma purposes; on failure of any of the steps, roll back */
948 static int
949 auixp_allocmem(struct auixp_softc *sc, size_t size,
950 	       size_t align, struct auixp_dma *dma)
951 {
952 	int error;
953 
954 	/* remember size */
955 	dma->size = size;
956 
957 	/* allocate DMA safe memory but in just one segment for now :( */
958 	error = bus_dmamem_alloc(sc->sc_dmat, dma->size, align, 0,
959 	    dma->segs, sizeof(dma->segs) / sizeof(dma->segs[0]), &dma->nsegs,
960 	    BUS_DMA_WAITOK);
961 	if (error)
962 		return error;
963 
964 	/*
965 	 * map allocated memory into kernel virtual address space and keep it
966 	 * coherent with the CPU.
967 	 */
968 	error = bus_dmamem_map(sc->sc_dmat, dma->segs, dma->nsegs, dma->size,
969 				&dma->addr, BUS_DMA_WAITOK | BUS_DMA_COHERENT);
970 	if (error)
971 		goto free;
972 
973 	/* allocate associated dma handle and initialize it. */
974 	error = bus_dmamap_create(sc->sc_dmat, dma->size, 1, dma->size, 0,
975 				  BUS_DMA_WAITOK, &dma->map);
976 	if (error)
977 		goto unmap;
978 
979 	/*
980 	 * load the dma handle with mappings for a dma transfer; all pages
981 	 * need to be wired.
982 	 */
983 	error = bus_dmamap_load(sc->sc_dmat, dma->map, dma->addr, dma->size, NULL,
984 				BUS_DMA_WAITOK);
985 	if (error)
986 		goto destroy;
987 
988 	return 0;
989 
990 destroy:
991 	bus_dmamap_destroy(sc->sc_dmat, dma->map);
992 unmap:
993 	bus_dmamem_unmap(sc->sc_dmat, dma->addr, dma->size);
994 free:
995 	bus_dmamem_free(sc->sc_dmat, dma->segs, dma->nsegs);
996 
997 	return error;
998 }
999 
1000 
1001 /* undo dma mapping and release memory allocated */
1002 static int
1003 auixp_freemem(struct auixp_softc *sc, struct auixp_dma *p)
1004 {
1005 
1006 	bus_dmamap_unload(sc->sc_dmat, p->map);
1007 	bus_dmamap_destroy(sc->sc_dmat, p->map);
1008 	bus_dmamem_unmap(sc->sc_dmat, p->addr, p->size);
1009 	bus_dmamem_free(sc->sc_dmat, p->segs, p->nsegs);
1010 
1011 	return 0;
1012 }
1013 
1014 
1015 /*
1016  * Attachment section
1017  */
1018 
1019 /* Is it my hardware? */
1020 static int
1021 auixp_match(device_t dev, cfdata_t match, void *aux)
1022 {
1023 	struct pci_attach_args *pa;
1024 
1025 	pa = (struct pci_attach_args *)aux;
1026 	switch(PCI_VENDOR(pa->pa_id)) {
1027 	case PCI_VENDOR_ATI:
1028 		switch(PCI_PRODUCT(pa->pa_id)) {
1029 		case PCI_PRODUCT_ATI_IXP_AUDIO_200:
1030 		case PCI_PRODUCT_ATI_IXP_AUDIO_300:
1031 		case PCI_PRODUCT_ATI_IXP_AUDIO_400:
1032 			return 1;
1033 		}
1034 	}
1035 
1036 	return 0;
1037 }
1038 
1039 
1040 /* it is... now hook up and set up the resources we need */
1041 static void
1042 auixp_attach(device_t parent, device_t self, void *aux)
1043 {
1044 	struct auixp_softc *sc;
1045 	struct pci_attach_args *pa;
1046 	pcitag_t tag;
1047 	pci_chipset_tag_t pc;
1048 	pci_intr_handle_t ih;
1049 	const struct auixp_card_type *card;
1050 	const char *intrstr;
1051 	uint32_t data;
1052 	int error;
1053 	char intrbuf[PCI_INTRSTR_LEN];
1054 
1055 	sc = device_private(self);
1056 	sc->sc_dev = self;
1057 	pa = (struct pci_attach_args *)aux;
1058 	tag = pa->pa_tag;
1059 	pc = pa->pa_pc;
1060 #ifdef DEBUG_AUIXP
1061 	static_sc = sc;
1062 #endif
1063 
1064 	/* print information confirming attachment */
1065 	pci_aprint_devinfo(pa, "Audio controller");
1066 
1067 	/* set up details from our set of known `cards'/chips */
1068 	for (card = auixp_card_types; card->pci_vendor_id; card++)
1069 		if (PCI_VENDOR(pa->pa_id) == card->pci_vendor_id &&
1070 		    PCI_PRODUCT(pa->pa_id) == card->pci_product_id) {
1071 			sc->type = card->type;
1072 			break;
1073 		}
1074 
1075 	/* device only has 32 bit non prefetchable memory		*/
1076 	/* set MEM space access and enable the card's busmastering	*/
1077 	data = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
1078 	data |= (PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE);
1079 	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, data);
1080 
1081 	/* map memory; its not sized -> what is the size? max PCI slot size? */
1082 	if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_MEM, 0,
1083 	    &sc->sc_iot, &sc->sc_ioh, &sc->sc_iob, &sc->sc_ios)) {
1084 		aprint_error_dev(sc->sc_dev, "can't map memory space\n");
1085 		return;
1086 	}
1087 
1088 	/* Initialize softc */
1089 	sc->sc_tag = tag;
1090 	sc->sc_pct = pc;
1091 	sc->sc_dmat = pa->pa_dmat;
1092 	SLIST_INIT(&sc->sc_dma_list);
1093 
1094 	/* get us the auixp_dma structures */
1095 	auixp_allocate_dma_chain(sc, &sc->sc_output_dma);
1096 	auixp_allocate_dma_chain(sc, &sc->sc_input_dma);
1097 
1098 	/* when that fails we are dead in the water */
1099 	if (!sc->sc_output_dma || !sc->sc_input_dma)
1100 		return;
1101 
1102 #if 0
1103 	/* could preliminary program DMA chain */
1104 	auixp_program_dma_chain(sc, sc->sc_output_dma);
1105 	auixp_program_dma_chain(sc, sc->sc_input_dma);
1106 #endif
1107 
1108 	/* map interrupt on the pci bus */
1109 	if (pci_intr_map(pa, &ih)) {
1110 		aprint_error_dev(sc->sc_dev, "can't map interrupt\n");
1111 		return;
1112 	}
1113 
1114 	/* where are we connected at ? */
1115 	intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
1116 
1117 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE);
1118 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO);
1119 
1120 	/* establish interrupt routine hookup at IPL_AUDIO level */
1121 	sc->sc_ih = pci_intr_establish_xname(pc, ih, IPL_AUDIO, auixp_intr,
1122 	    self, device_xname(self));
1123 	if (sc->sc_ih == NULL) {
1124 		aprint_error_dev(sc->sc_dev, "can't establish interrupt");
1125 		if (intrstr != NULL)
1126 			aprint_error(" at %s", intrstr);
1127 		aprint_error("\n");
1128 		return;
1129 	}
1130 	aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", intrstr);
1131 
1132 	/* power up chip */
1133 	if ((error = pci_activate(pa->pa_pc, pa->pa_tag, self,
1134 	    pci_activate_null)) && error != EOPNOTSUPP) {
1135 		aprint_error_dev(sc->sc_dev, "cannot activate %d\n",
1136 		    error);
1137 		return;
1138 	}
1139 
1140 	/* init chip */
1141 	if (auixp_init(sc) == -1) {
1142 		aprint_error_dev(sc->sc_dev,
1143 		    "auixp_attach: unable to initialize the card\n");
1144 		return;
1145 	}
1146 
1147 	if (!pmf_device_register(self, NULL, auixp_resume))
1148 		aprint_error_dev(self, "couldn't establish power handler\n");
1149 
1150 	/*
1151 	 * delay further configuration of codecs and audio after interrupts
1152 	 * are enabled.
1153 	 */
1154 	config_interrupts(self, auixp_post_config);
1155 }
1156 
1157 
1158 /* called from autoconfigure system when interrupts are enabled */
1159 static void
1160 auixp_post_config(device_t self)
1161 {
1162 	struct auixp_softc *sc;
1163 	struct auixp_codec *codec;
1164 	int codec_nr;
1165 	int i;
1166 
1167 	sc = device_private(self);
1168 	/* detect the AC97 codecs */
1169 	auixp_autodetect_codecs(sc);
1170 
1171 	/* setup audio translation formats : following codec0 (!) */
1172 	codec = &sc->sc_codec[0];
1173 	if (!codec->present) {
1174 		/* nothing??? then invalidate all formats */
1175 		for (i = 0; i < AUIXP_NFORMATS; i++) {
1176 			AUFMT_INVALIDATE(&sc->sc_formats[i]);
1177 		}
1178 		return;
1179 	}
1180 
1181 	/* copy formats and invalidate entries not suitable for codec0 */
1182 	memcpy(sc->sc_formats, auixp_formats, sizeof(auixp_formats));
1183 	mutex_enter(&sc->sc_lock);
1184 	sc->has_4ch   = AC97_IS_4CH(codec->codec_if);
1185 	sc->has_6ch   = AC97_IS_6CH(codec->codec_if);
1186 	sc->is_fixed  = AC97_IS_FIXED_RATE(codec->codec_if);
1187 	sc->has_spdif = AC97_HAS_SPDIF(codec->codec_if);
1188 	mutex_exit(&sc->sc_lock);
1189 
1190 	for (i = 0; i < AUIXP_NFORMATS; i++) {
1191 		if (sc->is_fixed) {
1192 			sc->sc_formats[i].frequency_type = 1;
1193 			sc->sc_formats[i].frequency[0]   = 48000;
1194 		}
1195 		switch (sc->sc_formats[i].channels) {
1196 		case 4 :
1197 			if (sc->has_4ch)
1198 				break;
1199 			AUFMT_INVALIDATE(&sc->sc_formats[i]);
1200 			break;
1201 		case 6 :
1202 			if (sc->has_6ch)
1203 				break;
1204 			AUFMT_INVALIDATE(&sc->sc_formats[i]);
1205 			break;
1206 		default :
1207 			break;
1208 		}
1209 	}
1210 
1211 	if (sc->has_spdif) {
1212 		aprint_normal_dev(sc->sc_dev, "codec spdif support detected but disabled "
1213 		    "for now\n");
1214 		sc->has_spdif = 0;
1215 	}
1216 
1217 	/* fill in the missing details about the dma channels. */
1218 	/* for output */
1219 	sc->sc_output_dma->linkptr        = ATI_REG_OUT_DMA_LINKPTR;
1220 	sc->sc_output_dma->dma_enable_bit = ATI_REG_CMD_OUT_DMA_EN |
1221 					    ATI_REG_CMD_SEND_EN;
1222 	/* have spdif? then this too! XXX not seeing LED yet! XXX */
1223 	if (sc->has_spdif)
1224 		sc->sc_output_dma->dma_enable_bit |= ATI_REG_CMD_SPDF_OUT_EN;
1225 
1226 	/* and for input */
1227 	sc->sc_input_dma->linkptr         = ATI_REG_IN_DMA_LINKPTR;
1228 	sc->sc_input_dma->dma_enable_bit  = ATI_REG_CMD_IN_DMA_EN  |
1229 					    ATI_REG_CMD_RECEIVE_EN;
1230 
1231 	/* attach audio devices for all detected codecs */
1232 	/* XXX wise? look at other multiple-codec able chipsets XXX */
1233 	for (codec_nr = 0; codec_nr < ATI_IXP_CODECS; codec_nr++) {
1234 		codec = &sc->sc_codec[codec_nr];
1235 		if (codec->present)
1236 			audio_attach_mi(&auixp_hw_if, codec, sc->sc_dev);
1237 	}
1238 
1239 	/* done! now enable all interrupts we can service */
1240 	auixp_enable_interrupts(sc);
1241 }
1242 
1243 static void
1244 auixp_enable_interrupts(struct auixp_softc *sc)
1245 {
1246 	bus_space_tag_t     iot;
1247 	bus_space_handle_t  ioh;
1248 	uint32_t value;
1249 
1250 	iot = sc->sc_iot;
1251 	ioh = sc->sc_ioh;
1252 
1253 	mutex_spin_enter(&sc->sc_intr_lock);
1254 
1255 	/* clear all pending */
1256 	bus_space_write_4(iot, ioh, ATI_REG_ISR, 0xffffffff);
1257 
1258 	/* enable all relevant interrupt sources we can handle */
1259 	value = bus_space_read_4(iot, ioh, ATI_REG_IER);
1260 
1261 	value |= ATI_REG_IER_IO_STATUS_EN;
1262 #ifdef notyet
1263 	value |= ATI_REG_IER_IN_XRUN_EN;
1264 	value |= ATI_REG_IER_OUT_XRUN_EN;
1265 
1266 	value |= ATI_REG_IER_SPDIF_XRUN_EN;
1267 	value |= ATI_REG_IER_SPDF_STATUS_EN;
1268 #endif
1269 
1270 	bus_space_write_4(iot, ioh, ATI_REG_IER, value);
1271 
1272 	mutex_spin_exit(&sc->sc_intr_lock);
1273 }
1274 
1275 
1276 static void
1277 auixp_disable_interrupts(struct auixp_softc *sc)
1278 {
1279 	bus_space_tag_t     iot;
1280 	bus_space_handle_t  ioh;
1281 
1282 	iot = sc->sc_iot;
1283 	ioh = sc->sc_ioh;
1284 
1285 	mutex_spin_enter(&sc->sc_intr_lock);
1286 
1287 	/* disable all interrupt sources */
1288 	bus_space_write_4(iot, ioh, ATI_REG_IER, 0);
1289 
1290 	/* clear all pending */
1291 	bus_space_write_4(iot, ioh, ATI_REG_ISR, 0xffffffff);
1292 
1293 	mutex_spin_exit(&sc->sc_intr_lock);
1294 }
1295 
1296 
1297 /* dismantle what we've set up by undoing setup */
1298 static int
1299 auixp_detach(device_t self, int flags)
1300 {
1301 	struct auixp_softc *sc;
1302 
1303 	sc = device_private(self);
1304 	/* XXX shouldn't we just reset the chip? XXX */
1305 	/*
1306 	 * should we explicitly disable interrupt generation and acknowledge
1307 	 * what's left on? better be safe than sorry.
1308 	 */
1309 	auixp_disable_interrupts(sc);
1310 
1311 	/* tear down .... */
1312 	config_detach(sc->sc_dev, flags);	/* XXX OK? XXX */
1313 	pmf_device_deregister(self);
1314 
1315 	if (sc->sc_ih != NULL)
1316 		pci_intr_disestablish(sc->sc_pct, sc->sc_ih);
1317 	if (sc->sc_ios)
1318 		bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
1319 
1320 	mutex_destroy(&sc->sc_lock);
1321 	mutex_destroy(&sc->sc_intr_lock);
1322 
1323 	return 0;
1324 }
1325 
1326 
1327 /*
1328  * codec handling
1329  *
1330  * IXP audio support can have upto 3 codecs! are they chained ? or
1331  * alternative outlets with the same audio feed i.e. with different mixer
1332  * settings? XXX does NetBSD support more than one audio codec? XXX
1333  */
1334 
1335 
1336 static int
1337 auixp_attach_codec(void *aux, struct ac97_codec_if *codec_if)
1338 {
1339 	struct auixp_codec *ixp_codec;
1340 
1341 	ixp_codec = aux;
1342 	ixp_codec->codec_if = codec_if;
1343 	ixp_codec->present  = 1;
1344 
1345 	return 0;
1346 }
1347 
1348 
1349 static int
1350 auixp_read_codec(void *aux, uint8_t reg, uint16_t *result)
1351 {
1352 	struct auixp_codec *co;
1353 	struct auixp_softc *sc;
1354 	bus_space_tag_t     iot;
1355 	bus_space_handle_t  ioh;
1356 	uint32_t data;
1357 	int timeout;
1358 
1359 	co  = aux;
1360 	sc  = co->sc;
1361 	iot = sc->sc_iot;
1362 	ioh = sc->sc_ioh;
1363 	if (auixp_wait_for_codecs(sc, "read_codec"))
1364 		return 0xffff;
1365 
1366 	/* build up command for reading codec register */
1367 	data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
1368 		ATI_REG_PHYS_OUT_ADDR_EN |
1369 		ATI_REG_PHYS_OUT_RW |
1370 		co->codec_nr;
1371 
1372 	bus_space_write_4(iot, ioh, ATI_REG_PHYS_OUT_ADDR, data);
1373 
1374 	if (auixp_wait_for_codecs(sc, "read_codec"))
1375 		return 0xffff;
1376 
1377 	/* wait until codec info is clocked in */
1378 	timeout = 500;		/* 500*2 usec -> 0.001 sec */
1379 	do {
1380 		data = bus_space_read_4(iot, ioh, ATI_REG_PHYS_IN_ADDR);
1381 		if (data & ATI_REG_PHYS_IN_READ_FLAG) {
1382 			DPRINTF(("read ac'97 codec reg 0x%x = 0x%08x\n",
1383 				reg, data >> ATI_REG_PHYS_IN_DATA_SHIFT)
1384 			);
1385 			*result = data >> ATI_REG_PHYS_IN_DATA_SHIFT;
1386 			return 0;
1387 		}
1388 		DELAY(2);
1389 		timeout--;
1390 	} while (timeout > 0);
1391 
1392 	if (reg < 0x7c)
1393 		printf("%s: codec read timeout! (reg %x)\n",
1394 		    device_xname(sc->sc_dev), reg);
1395 
1396 	return 0xffff;
1397 }
1398 
1399 
1400 static int
1401 auixp_write_codec(void *aux, uint8_t reg, uint16_t data)
1402 {
1403 	struct auixp_codec *co;
1404 	struct auixp_softc *sc;
1405 	bus_space_tag_t     iot;
1406 	bus_space_handle_t  ioh;
1407 	uint32_t value;
1408 
1409 	DPRINTF(("write ac'97 codec reg 0x%x = 0x%08x\n", reg, data));
1410 	co  = aux;
1411 	sc  = co->sc;
1412 	iot = sc->sc_iot;
1413 	ioh = sc->sc_ioh;
1414 	if (auixp_wait_for_codecs(sc, "write_codec"))
1415 		return -1;
1416 
1417 	/* build up command for writing codec register */
1418 	value = (((uint32_t) data) << ATI_REG_PHYS_OUT_DATA_SHIFT) |
1419 		(((uint32_t)  reg) << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
1420 		ATI_REG_PHYS_OUT_ADDR_EN |
1421 		co->codec_nr;
1422 
1423 	bus_space_write_4(iot, ioh, ATI_REG_PHYS_OUT_ADDR, value);
1424 
1425 	return 0;
1426 }
1427 
1428 
1429 static int
1430 auixp_reset_codec(void *aux)
1431 {
1432 
1433 	/* nothing to be done? */
1434 	return 0;
1435 }
1436 
1437 
1438 static enum ac97_host_flags
1439 auixp_flags_codec(void *aux)
1440 {
1441 	struct auixp_codec *ixp_codec;
1442 
1443 	ixp_codec = aux;
1444 	return ixp_codec->codec_flags;
1445 }
1446 
1447 
1448 static int
1449 auixp_wait_for_codecs(struct auixp_softc *sc, const char *func)
1450 {
1451 	bus_space_tag_t      iot;
1452 	bus_space_handle_t   ioh;
1453 	uint32_t value;
1454 	int timeout;
1455 
1456 	iot = sc->sc_iot;
1457 	ioh = sc->sc_ioh;
1458 	/* wait until all codec transfers are done */
1459 	timeout = 500;		/* 500*2 usec -> 0.001 sec */
1460 	do {
1461 		value = bus_space_read_4(iot, ioh, ATI_REG_PHYS_OUT_ADDR);
1462 		if ((value & ATI_REG_PHYS_OUT_ADDR_EN) == 0)
1463 			return 0;
1464 
1465 		DELAY(2);
1466 		timeout--;
1467 	} while (timeout > 0);
1468 
1469 	printf("%s: %s: timed out\n", func, device_xname(sc->sc_dev));
1470 	return -1;
1471 }
1472 
1473 
1474 
1475 static void
1476 auixp_autodetect_codecs(struct auixp_softc *sc)
1477 {
1478 	bus_space_tag_t      iot;
1479 	bus_space_handle_t   ioh;
1480 	struct auixp_codec  *codec;
1481 	int timeout, codec_nr;
1482 
1483 	iot = sc->sc_iot;
1484 	ioh = sc->sc_ioh;
1485 	/* ATI IXP can have upto 3 codecs; mark all codecs as not existing */
1486 	sc->sc_codec_not_ready_bits = 0;
1487 	sc->sc_num_codecs = 0;
1488 
1489 	/* enable all codecs to interrupt as well as the new frame interrupt */
1490 	bus_space_write_4(iot, ioh, ATI_REG_IER, CODEC_CHECK_BITS);
1491 
1492 	/* wait for the interrupts to happen */
1493 	timeout = 100;		/* 100.000 usec -> 0.1 sec */
1494 
1495 	while (timeout > 0) {
1496 		DELAY(1000);
1497 		if (sc->sc_codec_not_ready_bits)
1498 			break;
1499 		timeout--;
1500 	}
1501 
1502 	if (timeout == 0)
1503 		printf("%s: WARNING: timeout during codec detection; "
1504 			"codecs might be present but haven't interrupted\n",
1505 			device_xname(sc->sc_dev));
1506 
1507 	/* disable all interrupts for now */
1508 	auixp_disable_interrupts(sc);
1509 
1510 	/* Attach AC97 host interfaces */
1511 	for (codec_nr = 0; codec_nr < ATI_IXP_CODECS; codec_nr++) {
1512 		codec = &sc->sc_codec[codec_nr];
1513 		memset(codec, 0, sizeof(struct auixp_codec));
1514 
1515 		codec->sc       = sc;
1516 		codec->codec_nr = codec_nr;
1517 		codec->present  = 0;
1518 
1519 		codec->host_if.arg    = codec;
1520 		codec->host_if.attach = auixp_attach_codec;
1521 		codec->host_if.read   = auixp_read_codec;
1522 		codec->host_if.write  = auixp_write_codec;
1523 		codec->host_if.reset  = auixp_reset_codec;
1524 		codec->host_if.flags  = auixp_flags_codec;
1525 	}
1526 
1527 	if (!(sc->sc_codec_not_ready_bits & ATI_REG_ISR_CODEC0_NOT_READY)) {
1528 		/* codec 0 present */
1529 		DPRINTF(("auixp : YAY! codec 0 present!\n"));
1530 		if (ac97_attach(&sc->sc_codec[0].host_if, sc->sc_dev,
1531 		    &sc->sc_lock) == 0)
1532 			sc->sc_num_codecs++;
1533 	}
1534 
1535 	if (!(sc->sc_codec_not_ready_bits & ATI_REG_ISR_CODEC1_NOT_READY)) {
1536 		/* codec 1 present */
1537 		DPRINTF(("auixp : YAY! codec 1 present!\n"));
1538 		if (ac97_attach(&sc->sc_codec[1].host_if, sc->sc_dev,
1539 		    &sc->sc_lock) == 0)
1540 			sc->sc_num_codecs++;
1541 	}
1542 
1543 	if (!(sc->sc_codec_not_ready_bits & ATI_REG_ISR_CODEC2_NOT_READY)) {
1544 		/* codec 2 present */
1545 		DPRINTF(("auixp : YAY! codec 2 present!\n"));
1546 		if (ac97_attach(&sc->sc_codec[2].host_if, sc->sc_dev,
1547 		    &sc->sc_lock) == 0)
1548 			sc->sc_num_codecs++;
1549 	}
1550 
1551 	if (sc->sc_num_codecs == 0) {
1552 		printf("%s: no codecs detected or "
1553 				"no codecs managed to initialise\n",
1554 				device_xname(sc->sc_dev));
1555 		return;
1556 	}
1557 
1558 }
1559 
1560 
1561 
1562 /* initialisation routines */
1563 
1564 static void
1565 auixp_disable_dma(struct auixp_softc *sc, struct auixp_dma *dma)
1566 {
1567 	bus_space_tag_t      iot;
1568 	bus_space_handle_t   ioh;
1569 	uint32_t value;
1570 
1571 	iot = sc->sc_iot;
1572 	ioh = sc->sc_ioh;
1573 	/* lets not stress the DMA engine more than nessisary */
1574 	value = bus_space_read_4(iot, ioh, ATI_REG_CMD);
1575 	if (value & dma->dma_enable_bit) {
1576 		value &= ~dma->dma_enable_bit;
1577 		bus_space_write_4(iot, ioh, ATI_REG_CMD, value);
1578 	}
1579 }
1580 
1581 
1582 static void
1583 auixp_enable_dma(struct auixp_softc *sc, struct auixp_dma *dma)
1584 {
1585 	bus_space_tag_t      iot;
1586 	bus_space_handle_t   ioh;
1587 	uint32_t value;
1588 
1589 	iot = sc->sc_iot;
1590 	ioh = sc->sc_ioh;
1591 	/* lets not stress the DMA engine more than nessisary */
1592 	value = bus_space_read_4(iot, ioh, ATI_REG_CMD);
1593 	if (!(value & dma->dma_enable_bit)) {
1594 		value |= dma->dma_enable_bit;
1595 		bus_space_write_4(iot, ioh, ATI_REG_CMD, value);
1596 	}
1597 }
1598 
1599 
1600 static void
1601 auixp_reset_aclink(struct auixp_softc *sc)
1602 {
1603 	bus_space_tag_t      iot;
1604 	bus_space_handle_t   ioh;
1605 	uint32_t value, timeout;
1606 
1607 	iot = sc->sc_iot;
1608 	ioh = sc->sc_ioh;
1609 
1610 	/* if power is down, power it up */
1611 	value = bus_space_read_4(iot, ioh, ATI_REG_CMD);
1612 	if (value & ATI_REG_CMD_POWERDOWN) {
1613 		printf("%s: powering up\n", device_xname(sc->sc_dev));
1614 
1615 		/* explicitly enable power */
1616 		value &= ~ATI_REG_CMD_POWERDOWN;
1617 		bus_space_write_4(iot, ioh, ATI_REG_CMD, value);
1618 
1619 		/* have to wait at least 10 usec for it to initialise */
1620 		DELAY(20);
1621 	};
1622 
1623 	printf("%s: soft resetting aclink\n", device_xname(sc->sc_dev));
1624 
1625 	/* perform a soft reset */
1626 	value  = bus_space_read_4(iot, ioh, ATI_REG_CMD);
1627 	value |= ATI_REG_CMD_AC_SOFT_RESET;
1628 	bus_space_write_4(iot, ioh, ATI_REG_CMD, value);
1629 
1630 	/* need to read the CMD reg and wait aprox. 10 usec to init */
1631 	value  = bus_space_read_4(iot, ioh, ATI_REG_CMD);
1632 	DELAY(20);
1633 
1634 	/* clear soft reset flag again */
1635 	value  = bus_space_read_4(iot, ioh, ATI_REG_CMD);
1636 	value &= ~ATI_REG_CMD_AC_SOFT_RESET;
1637 	bus_space_write_4(iot, ioh, ATI_REG_CMD, value);
1638 
1639 	/* check if the ac-link is working; reset device otherwise */
1640 	timeout = 10;
1641 	value = bus_space_read_4(iot, ioh, ATI_REG_CMD);
1642 	while (!(value & ATI_REG_CMD_ACLINK_ACTIVE)) {
1643 		printf("%s: not up; resetting aclink hardware\n",
1644 			device_xname(sc->sc_dev));
1645 
1646 		/* dip aclink reset but keep the acsync */
1647 		value &= ~ATI_REG_CMD_AC_RESET;
1648 		value |=  ATI_REG_CMD_AC_SYNC;
1649 		bus_space_write_4(iot, ioh, ATI_REG_CMD, value);
1650 
1651 		/* need to read CMD again and wait again (clocking in issue?) */
1652 		value = bus_space_read_4(iot, ioh, ATI_REG_CMD);
1653 		DELAY(20);
1654 
1655 		/* assert aclink reset again */
1656 		value = bus_space_read_4(iot, ioh, ATI_REG_CMD);
1657 		value |=  ATI_REG_CMD_AC_RESET;
1658 		bus_space_write_4(iot, ioh, ATI_REG_CMD, value);
1659 
1660 		/* check if its active now */
1661 		value = bus_space_read_4(iot, ioh, ATI_REG_CMD);
1662 
1663 		timeout--;
1664 		if (timeout == 0) break;
1665 	};
1666 
1667 	if (timeout == 0) {
1668 		printf("%s: giving up aclink reset\n", device_xname(sc->sc_dev));
1669 	};
1670 	if (timeout != 10) {
1671 		printf("%s: aclink hardware reset successful\n",
1672 			device_xname(sc->sc_dev));
1673 	};
1674 
1675 	/* assert reset and sync for safety */
1676 	value  = bus_space_read_4(iot, ioh, ATI_REG_CMD);
1677 	value |= ATI_REG_CMD_AC_SYNC | ATI_REG_CMD_AC_RESET;
1678 	bus_space_write_4(iot, ioh, ATI_REG_CMD, value);
1679 }
1680 
1681 
1682 /* chip hard init */
1683 static int
1684 auixp_init(struct auixp_softc *sc)
1685 {
1686 	bus_space_tag_t      iot;
1687 	bus_space_handle_t   ioh;
1688 	uint32_t value;
1689 
1690 	iot = sc->sc_iot;
1691 	ioh = sc->sc_ioh;
1692 	/* disable all interrupts and clear all sources */
1693 	auixp_disable_interrupts(sc);
1694 
1695 	/* clear all DMA enables (preserving rest of settings) */
1696 	value = bus_space_read_4(iot, ioh, ATI_REG_CMD);
1697 	value &= ~( ATI_REG_CMD_IN_DMA_EN  |
1698 		    ATI_REG_CMD_OUT_DMA_EN |
1699 		    ATI_REG_CMD_SPDF_OUT_EN );
1700 	bus_space_write_4(iot, ioh, ATI_REG_CMD, value);
1701 
1702 	/* Reset AC-link */
1703 	auixp_reset_aclink(sc);
1704 
1705 	/*
1706 	 * codecs get auto-detected later
1707 	 *
1708 	 * note: we are NOT enabling interrupts yet, no codecs have been
1709 	 * detected yet nor is anything else set up
1710 	 */
1711 
1712 	return 0;
1713 }
1714 
1715 static bool
1716 auixp_resume(device_t dv, const pmf_qual_t *qual)
1717 {
1718 	struct auixp_softc *sc = device_private(dv);
1719 
1720 	mutex_enter(&sc->sc_lock);
1721 	auixp_reset_codec(sc);
1722 	delay(1000);
1723 	(sc->sc_codec[0].codec_if->vtbl->restore_ports)(sc->sc_codec[0].codec_if);
1724 	mutex_exit(&sc->sc_lock);
1725 
1726 	return true;
1727 }
1728 
1729 #ifdef DEBUG_AUIXP
1730 
1731 static void
1732 auixp_dumpreg(void)
1733 {
1734 	struct auixp_softc  *sc;
1735 	bus_space_tag_t      iot;
1736 	bus_space_handle_t   ioh;
1737 	int i;
1738 
1739 	sc  = static_sc;
1740 	iot = sc->sc_iot;
1741 	ioh = sc->sc_ioh;
1742 	printf("%s register dump:\n", device_xname(sc->sc_dev));
1743 	for (i = 0; i < 256; i+=4) {
1744 		printf("\t0x%02x: 0x%08x\n", i, bus_space_read_4(iot, ioh, i));
1745 	}
1746 	printf("\n");
1747 }
1748 #endif
1749 
1750 static void
1751 auixp_get_locks(void *addr, kmutex_t **intr, kmutex_t **proc)
1752 {
1753 	struct auixp_codec *co = addr;
1754 	struct auixp_softc *sc = co->sc;
1755 
1756 	*intr = &sc->sc_intr_lock;
1757 	*proc = &sc->sc_lock;
1758 }
1759