1*182157ecSjmcneill /* $NetBSD: pinctrl-tegra-io-pad.h,v 1.1.1.1 2019/01/22 14:57:01 jmcneill Exp $ */ 2*182157ecSjmcneill 3*182157ecSjmcneill /* SPDX-License-Identifier: GPL-2.0 */ 4*182157ecSjmcneill /* 5*182157ecSjmcneill * pinctrl-tegra-io-pad.h: Tegra I/O pad source voltage configuration constants 6*182157ecSjmcneill * pinctrl bindings. 7*182157ecSjmcneill * 8*182157ecSjmcneill * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. 9*182157ecSjmcneill * 10*182157ecSjmcneill * Author: Aapo Vienamo <avienamo@nvidia.com> 11*182157ecSjmcneill */ 12*182157ecSjmcneill 13*182157ecSjmcneill #ifndef _DT_BINDINGS_PINCTRL_TEGRA_IO_PAD_H 14*182157ecSjmcneill #define _DT_BINDINGS_PINCTRL_TEGRA_IO_PAD_H 15*182157ecSjmcneill 16*182157ecSjmcneill /* Voltage levels of the I/O pad's source rail */ 17*182157ecSjmcneill #define TEGRA_IO_PAD_VOLTAGE_1V8 0 18*182157ecSjmcneill #define TEGRA_IO_PAD_VOLTAGE_3V3 1 19*182157ecSjmcneill 20*182157ecSjmcneill #endif 21