1*9ed2a30eSjmcneill /*	$NetBSD: pd.h,v 1.1.1.2 2021/11/07 16:49:57 jmcneill Exp $	*/
2182157ecSjmcneill 
3182157ecSjmcneill /* SPDX-License-Identifier: GPL-2.0 */
4182157ecSjmcneill #ifndef __DT_POWER_DELIVERY_H
5182157ecSjmcneill #define __DT_POWER_DELIVERY_H
6182157ecSjmcneill 
7182157ecSjmcneill /* Power delivery Power Data Object definitions */
8182157ecSjmcneill #define PDO_TYPE_FIXED		0
9182157ecSjmcneill #define PDO_TYPE_BATT		1
10182157ecSjmcneill #define PDO_TYPE_VAR		2
11182157ecSjmcneill #define PDO_TYPE_APDO		3
12182157ecSjmcneill 
13182157ecSjmcneill #define PDO_TYPE_SHIFT		30
14182157ecSjmcneill #define PDO_TYPE_MASK		0x3
15182157ecSjmcneill 
16182157ecSjmcneill #define PDO_TYPE(t)	((t) << PDO_TYPE_SHIFT)
17182157ecSjmcneill 
18182157ecSjmcneill #define PDO_VOLT_MASK		0x3ff
19182157ecSjmcneill #define PDO_CURR_MASK		0x3ff
20182157ecSjmcneill #define PDO_PWR_MASK		0x3ff
21182157ecSjmcneill 
22182157ecSjmcneill #define PDO_FIXED_DUAL_ROLE	(1 << 29) /* Power role swap supported */
23182157ecSjmcneill #define PDO_FIXED_SUSPEND	(1 << 28) /* USB Suspend supported (Source) */
24182157ecSjmcneill #define PDO_FIXED_HIGHER_CAP	(1 << 28) /* Requires more than vSafe5V (Sink) */
25182157ecSjmcneill #define PDO_FIXED_EXTPOWER	(1 << 27) /* Externally powered */
26182157ecSjmcneill #define PDO_FIXED_USB_COMM	(1 << 26) /* USB communications capable */
27182157ecSjmcneill #define PDO_FIXED_DATA_SWAP	(1 << 25) /* Data role swap supported */
28182157ecSjmcneill #define PDO_FIXED_VOLT_SHIFT	10	/* 50mV units */
29182157ecSjmcneill #define PDO_FIXED_CURR_SHIFT	0	/* 10mA units */
30182157ecSjmcneill 
31182157ecSjmcneill #define PDO_FIXED_VOLT(mv)	((((mv) / 50) & PDO_VOLT_MASK) << PDO_FIXED_VOLT_SHIFT)
32182157ecSjmcneill #define PDO_FIXED_CURR(ma)	((((ma) / 10) & PDO_CURR_MASK) << PDO_FIXED_CURR_SHIFT)
33182157ecSjmcneill 
34182157ecSjmcneill #define PDO_FIXED(mv, ma, flags)			\
35182157ecSjmcneill 	(PDO_TYPE(PDO_TYPE_FIXED) | (flags) |		\
36182157ecSjmcneill 	 PDO_FIXED_VOLT(mv) | PDO_FIXED_CURR(ma))
37182157ecSjmcneill 
38182157ecSjmcneill #define VSAFE5V 5000 /* mv units */
39182157ecSjmcneill 
40182157ecSjmcneill #define PDO_BATT_MAX_VOLT_SHIFT	20	/* 50mV units */
41182157ecSjmcneill #define PDO_BATT_MIN_VOLT_SHIFT	10	/* 50mV units */
42182157ecSjmcneill #define PDO_BATT_MAX_PWR_SHIFT	0	/* 250mW units */
43182157ecSjmcneill 
44182157ecSjmcneill #define PDO_BATT_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MIN_VOLT_SHIFT)
45182157ecSjmcneill #define PDO_BATT_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MAX_VOLT_SHIFT)
46182157ecSjmcneill #define PDO_BATT_MAX_POWER(mw) ((((mw) / 250) & PDO_PWR_MASK) << PDO_BATT_MAX_PWR_SHIFT)
47182157ecSjmcneill 
48182157ecSjmcneill #define PDO_BATT(min_mv, max_mv, max_mw)			\
49182157ecSjmcneill 	(PDO_TYPE(PDO_TYPE_BATT) | PDO_BATT_MIN_VOLT(min_mv) |	\
50182157ecSjmcneill 	 PDO_BATT_MAX_VOLT(max_mv) | PDO_BATT_MAX_POWER(max_mw))
51182157ecSjmcneill 
52182157ecSjmcneill #define PDO_VAR_MAX_VOLT_SHIFT	20	/* 50mV units */
53182157ecSjmcneill #define PDO_VAR_MIN_VOLT_SHIFT	10	/* 50mV units */
54182157ecSjmcneill #define PDO_VAR_MAX_CURR_SHIFT	0	/* 10mA units */
55182157ecSjmcneill 
56182157ecSjmcneill #define PDO_VAR_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MIN_VOLT_SHIFT)
57182157ecSjmcneill #define PDO_VAR_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MAX_VOLT_SHIFT)
58182157ecSjmcneill #define PDO_VAR_MAX_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_VAR_MAX_CURR_SHIFT)
59182157ecSjmcneill 
60182157ecSjmcneill #define PDO_VAR(min_mv, max_mv, max_ma)				\
61182157ecSjmcneill 	(PDO_TYPE(PDO_TYPE_VAR) | PDO_VAR_MIN_VOLT(min_mv) |	\
62182157ecSjmcneill 	 PDO_VAR_MAX_VOLT(max_mv) | PDO_VAR_MAX_CURR(max_ma))
63182157ecSjmcneill 
64182157ecSjmcneill #define APDO_TYPE_PPS		0
65182157ecSjmcneill 
66182157ecSjmcneill #define PDO_APDO_TYPE_SHIFT	28	/* Only valid value currently is 0x0 - PPS */
67182157ecSjmcneill #define PDO_APDO_TYPE_MASK	0x3
68182157ecSjmcneill 
69182157ecSjmcneill #define PDO_APDO_TYPE(t)	((t) << PDO_APDO_TYPE_SHIFT)
70182157ecSjmcneill 
71182157ecSjmcneill #define PDO_PPS_APDO_MAX_VOLT_SHIFT	17	/* 100mV units */
72182157ecSjmcneill #define PDO_PPS_APDO_MIN_VOLT_SHIFT	8	/* 100mV units */
73182157ecSjmcneill #define PDO_PPS_APDO_MAX_CURR_SHIFT	0	/* 50mA units */
74182157ecSjmcneill 
75182157ecSjmcneill #define PDO_PPS_APDO_VOLT_MASK	0xff
76182157ecSjmcneill #define PDO_PPS_APDO_CURR_MASK	0x7f
77182157ecSjmcneill 
78182157ecSjmcneill #define PDO_PPS_APDO_MIN_VOLT(mv)	\
79182157ecSjmcneill 	((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MIN_VOLT_SHIFT)
80182157ecSjmcneill #define PDO_PPS_APDO_MAX_VOLT(mv)	\
81182157ecSjmcneill 	((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MAX_VOLT_SHIFT)
82182157ecSjmcneill #define PDO_PPS_APDO_MAX_CURR(ma)	\
83182157ecSjmcneill 	((((ma) / 50) & PDO_PPS_APDO_CURR_MASK) << PDO_PPS_APDO_MAX_CURR_SHIFT)
84182157ecSjmcneill 
85182157ecSjmcneill #define PDO_PPS_APDO(min_mv, max_mv, max_ma)					\
86182157ecSjmcneill 	(PDO_TYPE(PDO_TYPE_APDO) | PDO_APDO_TYPE(APDO_TYPE_PPS) |		\
87182157ecSjmcneill 	 PDO_PPS_APDO_MIN_VOLT(min_mv) | PDO_PPS_APDO_MAX_VOLT(max_mv) |	\
88182157ecSjmcneill 	 PDO_PPS_APDO_MAX_CURR(max_ma))
89182157ecSjmcneill 
90*9ed2a30eSjmcneill  /*
91*9ed2a30eSjmcneill   * Based on "Table 6-14 Fixed Supply PDO - Sink" of "USB Power Delivery Specification Revision 3.0,
92*9ed2a30eSjmcneill   * Version 1.2"
93*9ed2a30eSjmcneill   * Initial current capability of the new source when vSafe5V is applied.
94*9ed2a30eSjmcneill   */
95*9ed2a30eSjmcneill #define FRS_DEFAULT_POWER      1
96*9ed2a30eSjmcneill #define FRS_5V_1P5A            2
97*9ed2a30eSjmcneill #define FRS_5V_3A              3
98*9ed2a30eSjmcneill 
99*9ed2a30eSjmcneill /*
100*9ed2a30eSjmcneill  * SVDM Identity Header
101*9ed2a30eSjmcneill  * --------------------
102*9ed2a30eSjmcneill  * <31>     :: data capable as a USB host
103*9ed2a30eSjmcneill  * <30>     :: data capable as a USB device
104*9ed2a30eSjmcneill  * <29:27>  :: product type (UFP / Cable / VPD)
105*9ed2a30eSjmcneill  * <26>     :: modal operation supported (1b == yes)
106*9ed2a30eSjmcneill  * <25:23>  :: product type (DFP) (SVDM version 2.0+ only; set to zero in version 1.0)
107*9ed2a30eSjmcneill  * <22:21>  :: connector type (SVDM version 2.0+ only; set to zero in version 1.0)
108*9ed2a30eSjmcneill  * <20:16>  :: Reserved, Shall be set to zero
109*9ed2a30eSjmcneill  * <15:0>   :: USB-IF assigned VID for this cable vendor
110*9ed2a30eSjmcneill  */
111*9ed2a30eSjmcneill 
112*9ed2a30eSjmcneill /* PD Rev2.0 definition */
113*9ed2a30eSjmcneill #define IDH_PTYPE_UNDEF		0
114*9ed2a30eSjmcneill 
115*9ed2a30eSjmcneill /* SOP Product Type (UFP) */
116*9ed2a30eSjmcneill #define IDH_PTYPE_NOT_UFP       0
117*9ed2a30eSjmcneill #define IDH_PTYPE_HUB           1
118*9ed2a30eSjmcneill #define IDH_PTYPE_PERIPH        2
119*9ed2a30eSjmcneill #define IDH_PTYPE_PSD           3
120*9ed2a30eSjmcneill #define IDH_PTYPE_AMA           5
121*9ed2a30eSjmcneill 
122*9ed2a30eSjmcneill /* SOP' Product Type (Cable Plug / VPD) */
123*9ed2a30eSjmcneill #define IDH_PTYPE_NOT_CABLE     0
124*9ed2a30eSjmcneill #define IDH_PTYPE_PCABLE        3
125*9ed2a30eSjmcneill #define IDH_PTYPE_ACABLE        4
126*9ed2a30eSjmcneill #define IDH_PTYPE_VPD           6
127*9ed2a30eSjmcneill 
128*9ed2a30eSjmcneill /* SOP Product Type (DFP) */
129*9ed2a30eSjmcneill #define IDH_PTYPE_NOT_DFP       0
130*9ed2a30eSjmcneill #define IDH_PTYPE_DFP_HUB       1
131*9ed2a30eSjmcneill #define IDH_PTYPE_DFP_HOST      2
132*9ed2a30eSjmcneill #define IDH_PTYPE_DFP_PB        3
133*9ed2a30eSjmcneill 
134*9ed2a30eSjmcneill #define VDO_IDH(usbh, usbd, ufp_cable, is_modal, dfp, conn, vid)                \
135*9ed2a30eSjmcneill 	((usbh) << 31 | (usbd) << 30 | ((ufp_cable) & 0x7) << 27                \
136*9ed2a30eSjmcneill 	 | (is_modal) << 26 | ((dfp) & 0x7) << 23 | ((conn) & 0x3) << 21        \
137*9ed2a30eSjmcneill 	 | ((vid) & 0xffff))
138*9ed2a30eSjmcneill 
139*9ed2a30eSjmcneill /*
140*9ed2a30eSjmcneill  * Cert Stat VDO
141*9ed2a30eSjmcneill  * -------------
142*9ed2a30eSjmcneill  * <31:0>  : USB-IF assigned XID for this cable
143*9ed2a30eSjmcneill  */
144*9ed2a30eSjmcneill #define VDO_CERT(xid)		((xid) & 0xffffffff)
145*9ed2a30eSjmcneill 
146*9ed2a30eSjmcneill /*
147*9ed2a30eSjmcneill  * Product VDO
148*9ed2a30eSjmcneill  * -----------
149*9ed2a30eSjmcneill  * <31:16> : USB Product ID
150*9ed2a30eSjmcneill  * <15:0>  : USB bcdDevice
151*9ed2a30eSjmcneill  */
152*9ed2a30eSjmcneill #define VDO_PRODUCT(pid, bcd)   (((pid) & 0xffff) << 16 | ((bcd) & 0xffff))
153*9ed2a30eSjmcneill 
154*9ed2a30eSjmcneill /*
155*9ed2a30eSjmcneill  * UFP VDO (PD Revision 3.0+ only)
156*9ed2a30eSjmcneill  * --------
157*9ed2a30eSjmcneill  * <31:29> :: UFP VDO version
158*9ed2a30eSjmcneill  * <28>    :: Reserved
159*9ed2a30eSjmcneill  * <27:24> :: Device capability
160*9ed2a30eSjmcneill  * <23:22> :: Connector type (10b == receptacle, 11b == captive plug)
161*9ed2a30eSjmcneill  * <21:11> :: Reserved
162*9ed2a30eSjmcneill  * <10:8>  :: Vconn power (AMA only)
163*9ed2a30eSjmcneill  * <7>     :: Vconn required (AMA only, 0b == no, 1b == yes)
164*9ed2a30eSjmcneill  * <6>     :: Vbus required (AMA only, 0b == yes, 1b == no)
165*9ed2a30eSjmcneill  * <5:3>   :: Alternate modes
166*9ed2a30eSjmcneill  * <2:0>   :: USB highest speed
167*9ed2a30eSjmcneill  */
168*9ed2a30eSjmcneill /* UFP VDO Version */
169*9ed2a30eSjmcneill #define UFP_VDO_VER1_2		2
170*9ed2a30eSjmcneill 
171*9ed2a30eSjmcneill /* Device Capability */
172*9ed2a30eSjmcneill #define DEV_USB2_CAPABLE	(1 << 0)
173*9ed2a30eSjmcneill #define DEV_USB2_BILLBOARD	(1 << 1)
174*9ed2a30eSjmcneill #define DEV_USB3_CAPABLE	(1 << 2)
175*9ed2a30eSjmcneill #define DEV_USB4_CAPABLE	(1 << 3)
176*9ed2a30eSjmcneill 
177*9ed2a30eSjmcneill /* Connector Type */
178*9ed2a30eSjmcneill #define UFP_RECEPTACLE		2
179*9ed2a30eSjmcneill #define UFP_CAPTIVE		3
180*9ed2a30eSjmcneill 
181*9ed2a30eSjmcneill /* Vconn Power (AMA only, set to AMA_VCONN_NOT_REQ if Vconn is not required) */
182*9ed2a30eSjmcneill #define AMA_VCONN_PWR_1W	0
183*9ed2a30eSjmcneill #define AMA_VCONN_PWR_1W5	1
184*9ed2a30eSjmcneill #define AMA_VCONN_PWR_2W	2
185*9ed2a30eSjmcneill #define AMA_VCONN_PWR_3W	3
186*9ed2a30eSjmcneill #define AMA_VCONN_PWR_4W	4
187*9ed2a30eSjmcneill #define AMA_VCONN_PWR_5W	5
188*9ed2a30eSjmcneill #define AMA_VCONN_PWR_6W	6
189*9ed2a30eSjmcneill 
190*9ed2a30eSjmcneill /* Vconn Required (AMA only) */
191*9ed2a30eSjmcneill #define AMA_VCONN_NOT_REQ	0
192*9ed2a30eSjmcneill #define AMA_VCONN_REQ		1
193*9ed2a30eSjmcneill 
194*9ed2a30eSjmcneill /* Vbus Required (AMA only) */
195*9ed2a30eSjmcneill #define AMA_VBUS_REQ		0
196*9ed2a30eSjmcneill #define AMA_VBUS_NOT_REQ	1
197*9ed2a30eSjmcneill 
198*9ed2a30eSjmcneill /* Alternate Modes */
199*9ed2a30eSjmcneill #define UFP_ALTMODE_NOT_SUPP	0
200*9ed2a30eSjmcneill #define UFP_ALTMODE_TBT3	(1 << 0)
201*9ed2a30eSjmcneill #define UFP_ALTMODE_RECFG	(1 << 1)
202*9ed2a30eSjmcneill #define UFP_ALTMODE_NO_RECFG	(1 << 2)
203*9ed2a30eSjmcneill 
204*9ed2a30eSjmcneill /* USB Highest Speed */
205*9ed2a30eSjmcneill #define UFP_USB2_ONLY		0
206*9ed2a30eSjmcneill #define UFP_USB32_GEN1		1
207*9ed2a30eSjmcneill #define UFP_USB32_4_GEN2	2
208*9ed2a30eSjmcneill #define UFP_USB4_GEN3		3
209*9ed2a30eSjmcneill 
210*9ed2a30eSjmcneill #define VDO_UFP(ver, cap, conn, vcpwr, vcr, vbr, alt, spd)			\
211*9ed2a30eSjmcneill 	(((ver) & 0x7) << 29 | ((cap) & 0xf) << 24 | ((conn) & 0x3) << 22	\
212*9ed2a30eSjmcneill 	 | ((vcpwr) & 0x7) << 8 | (vcr) << 7 | (vbr) << 6 | ((alt) & 0x7) << 3	\
213*9ed2a30eSjmcneill 	 | ((spd) & 0x7))
214*9ed2a30eSjmcneill 
215*9ed2a30eSjmcneill /*
216*9ed2a30eSjmcneill  * DFP VDO (PD Revision 3.0+ only)
217*9ed2a30eSjmcneill  * --------
218*9ed2a30eSjmcneill  * <31:29> :: DFP VDO version
219*9ed2a30eSjmcneill  * <28:27> :: Reserved
220*9ed2a30eSjmcneill  * <26:24> :: Host capability
221*9ed2a30eSjmcneill  * <23:22> :: Connector type (10b == receptacle, 11b == captive plug)
222*9ed2a30eSjmcneill  * <21:5>  :: Reserved
223*9ed2a30eSjmcneill  * <4:0>   :: Port number
224*9ed2a30eSjmcneill  */
225*9ed2a30eSjmcneill #define DFP_VDO_VER1_1		1
226*9ed2a30eSjmcneill #define HOST_USB2_CAPABLE	(1 << 0)
227*9ed2a30eSjmcneill #define HOST_USB3_CAPABLE	(1 << 1)
228*9ed2a30eSjmcneill #define HOST_USB4_CAPABLE	(1 << 2)
229*9ed2a30eSjmcneill #define DFP_RECEPTACLE		2
230*9ed2a30eSjmcneill #define DFP_CAPTIVE		3
231*9ed2a30eSjmcneill 
232*9ed2a30eSjmcneill #define VDO_DFP(ver, cap, conn, pnum)						\
233*9ed2a30eSjmcneill 	(((ver) & 0x7) << 29 | ((cap) & 0x7) << 24 | ((conn) & 0x3) << 22	\
234*9ed2a30eSjmcneill 	 | ((pnum) & 0x1f))
235*9ed2a30eSjmcneill 
236*9ed2a30eSjmcneill /*
237*9ed2a30eSjmcneill  * Cable VDO (for both Passive and Active Cable VDO in PD Rev2.0)
238*9ed2a30eSjmcneill  * ---------
239*9ed2a30eSjmcneill  * <31:28> :: Cable HW version
240*9ed2a30eSjmcneill  * <27:24> :: Cable FW version
241*9ed2a30eSjmcneill  * <23:20> :: Reserved, Shall be set to zero
242*9ed2a30eSjmcneill  * <19:18> :: type-C to Type-A/B/C/Captive (00b == A, 01 == B, 10 == C, 11 == Captive)
243*9ed2a30eSjmcneill  * <17>    :: Reserved, Shall be set to zero
244*9ed2a30eSjmcneill  * <16:13> :: cable latency (0001 == <10ns(~1m length))
245*9ed2a30eSjmcneill  * <12:11> :: cable termination type (11b == both ends active VCONN req)
246*9ed2a30eSjmcneill  * <10>    :: SSTX1 Directionality support (0b == fixed, 1b == cfgable)
247*9ed2a30eSjmcneill  * <9>     :: SSTX2 Directionality support
248*9ed2a30eSjmcneill  * <8>     :: SSRX1 Directionality support
249*9ed2a30eSjmcneill  * <7>     :: SSRX2 Directionality support
250*9ed2a30eSjmcneill  * <6:5>   :: Vbus current handling capability (01b == 3A, 10b == 5A)
251*9ed2a30eSjmcneill  * <4>     :: Vbus through cable (0b == no, 1b == yes)
252*9ed2a30eSjmcneill  * <3>     :: SOP" controller present? (0b == no, 1b == yes)
253*9ed2a30eSjmcneill  * <2:0>   :: USB SS Signaling support
254*9ed2a30eSjmcneill  *
255*9ed2a30eSjmcneill  * Passive Cable VDO (PD Rev3.0+)
256*9ed2a30eSjmcneill  * ---------
257*9ed2a30eSjmcneill  * <31:28> :: Cable HW version
258*9ed2a30eSjmcneill  * <27:24> :: Cable FW version
259*9ed2a30eSjmcneill  * <23:21> :: VDO version
260*9ed2a30eSjmcneill  * <20>    :: Reserved, Shall be set to zero
261*9ed2a30eSjmcneill  * <19:18> :: Type-C to Type-C/Captive (10b == C, 11b == Captive)
262*9ed2a30eSjmcneill  * <17>    :: Reserved, Shall be set to zero
263*9ed2a30eSjmcneill  * <16:13> :: cable latency (0001 == <10ns(~1m length))
264*9ed2a30eSjmcneill  * <12:11> :: cable termination type (10b == Vconn not req, 01b == Vconn req)
265*9ed2a30eSjmcneill  * <10:9>  :: Maximum Vbus voltage (00b == 20V, 01b == 30V, 10b == 40V, 11b == 50V)
266*9ed2a30eSjmcneill  * <8:7>   :: Reserved, Shall be set to zero
267*9ed2a30eSjmcneill  * <6:5>   :: Vbus current handling capability (01b == 3A, 10b == 5A)
268*9ed2a30eSjmcneill  * <4:3>   :: Reserved, Shall be set to zero
269*9ed2a30eSjmcneill  * <2:0>   :: USB highest speed
270*9ed2a30eSjmcneill  *
271*9ed2a30eSjmcneill  * Active Cable VDO 1 (PD Rev3.0+)
272*9ed2a30eSjmcneill  * ---------
273*9ed2a30eSjmcneill  * <31:28> :: Cable HW version
274*9ed2a30eSjmcneill  * <27:24> :: Cable FW version
275*9ed2a30eSjmcneill  * <23:21> :: VDO version
276*9ed2a30eSjmcneill  * <20>    :: Reserved, Shall be set to zero
277*9ed2a30eSjmcneill  * <19:18> :: Connector type (10b == C, 11b == Captive)
278*9ed2a30eSjmcneill  * <17>    :: Reserved, Shall be set to zero
279*9ed2a30eSjmcneill  * <16:13> :: cable latency (0001 == <10ns(~1m length))
280*9ed2a30eSjmcneill  * <12:11> :: cable termination type (10b == one end active, 11b == both ends active VCONN req)
281*9ed2a30eSjmcneill  * <10:9>  :: Maximum Vbus voltage (00b == 20V, 01b == 30V, 10b == 40V, 11b == 50V)
282*9ed2a30eSjmcneill  * <8>     :: SBU supported (0b == supported, 1b == not supported)
283*9ed2a30eSjmcneill  * <7>     :: SBU type (0b == passive, 1b == active)
284*9ed2a30eSjmcneill  * <6:5>   :: Vbus current handling capability (01b == 3A, 10b == 5A)
285*9ed2a30eSjmcneill  * <4>     :: Vbus through cable (0b == no, 1b == yes)
286*9ed2a30eSjmcneill  * <3>     :: SOP" controller present? (0b == no, 1b == yes)
287*9ed2a30eSjmcneill  * <2:0>   :: USB highest speed
288*9ed2a30eSjmcneill  */
289*9ed2a30eSjmcneill /* Cable VDO Version */
290*9ed2a30eSjmcneill #define CABLE_VDO_VER1_0	0
291*9ed2a30eSjmcneill #define CABLE_VDO_VER1_3	3
292*9ed2a30eSjmcneill 
293*9ed2a30eSjmcneill /* Connector Type (_ATYPE and _BTYPE are for PD Rev2.0 only) */
294*9ed2a30eSjmcneill #define CABLE_ATYPE		0
295*9ed2a30eSjmcneill #define CABLE_BTYPE		1
296*9ed2a30eSjmcneill #define CABLE_CTYPE		2
297*9ed2a30eSjmcneill #define CABLE_CAPTIVE		3
298*9ed2a30eSjmcneill 
299*9ed2a30eSjmcneill /* Cable Latency */
300*9ed2a30eSjmcneill #define CABLE_LATENCY_1M	1
301*9ed2a30eSjmcneill #define CABLE_LATENCY_2M	2
302*9ed2a30eSjmcneill #define CABLE_LATENCY_3M	3
303*9ed2a30eSjmcneill #define CABLE_LATENCY_4M	4
304*9ed2a30eSjmcneill #define CABLE_LATENCY_5M	5
305*9ed2a30eSjmcneill #define CABLE_LATENCY_6M	6
306*9ed2a30eSjmcneill #define CABLE_LATENCY_7M	7
307*9ed2a30eSjmcneill #define CABLE_LATENCY_7M_PLUS	8
308*9ed2a30eSjmcneill 
309*9ed2a30eSjmcneill /* Cable Termination Type */
310*9ed2a30eSjmcneill #define PCABLE_VCONN_NOT_REQ	0
311*9ed2a30eSjmcneill #define PCABLE_VCONN_REQ	1
312*9ed2a30eSjmcneill #define ACABLE_ONE_END		2
313*9ed2a30eSjmcneill #define ACABLE_BOTH_END		3
314*9ed2a30eSjmcneill 
315*9ed2a30eSjmcneill /* Maximum Vbus Voltage */
316*9ed2a30eSjmcneill #define CABLE_MAX_VBUS_20V	0
317*9ed2a30eSjmcneill #define CABLE_MAX_VBUS_30V	1
318*9ed2a30eSjmcneill #define CABLE_MAX_VBUS_40V	2
319*9ed2a30eSjmcneill #define CABLE_MAX_VBUS_50V	3
320*9ed2a30eSjmcneill 
321*9ed2a30eSjmcneill /* Active Cable SBU Supported/Type */
322*9ed2a30eSjmcneill #define ACABLE_SBU_SUPP		0
323*9ed2a30eSjmcneill #define ACABLE_SBU_NOT_SUPP	1
324*9ed2a30eSjmcneill #define ACABLE_SBU_PASSIVE	0
325*9ed2a30eSjmcneill #define ACABLE_SBU_ACTIVE	1
326*9ed2a30eSjmcneill 
327*9ed2a30eSjmcneill /* Vbus Current Handling Capability */
328*9ed2a30eSjmcneill #define CABLE_CURR_DEF		0
329*9ed2a30eSjmcneill #define CABLE_CURR_3A		1
330*9ed2a30eSjmcneill #define CABLE_CURR_5A		2
331*9ed2a30eSjmcneill 
332*9ed2a30eSjmcneill /* USB SuperSpeed Signaling Support (PD Rev2.0) */
333*9ed2a30eSjmcneill #define CABLE_USBSS_U2_ONLY	0
334*9ed2a30eSjmcneill #define CABLE_USBSS_U31_GEN1	1
335*9ed2a30eSjmcneill #define CABLE_USBSS_U31_GEN2	2
336*9ed2a30eSjmcneill 
337*9ed2a30eSjmcneill /* USB Highest Speed */
338*9ed2a30eSjmcneill #define CABLE_USB2_ONLY		0
339*9ed2a30eSjmcneill #define CABLE_USB32_GEN1	1
340*9ed2a30eSjmcneill #define CABLE_USB32_4_GEN2	2
341*9ed2a30eSjmcneill #define CABLE_USB4_GEN3		3
342*9ed2a30eSjmcneill 
343*9ed2a30eSjmcneill #define VDO_CABLE(hw, fw, cbl, lat, term, tx1d, tx2d, rx1d, rx2d, cur, vps, sopp, usbss) \
344*9ed2a30eSjmcneill 	(((hw) & 0x7) << 28 | ((fw) & 0x7) << 24 | ((cbl) & 0x3) << 18		\
345*9ed2a30eSjmcneill 	 | ((lat) & 0x7) << 13 | ((term) & 0x3) << 11 | (tx1d) << 10		\
346*9ed2a30eSjmcneill 	 | (tx2d) << 9 | (rx1d) << 8 | (rx2d) << 7 | ((cur) & 0x3) << 5		\
347*9ed2a30eSjmcneill 	 | (vps) << 4 | (sopp) << 3 | ((usbss) & 0x7))
348*9ed2a30eSjmcneill #define VDO_PCABLE(hw, fw, ver, conn, lat, term, vbm, cur, spd)			\
349*9ed2a30eSjmcneill 	(((hw) & 0xf) << 28 | ((fw) & 0xf) << 24 | ((ver) & 0x7) << 21		\
350*9ed2a30eSjmcneill 	 | ((conn) & 0x3) << 18 | ((lat) & 0xf) << 13 | ((term) & 0x3) << 11	\
351*9ed2a30eSjmcneill 	 | ((vbm) & 0x3) << 9 | ((cur) & 0x3) << 5 | ((spd) & 0x7))
352*9ed2a30eSjmcneill #define VDO_ACABLE1(hw, fw, ver, conn, lat, term, vbm, sbu, sbut, cur, vbt, sopp, spd) \
353*9ed2a30eSjmcneill 	(((hw) & 0xf) << 28 | ((fw) & 0xf) << 24 | ((ver) & 0x7) << 21		\
354*9ed2a30eSjmcneill 	 | ((conn) & 0x3) << 18	| ((lat) & 0xf) << 13 | ((term) & 0x3) << 11	\
355*9ed2a30eSjmcneill 	 | ((vbm) & 0x3) << 9 | (sbu) << 8 | (sbut) << 7 | ((cur) & 0x3) << 5	\
356*9ed2a30eSjmcneill 	 | (vbt) << 4 | (sopp) << 3 | ((spd) & 0x7))
357*9ed2a30eSjmcneill 
358*9ed2a30eSjmcneill /*
359*9ed2a30eSjmcneill  * Active Cable VDO 2
360*9ed2a30eSjmcneill  * ---------
361*9ed2a30eSjmcneill  * <31:24> :: Maximum operating temperature
362*9ed2a30eSjmcneill  * <23:16> :: Shutdown temperature
363*9ed2a30eSjmcneill  * <15>    :: Reserved, Shall be set to zero
364*9ed2a30eSjmcneill  * <14:12> :: U3/CLd power
365*9ed2a30eSjmcneill  * <11>    :: U3 to U0 transition mode (0b == direct, 1b == through U3S)
366*9ed2a30eSjmcneill  * <10>    :: Physical connection (0b == copper, 1b == optical)
367*9ed2a30eSjmcneill  * <9>     :: Active element (0b == redriver, 1b == retimer)
368*9ed2a30eSjmcneill  * <8>     :: USB4 supported (0b == yes, 1b == no)
369*9ed2a30eSjmcneill  * <7:6>   :: USB2 hub hops consumed
370*9ed2a30eSjmcneill  * <5>     :: USB2 supported (0b == yes, 1b == no)
371*9ed2a30eSjmcneill  * <4>     :: USB3.2 supported (0b == yes, 1b == no)
372*9ed2a30eSjmcneill  * <3>     :: USB lanes supported (0b == one lane, 1b == two lanes)
373*9ed2a30eSjmcneill  * <2>     :: Optically isolated active cable (0b == no, 1b == yes)
374*9ed2a30eSjmcneill  * <1>     :: Reserved, Shall be set to zero
375*9ed2a30eSjmcneill  * <0>     :: USB gen (0b == gen1, 1b == gen2+)
376*9ed2a30eSjmcneill  */
377*9ed2a30eSjmcneill /* U3/CLd Power*/
378*9ed2a30eSjmcneill #define ACAB2_U3_CLD_10MW_PLUS	0
379*9ed2a30eSjmcneill #define ACAB2_U3_CLD_10MW	1
380*9ed2a30eSjmcneill #define ACAB2_U3_CLD_5MW	2
381*9ed2a30eSjmcneill #define ACAB2_U3_CLD_1MW	3
382*9ed2a30eSjmcneill #define ACAB2_U3_CLD_500UW	4
383*9ed2a30eSjmcneill #define ACAB2_U3_CLD_200UW	5
384*9ed2a30eSjmcneill #define ACAB2_U3_CLD_50UW	6
385*9ed2a30eSjmcneill 
386*9ed2a30eSjmcneill /* Other Active Cable VDO 2 Fields */
387*9ed2a30eSjmcneill #define ACAB2_U3U0_DIRECT	0
388*9ed2a30eSjmcneill #define ACAB2_U3U0_U3S		1
389*9ed2a30eSjmcneill #define ACAB2_PHY_COPPER	0
390*9ed2a30eSjmcneill #define ACAB2_PHY_OPTICAL	1
391*9ed2a30eSjmcneill #define ACAB2_REDRIVER		0
392*9ed2a30eSjmcneill #define ACAB2_RETIMER		1
393*9ed2a30eSjmcneill #define ACAB2_USB4_SUPP		0
394*9ed2a30eSjmcneill #define ACAB2_USB4_NOT_SUPP	1
395*9ed2a30eSjmcneill #define ACAB2_USB2_SUPP		0
396*9ed2a30eSjmcneill #define ACAB2_USB2_NOT_SUPP	1
397*9ed2a30eSjmcneill #define ACAB2_USB32_SUPP	0
398*9ed2a30eSjmcneill #define ACAB2_USB32_NOT_SUPP	1
399*9ed2a30eSjmcneill #define ACAB2_LANES_ONE		0
400*9ed2a30eSjmcneill #define ACAB2_LANES_TWO		1
401*9ed2a30eSjmcneill #define ACAB2_OPT_ISO_NO	0
402*9ed2a30eSjmcneill #define ACAB2_OPT_ISO_YES	1
403*9ed2a30eSjmcneill #define ACAB2_GEN_1		0
404*9ed2a30eSjmcneill #define ACAB2_GEN_2_PLUS	1
405*9ed2a30eSjmcneill 
406*9ed2a30eSjmcneill #define VDO_ACABLE2(mtemp, stemp, u3p, trans, phy, ele, u4, hops, u2, u32, lane, iso, gen)	\
407*9ed2a30eSjmcneill 	(((mtemp) & 0xff) << 24 | ((stemp) & 0xff) << 16 | ((u3p) & 0x7) << 12	\
408*9ed2a30eSjmcneill 	 | (trans) << 11 | (phy) << 10 | (ele) << 9 | (u4) << 8			\
409*9ed2a30eSjmcneill 	 | ((hops) & 0x3) << 6 | (u2) << 5 | (u32) << 4 | (lane) << 3		\
410*9ed2a30eSjmcneill 	 | (iso) << 2 | (gen))
411*9ed2a30eSjmcneill 
412*9ed2a30eSjmcneill /*
413*9ed2a30eSjmcneill  * AMA VDO (PD Rev2.0)
414*9ed2a30eSjmcneill  * ---------
415*9ed2a30eSjmcneill  * <31:28> :: Cable HW version
416*9ed2a30eSjmcneill  * <27:24> :: Cable FW version
417*9ed2a30eSjmcneill  * <23:12> :: Reserved, Shall be set to zero
418*9ed2a30eSjmcneill  * <11>    :: SSTX1 Directionality support (0b == fixed, 1b == cfgable)
419*9ed2a30eSjmcneill  * <10>    :: SSTX2 Directionality support
420*9ed2a30eSjmcneill  * <9>     :: SSRX1 Directionality support
421*9ed2a30eSjmcneill  * <8>     :: SSRX2 Directionality support
422*9ed2a30eSjmcneill  * <7:5>   :: Vconn power
423*9ed2a30eSjmcneill  * <4>     :: Vconn power required
424*9ed2a30eSjmcneill  * <3>     :: Vbus power required
425*9ed2a30eSjmcneill  * <2:0>   :: USB SS Signaling support
426*9ed2a30eSjmcneill  */
427*9ed2a30eSjmcneill #define VDO_AMA(hw, fw, tx1d, tx2d, rx1d, rx2d, vcpwr, vcr, vbr, usbss) \
428*9ed2a30eSjmcneill 	(((hw) & 0x7) << 28 | ((fw) & 0x7) << 24			\
429*9ed2a30eSjmcneill 	 | (tx1d) << 11 | (tx2d) << 10 | (rx1d) << 9 | (rx2d) << 8	\
430*9ed2a30eSjmcneill 	 | ((vcpwr) & 0x7) << 5 | (vcr) << 4 | (vbr) << 3		\
431*9ed2a30eSjmcneill 	 | ((usbss) & 0x7))
432*9ed2a30eSjmcneill 
433*9ed2a30eSjmcneill #define PD_VDO_AMA_VCONN_REQ(vdo)	(((vdo) >> 4) & 1)
434*9ed2a30eSjmcneill #define PD_VDO_AMA_VBUS_REQ(vdo)	(((vdo) >> 3) & 1)
435*9ed2a30eSjmcneill 
436*9ed2a30eSjmcneill #define AMA_USBSS_U2_ONLY	0
437*9ed2a30eSjmcneill #define AMA_USBSS_U31_GEN1	1
438*9ed2a30eSjmcneill #define AMA_USBSS_U31_GEN2	2
439*9ed2a30eSjmcneill #define AMA_USBSS_BBONLY	3
440*9ed2a30eSjmcneill 
441*9ed2a30eSjmcneill /*
442*9ed2a30eSjmcneill  * VPD VDO
443*9ed2a30eSjmcneill  * ---------
444*9ed2a30eSjmcneill  * <31:28> :: HW version
445*9ed2a30eSjmcneill  * <27:24> :: FW version
446*9ed2a30eSjmcneill  * <23:21> :: VDO version
447*9ed2a30eSjmcneill  * <20:17> :: Reserved, Shall be set to zero
448*9ed2a30eSjmcneill  * <16:15> :: Maximum Vbus voltage (00b == 20V, 01b == 30V, 10b == 40V, 11b == 50V)
449*9ed2a30eSjmcneill  * <14>    :: Charge through current support (0b == 3A, 1b == 5A)
450*9ed2a30eSjmcneill  * <13>    :: Reserved, Shall be set to zero
451*9ed2a30eSjmcneill  * <12:7>  :: Vbus impedance
452*9ed2a30eSjmcneill  * <6:1>   :: Ground impedance
453*9ed2a30eSjmcneill  * <0>     :: Charge through support (0b == no, 1b == yes)
454*9ed2a30eSjmcneill  */
455*9ed2a30eSjmcneill #define VPD_VDO_VER1_0		0
456*9ed2a30eSjmcneill #define VPD_MAX_VBUS_20V	0
457*9ed2a30eSjmcneill #define VPD_MAX_VBUS_30V	1
458*9ed2a30eSjmcneill #define VPD_MAX_VBUS_40V	2
459*9ed2a30eSjmcneill #define VPD_MAX_VBUS_50V	3
460*9ed2a30eSjmcneill #define VPDCT_CURR_3A		0
461*9ed2a30eSjmcneill #define VPDCT_CURR_5A		1
462*9ed2a30eSjmcneill #define VPDCT_NOT_SUPP		0
463*9ed2a30eSjmcneill #define VPDCT_SUPP		1
464*9ed2a30eSjmcneill 
465*9ed2a30eSjmcneill #define VDO_VPD(hw, fw, ver, vbm, curr, vbi, gi, ct)			\
466*9ed2a30eSjmcneill 	(((hw) & 0xf) << 28 | ((fw) & 0xf) << 24 | ((ver) & 0x7) << 21	\
467*9ed2a30eSjmcneill 	 | ((vbm) & 0x3) << 15 | (curr) << 14 | ((vbi) & 0x3f) << 7	\
468*9ed2a30eSjmcneill 	 | ((gi) & 0x3f) << 1 | (ct))
469*9ed2a30eSjmcneill 
470182157ecSjmcneill #endif /* __DT_POWER_DELIVERY_H */
471