109467b48Spatrick.. 209467b48Spatrick ************************************************** 309467b48Spatrick * * 409467b48Spatrick * Automatically generated file, do not edit! * 509467b48Spatrick * * 609467b48Spatrick ************************************************** 709467b48Spatrick 8*d415bd75Srobert.. _amdgpu_synid_gfx8_imask: 909467b48Spatrick 1009467b48Spatrickimask 11*d415bd75Srobert===== 1209467b48Spatrick 1309467b48SpatrickThis operand is a mask which controls indexing mode for operands of subsequent instructions. 1409467b48SpatrickBits 0, 1 and 2 control indexing of *src0*, *src1* and *src2*, while bit 3 controls indexing of *dst*. 15*d415bd75SrobertValue 1 enables indexing, and value 0 disables it. 1609467b48Spatrick 1709467b48Spatrick ===== ======================================== 1809467b48Spatrick Bit Meaning 1909467b48Spatrick ===== ======================================== 2009467b48Spatrick 0 Enables or disables *src0* indexing. 2109467b48Spatrick 1 Enables or disables *src1* indexing. 2209467b48Spatrick 2 Enables or disables *src2* indexing. 2309467b48Spatrick 3 Enables or disables *dst* indexing. 2409467b48Spatrick ===== ======================================== 2509467b48Spatrick 2609467b48SpatrickThis operand may be specified as one of the following: 2709467b48Spatrick 28*d415bd75Srobert* An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range from 0 to 15. 29*d415bd75Srobert* A *gpr_idx* value which is described below. 3009467b48Spatrick 31*d415bd75Srobert ==================================== ============================================= 3209467b48Spatrick Gpr_idx Value Syntax Description 33*d415bd75Srobert ==================================== ============================================= 34*d415bd75Srobert gpr_idx(*<operand list>*) Enable indexing for the specified *operands* 3509467b48Spatrick and disable it for the rest. 36*d415bd75Srobert *Operand list* is a comma-separated list of 3709467b48Spatrick values which may include: 3809467b48Spatrick 39*d415bd75Srobert * SRC0 - enable *src0* indexing. 4009467b48Spatrick 41*d415bd75Srobert * SRC1 - enable *src1* indexing. 4209467b48Spatrick 43*d415bd75Srobert * SRC2 - enable *src2* indexing. 4409467b48Spatrick 45*d415bd75Srobert * DST - enable *dst* indexing. 4609467b48Spatrick 4709467b48Spatrick Each of these values may be specified only 4809467b48Spatrick once. 4909467b48Spatrick 50*d415bd75Srobert *Operand list* may be empty; this syntax 5109467b48Spatrick disables indexing for all operands. 52*d415bd75Srobert ==================================== ============================================= 5309467b48Spatrick 5409467b48SpatrickExamples: 5509467b48Spatrick 5609467b48Spatrick.. parsed-literal:: 5709467b48Spatrick 5809467b48Spatrick s_set_gpr_idx_mode 0 5909467b48Spatrick s_set_gpr_idx_mode gpr_idx() // the same as above 6009467b48Spatrick 6109467b48Spatrick s_set_gpr_idx_mode 15 6209467b48Spatrick s_set_gpr_idx_mode gpr_idx(DST,SRC0,SRC1,SRC2) // the same as above 6309467b48Spatrick s_set_gpr_idx_mode gpr_idx(SRC0,SRC1,SRC2,DST) // the same as above 6409467b48Spatrick 6509467b48Spatrick s_set_gpr_idx_mode gpr_idx(DST,SRC1) 66