1@c Copyright 2005
2@c Free Software Foundation, Inc.
3@c This is part of the GAS manual.
4@c For copying conditions, see the file as.texinfo.
5@ifset GENERIC
6@page
7@node M32C-Dependent
8@chapter M32C Dependent Features
9@end ifset
10@ifclear GENERIC
11@node Machine Dependencies
12@chapter M32C Dependent Features
13@end ifclear
14
15@cindex M32C support
16
17@code{@value{AS}} can assemble code for several different members of
18the Renesas M32C family.  Normally the default is to assemble code for
19the M16C microprocessor.  The @code{-m32c} option may be used to
20change the default to the M32C microprocessor.
21
22@menu
23* M32C-Opts::                   M32C Options
24* M32C-Modifiers::              Symbolic Operand Modifiers
25@end menu
26
27@node M32C-Opts
28@section M32C Options
29
30@cindex options, M32C
31@cindex M32C options
32
33The Renesas M32C version of @code{@value{AS}} has two
34machine-dependent options:
35
36@table @code
37@item -m32c
38@cindex @samp{-m32c} option, M32C
39@cindex architecture options, M32C
40@cindex M32C architecture option
41Assemble M32C instructions.
42
43@item -m16c
44@cindex @samp{-m16c} option, M16C
45@cindex architecture options, M16C
46@cindex M16C architecture option
47Assemble M16C instructions (default).
48
49@end table
50
51@node M32C-Modifiers
52@section Symbolic Operand Modifiers
53
54@cindex M32C modifiers
55@cindex syntax, M32C
56
57The assembler supports several modifiers when using symbol addresses
58in M32C instruction operands.  The general syntax is the following:
59
60@smallexample
61%modifier(symbol)
62@end smallexample
63
64@table @code
65@cindex symbol modifiers
66
67@item %dsp8
68@itemx %dsp16
69
70These modifiers override the assembler's assumptions about how big a
71symbol's address is.  Normally, when it sees an operand like
72@samp{sym[a0]} it assumes @samp{sym} may require the widest
73displacement field (16 bits for @samp{-m16c}, 24 bits for
74@samp{-m32c}).  These modifiers tell it to assume the address will fit
75in an 8 or 16 bit (respectively) unsigned displacement.  Note that, of
76course, if it doesn't actually fit you will get linker errors.  Example:
77
78@smallexample
79mov.w %dsp8(sym)[a0],r1
80mov.b #0,%dsp8(sym)[a0]
81@end smallexample
82
83@item %hi8
84
85This modifier allows you to load bits 16 through 23 of a 24 bit
86address into an 8 bit register.  This is useful with, for example, the
87M16C @samp{smovf} instruction, which expects a 20 bit address in
88@samp{r1h} and @samp{a0}.  Example:
89
90@smallexample
91mov.b #%hi8(sym),r1h
92mov.w #%lo16(sym),a0
93smovf.b
94@end smallexample
95
96@item %lo16
97
98Likewise, this modifier allows you to load bits 0 through 15 of a 24
99bit address into a 16 bit register.
100
101@item %hi16
102
103This modifier allows you to load bits 16 through 31 of a 32 bit
104address into a 16 bit register.  While the M32C family only has 24
105bits of address space, it does support addresses in pairs of 16 bit
106registers (like @samp{a1a0} for the @samp{lde} instruction).  This
107modifier is for loading the upper half in such cases.  Example:
108
109@smallexample
110mov.w #%hi16(sym),a1
111mov.w #%lo16(sym),a0
112@dots{}
113lde.w [a1a0],r1
114@end smallexample
115
116@end table
117