1*3d8817e4Smiod@c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 2000, 2003 2*3d8817e4Smiod@c Free Software Foundation, Inc. 3*3d8817e4Smiod@c This is part of the GAS manual. 4*3d8817e4Smiod@c For copying conditions, see the file as.texinfo. 5*3d8817e4Smiod@ifset GENERIC 6*3d8817e4Smiod@page 7*3d8817e4Smiod@node M68HC11-Dependent 8*3d8817e4Smiod@chapter M68HC11 and M68HC12 Dependent Features 9*3d8817e4Smiod@end ifset 10*3d8817e4Smiod@ifclear GENERIC 11*3d8817e4Smiod@node Machine Dependencies 12*3d8817e4Smiod@chapter M68HC11 and M68HC12 Dependent Features 13*3d8817e4Smiod@end ifclear 14*3d8817e4Smiod 15*3d8817e4Smiod@cindex M68HC11 and M68HC12 support 16*3d8817e4Smiod@menu 17*3d8817e4Smiod* M68HC11-Opts:: M68HC11 and M68HC12 Options 18*3d8817e4Smiod* M68HC11-Syntax:: Syntax 19*3d8817e4Smiod* M68HC11-Modifiers:: Symbolic Operand Modifiers 20*3d8817e4Smiod* M68HC11-Directives:: Assembler Directives 21*3d8817e4Smiod* M68HC11-Float:: Floating Point 22*3d8817e4Smiod* M68HC11-opcodes:: Opcodes 23*3d8817e4Smiod@end menu 24*3d8817e4Smiod 25*3d8817e4Smiod@node M68HC11-Opts 26*3d8817e4Smiod@section M68HC11 and M68HC12 Options 27*3d8817e4Smiod 28*3d8817e4Smiod@cindex options, M68HC11 29*3d8817e4Smiod@cindex M68HC11 options 30*3d8817e4SmiodThe Motorola 68HC11 and 68HC12 version of @code{@value{AS}} have a few machine 31*3d8817e4Smioddependent options. 32*3d8817e4Smiod 33*3d8817e4Smiod@table @code 34*3d8817e4Smiod 35*3d8817e4Smiod@cindex @samp{-m68hc11} 36*3d8817e4Smiod@item -m68hc11 37*3d8817e4SmiodThis option switches the assembler in the M68HC11 mode. In this mode, 38*3d8817e4Smiodthe assembler only accepts 68HC11 operands and mnemonics. It produces 39*3d8817e4Smiodcode for the 68HC11. 40*3d8817e4Smiod 41*3d8817e4Smiod@cindex @samp{-m68hc12} 42*3d8817e4Smiod@item -m68hc12 43*3d8817e4SmiodThis option switches the assembler in the M68HC12 mode. In this mode, 44*3d8817e4Smiodthe assembler also accepts 68HC12 operands and mnemonics. It produces 45*3d8817e4Smiodcode for the 68HC12. A few 68HC11 instructions are replaced by 46*3d8817e4Smiodsome 68HC12 instructions as recommended by Motorola specifications. 47*3d8817e4Smiod 48*3d8817e4Smiod@cindex @samp{-m68hcs12} 49*3d8817e4Smiod@item -m68hcs12 50*3d8817e4SmiodThis option switches the assembler in the M68HCS12 mode. This mode is 51*3d8817e4Smiodsimilar to @samp{-m68hc12} but specifies to assemble for the 68HCS12 52*3d8817e4Smiodseries. The only difference is on the assembling of the @samp{movb} 53*3d8817e4Smiodand @samp{movw} instruction when a PC-relative operand is used. 54*3d8817e4Smiod 55*3d8817e4Smiod@cindex @samp{-mshort} 56*3d8817e4Smiod@item -mshort 57*3d8817e4SmiodThis option controls the ABI and indicates to use a 16-bit integer ABI. 58*3d8817e4SmiodIt has no effect on the assembled instructions. 59*3d8817e4SmiodThis is the default. 60*3d8817e4Smiod 61*3d8817e4Smiod@cindex @samp{-mlong} 62*3d8817e4Smiod@item -mlong 63*3d8817e4SmiodThis option controls the ABI and indicates to use a 32-bit integer ABI. 64*3d8817e4Smiod 65*3d8817e4Smiod@cindex @samp{-mshort-double} 66*3d8817e4Smiod@item -mshort-double 67*3d8817e4SmiodThis option controls the ABI and indicates to use a 32-bit float ABI. 68*3d8817e4SmiodThis is the default. 69*3d8817e4Smiod 70*3d8817e4Smiod@cindex @samp{-mlong-double} 71*3d8817e4Smiod@item -mlong-double 72*3d8817e4SmiodThis option controls the ABI and indicates to use a 64-bit float ABI. 73*3d8817e4Smiod 74*3d8817e4Smiod@cindex @samp{--strict-direct-mode} 75*3d8817e4Smiod@item --strict-direct-mode 76*3d8817e4SmiodYou can use the @samp{--strict-direct-mode} option to disable 77*3d8817e4Smiodthe automatic translation of direct page mode addressing into 78*3d8817e4Smiodextended mode when the instruction does not support direct mode. 79*3d8817e4SmiodFor example, the @samp{clr} instruction does not support direct page 80*3d8817e4Smiodmode addressing. When it is used with the direct page mode, 81*3d8817e4Smiod@code{@value{AS}} will ignore it and generate an absolute addressing. 82*3d8817e4SmiodThis option prevents @code{@value{AS}} from doing this, and the wrong 83*3d8817e4Smiodusage of the direct page mode will raise an error. 84*3d8817e4Smiod 85*3d8817e4Smiod@cindex @samp{--short-branchs} 86*3d8817e4Smiod@item --short-branchs 87*3d8817e4SmiodThe @samp{--short-branchs} option turns off the translation of 88*3d8817e4Smiodrelative branches into absolute branches when the branch offset is 89*3d8817e4Smiodout of range. By default @code{@value{AS}} transforms the relative 90*3d8817e4Smiodbranch (@samp{bsr}, @samp{bgt}, @samp{bge}, @samp{beq}, @samp{bne}, 91*3d8817e4Smiod@samp{ble}, @samp{blt}, @samp{bhi}, @samp{bcc}, @samp{bls}, 92*3d8817e4Smiod@samp{bcs}, @samp{bmi}, @samp{bvs}, @samp{bvs}, @samp{bra}) into 93*3d8817e4Smiodan absolute branch when the offset is out of the -128 .. 127 range. 94*3d8817e4SmiodIn that case, the @samp{bsr} instruction is translated into a 95*3d8817e4Smiod@samp{jsr}, the @samp{bra} instruction is translated into a 96*3d8817e4Smiod@samp{jmp} and the conditional branchs instructions are inverted and 97*3d8817e4Smiodfollowed by a @samp{jmp}. This option disables these translations 98*3d8817e4Smiodand @code{@value{AS}} will generate an error if a relative branch 99*3d8817e4Smiodis out of range. This option does not affect the optimization 100*3d8817e4Smiodassociated to the @samp{jbra}, @samp{jbsr} and @samp{jbXX} pseudo opcodes. 101*3d8817e4Smiod 102*3d8817e4Smiod@cindex @samp{--force-long-branchs} 103*3d8817e4Smiod@item --force-long-branchs 104*3d8817e4SmiodThe @samp{--force-long-branchs} option forces the translation of 105*3d8817e4Smiodrelative branches into absolute branches. This option does not affect 106*3d8817e4Smiodthe optimization associated to the @samp{jbra}, @samp{jbsr} and 107*3d8817e4Smiod@samp{jbXX} pseudo opcodes. 108*3d8817e4Smiod 109*3d8817e4Smiod@cindex @samp{--print-insn-syntax} 110*3d8817e4Smiod@item --print-insn-syntax 111*3d8817e4SmiodYou can use the @samp{--print-insn-syntax} option to obtain the 112*3d8817e4Smiodsyntax description of the instruction when an error is detected. 113*3d8817e4Smiod 114*3d8817e4Smiod@cindex @samp{--print-opcodes} 115*3d8817e4Smiod@item --print-opcodes 116*3d8817e4SmiodThe @samp{--print-opcodes} option prints the list of all the 117*3d8817e4Smiodinstructions with their syntax. The first item of each line 118*3d8817e4Smiodrepresents the instruction name and the rest of the line indicates 119*3d8817e4Smiodthe possible operands for that instruction. The list is printed 120*3d8817e4Smiodin alphabetical order. Once the list is printed @code{@value{AS}} 121*3d8817e4Smiodexits. 122*3d8817e4Smiod 123*3d8817e4Smiod@cindex @samp{--generate-example} 124*3d8817e4Smiod@item --generate-example 125*3d8817e4SmiodThe @samp{--generate-example} option is similar to @samp{--print-opcodes} 126*3d8817e4Smiodbut it generates an example for each instruction instead. 127*3d8817e4Smiod@end table 128*3d8817e4Smiod 129*3d8817e4Smiod@node M68HC11-Syntax 130*3d8817e4Smiod@section Syntax 131*3d8817e4Smiod 132*3d8817e4Smiod@cindex M68HC11 syntax 133*3d8817e4Smiod@cindex syntax, M68HC11 134*3d8817e4Smiod 135*3d8817e4SmiodIn the M68HC11 syntax, the instruction name comes first and it may 136*3d8817e4Smiodbe followed by one or several operands (up to three). Operands are 137*3d8817e4Smiodseparated by comma (@samp{,}). In the normal mode, 138*3d8817e4Smiod@code{@value{AS}} will complain if too many operands are specified for 139*3d8817e4Smioda given instruction. In the MRI mode (turned on with @samp{-M} option), 140*3d8817e4Smiodit will treat them as comments. Example: 141*3d8817e4Smiod 142*3d8817e4Smiod@smallexample 143*3d8817e4Smiodinx 144*3d8817e4Smiodlda #23 145*3d8817e4Smiodbset 2,x #4 146*3d8817e4Smiodbrclr *bot #8 foo 147*3d8817e4Smiod@end smallexample 148*3d8817e4Smiod 149*3d8817e4Smiod@cindex M68HC11 addressing modes 150*3d8817e4Smiod@cindex addressing modes, M68HC11 151*3d8817e4SmiodThe following addressing modes are understood for 68HC11 and 68HC12: 152*3d8817e4Smiod@table @dfn 153*3d8817e4Smiod@item Immediate 154*3d8817e4Smiod@samp{#@var{number}} 155*3d8817e4Smiod 156*3d8817e4Smiod@item Address Register 157*3d8817e4Smiod@samp{@var{number},X}, @samp{@var{number},Y} 158*3d8817e4Smiod 159*3d8817e4SmiodThe @var{number} may be omitted in which case 0 is assumed. 160*3d8817e4Smiod 161*3d8817e4Smiod@item Direct Addressing mode 162*3d8817e4Smiod@samp{*@var{symbol}}, or @samp{*@var{digits}} 163*3d8817e4Smiod 164*3d8817e4Smiod@item Absolute 165*3d8817e4Smiod@samp{@var{symbol}}, or @samp{@var{digits}} 166*3d8817e4Smiod@end table 167*3d8817e4Smiod 168*3d8817e4SmiodThe M68HC12 has other more complex addressing modes. All of them 169*3d8817e4Smiodare supported and they are represented below: 170*3d8817e4Smiod 171*3d8817e4Smiod@table @dfn 172*3d8817e4Smiod@item Constant Offset Indexed Addressing Mode 173*3d8817e4Smiod@samp{@var{number},@var{reg}} 174*3d8817e4Smiod 175*3d8817e4SmiodThe @var{number} may be omitted in which case 0 is assumed. 176*3d8817e4SmiodThe register can be either @samp{X}, @samp{Y}, @samp{SP} or 177*3d8817e4Smiod@samp{PC}. The assembler will use the smaller post-byte definition 178*3d8817e4Smiodaccording to the constant value (5-bit constant offset, 9-bit constant 179*3d8817e4Smiodoffset or 16-bit constant offset). If the constant is not known by 180*3d8817e4Smiodthe assembler it will use the 16-bit constant offset post-byte and the value 181*3d8817e4Smiodwill be resolved at link time. 182*3d8817e4Smiod 183*3d8817e4Smiod@item Offset Indexed Indirect 184*3d8817e4Smiod@samp{[@var{number},@var{reg}]} 185*3d8817e4Smiod 186*3d8817e4SmiodThe register can be either @samp{X}, @samp{Y}, @samp{SP} or @samp{PC}. 187*3d8817e4Smiod 188*3d8817e4Smiod@item Auto Pre-Increment/Pre-Decrement/Post-Increment/Post-Decrement 189*3d8817e4Smiod@samp{@var{number},-@var{reg}} 190*3d8817e4Smiod@samp{@var{number},+@var{reg}} 191*3d8817e4Smiod@samp{@var{number},@var{reg}-} 192*3d8817e4Smiod@samp{@var{number},@var{reg}+} 193*3d8817e4Smiod 194*3d8817e4SmiodThe number must be in the range @samp{-8}..@samp{+8} and must not be 0. 195*3d8817e4SmiodThe register can be either @samp{X}, @samp{Y}, @samp{SP} or @samp{PC}. 196*3d8817e4Smiod 197*3d8817e4Smiod@item Accumulator Offset 198*3d8817e4Smiod@samp{@var{acc},@var{reg}} 199*3d8817e4Smiod 200*3d8817e4SmiodThe accumulator register can be either @samp{A}, @samp{B} or @samp{D}. 201*3d8817e4SmiodThe register can be either @samp{X}, @samp{Y}, @samp{SP} or @samp{PC}. 202*3d8817e4Smiod 203*3d8817e4Smiod@item Accumulator D offset indexed-indirect 204*3d8817e4Smiod@samp{[D,@var{reg}]} 205*3d8817e4Smiod 206*3d8817e4SmiodThe register can be either @samp{X}, @samp{Y}, @samp{SP} or @samp{PC}. 207*3d8817e4Smiod 208*3d8817e4Smiod@end table 209*3d8817e4Smiod 210*3d8817e4SmiodFor example: 211*3d8817e4Smiod 212*3d8817e4Smiod@smallexample 213*3d8817e4Smiodldab 1024,sp 214*3d8817e4Smiodldd [10,x] 215*3d8817e4Smiodorab 3,+x 216*3d8817e4Smiodstab -2,y- 217*3d8817e4Smiodldx a,pc 218*3d8817e4Smiodsty [d,sp] 219*3d8817e4Smiod@end smallexample 220*3d8817e4Smiod 221*3d8817e4Smiod 222*3d8817e4Smiod@node M68HC11-Modifiers 223*3d8817e4Smiod@section Symbolic Operand Modifiers 224*3d8817e4Smiod 225*3d8817e4Smiod@cindex M68HC11 modifiers 226*3d8817e4Smiod@cindex syntax, M68HC11 227*3d8817e4Smiod 228*3d8817e4SmiodThe assembler supports several modifiers when using symbol addresses 229*3d8817e4Smiodin 68HC11 and 68HC12 instruction operands. The general syntax is 230*3d8817e4Smiodthe following: 231*3d8817e4Smiod 232*3d8817e4Smiod@smallexample 233*3d8817e4Smiod%modifier(symbol) 234*3d8817e4Smiod@end smallexample 235*3d8817e4Smiod 236*3d8817e4Smiod@table @code 237*3d8817e4Smiod@cindex symbol modifiers 238*3d8817e4Smiod@item %addr 239*3d8817e4SmiodThis modifier indicates to the assembler and linker to use 240*3d8817e4Smiodthe 16-bit physical address corresponding to the symbol. This is intended 241*3d8817e4Smiodto be used on memory window systems to map a symbol in the memory bank window. 242*3d8817e4SmiodIf the symbol is in a memory expansion part, the physical address 243*3d8817e4Smiodcorresponds to the symbol address within the memory bank window. 244*3d8817e4SmiodIf the symbol is not in a memory expansion part, this is the symbol address 245*3d8817e4Smiod(using or not using the %addr modifier has no effect in that case). 246*3d8817e4Smiod 247*3d8817e4Smiod@item %page 248*3d8817e4SmiodThis modifier indicates to use the memory page number corresponding 249*3d8817e4Smiodto the symbol. If the symbol is in a memory expansion part, its page 250*3d8817e4Smiodnumber is computed by the linker as a number used to map the page containing 251*3d8817e4Smiodthe symbol in the memory bank window. If the symbol is not in a memory 252*3d8817e4Smiodexpansion part, the page number is 0. 253*3d8817e4Smiod 254*3d8817e4Smiod@item %hi 255*3d8817e4SmiodThis modifier indicates to use the 8-bit high part of the physical 256*3d8817e4Smiodaddress of the symbol. 257*3d8817e4Smiod 258*3d8817e4Smiod@item %lo 259*3d8817e4SmiodThis modifier indicates to use the 8-bit low part of the physical 260*3d8817e4Smiodaddress of the symbol. 261*3d8817e4Smiod 262*3d8817e4Smiod@end table 263*3d8817e4Smiod 264*3d8817e4SmiodFor example a 68HC12 call to a function @samp{foo_example} stored in memory 265*3d8817e4Smiodexpansion part could be written as follows: 266*3d8817e4Smiod 267*3d8817e4Smiod@smallexample 268*3d8817e4Smiodcall %addr(foo_example),%page(foo_example) 269*3d8817e4Smiod@end smallexample 270*3d8817e4Smiod 271*3d8817e4Smiodand this is equivalent to 272*3d8817e4Smiod 273*3d8817e4Smiod@smallexample 274*3d8817e4Smiodcall foo_example 275*3d8817e4Smiod@end smallexample 276*3d8817e4Smiod 277*3d8817e4SmiodAnd for 68HC11 it could be written as follows: 278*3d8817e4Smiod 279*3d8817e4Smiod@smallexample 280*3d8817e4Smiodldab #%page(foo_example) 281*3d8817e4Smiodstab _page_switch 282*3d8817e4Smiodjsr %addr(foo_example) 283*3d8817e4Smiod@end smallexample 284*3d8817e4Smiod 285*3d8817e4Smiod@node M68HC11-Directives 286*3d8817e4Smiod@section Assembler Directives 287*3d8817e4Smiod 288*3d8817e4Smiod@cindex assembler directives, M68HC11 289*3d8817e4Smiod@cindex assembler directives, M68HC12 290*3d8817e4Smiod@cindex M68HC11 assembler directives 291*3d8817e4Smiod@cindex M68HC12 assembler directives 292*3d8817e4Smiod 293*3d8817e4SmiodThe 68HC11 and 68HC12 version of @code{@value{AS}} have the following 294*3d8817e4Smiodspecific assembler directives: 295*3d8817e4Smiod 296*3d8817e4Smiod@table @code 297*3d8817e4Smiod@item .relax 298*3d8817e4Smiod@cindex assembler directive .relax, M68HC11 299*3d8817e4Smiod@cindex M68HC11 assembler directive .relax 300*3d8817e4SmiodThe relax directive is used by the @samp{GNU Compiler} to emit a specific 301*3d8817e4Smiodrelocation to mark a group of instructions for linker relaxation. 302*3d8817e4SmiodThe sequence of instructions within the group must be known to the linker 303*3d8817e4Smiodso that relaxation can be performed. 304*3d8817e4Smiod 305*3d8817e4Smiod@item .mode [mshort|mlong|mshort-double|mlong-double] 306*3d8817e4Smiod@cindex assembler directive .mode, M68HC11 307*3d8817e4Smiod@cindex M68HC11 assembler directive .mode 308*3d8817e4SmiodThis directive specifies the ABI. It overrides the @samp{-mshort}, 309*3d8817e4Smiod@samp{-mlong}, @samp{-mshort-double} and @samp{-mlong-double} options. 310*3d8817e4Smiod 311*3d8817e4Smiod@item .far @var{symbol} 312*3d8817e4Smiod@cindex assembler directive .far, M68HC11 313*3d8817e4Smiod@cindex M68HC11 assembler directive .far 314*3d8817e4SmiodThis directive marks the symbol as a @samp{far} symbol meaning that it 315*3d8817e4Smioduses a @samp{call/rtc} calling convention as opposed to @samp{jsr/rts}. 316*3d8817e4SmiodDuring a final link, the linker will identify references to the @samp{far} 317*3d8817e4Smiodsymbol and will verify the proper calling convention. 318*3d8817e4Smiod 319*3d8817e4Smiod@item .interrupt @var{symbol} 320*3d8817e4Smiod@cindex assembler directive .interrupt, M68HC11 321*3d8817e4Smiod@cindex M68HC11 assembler directive .interrupt 322*3d8817e4SmiodThis directive marks the symbol as an interrupt entry point. 323*3d8817e4SmiodThis information is then used by the debugger to correctly unwind the 324*3d8817e4Smiodframe across interrupts. 325*3d8817e4Smiod 326*3d8817e4Smiod@item .xrefb @var{symbol} 327*3d8817e4Smiod@cindex assembler directive .xrefb, M68HC11 328*3d8817e4Smiod@cindex M68HC11 assembler directive .xrefb 329*3d8817e4SmiodThis directive is defined for compatibility with the 330*3d8817e4Smiod@samp{Specification for Motorola 8 and 16-Bit Assembly Language Input 331*3d8817e4SmiodStandard} and is ignored. 332*3d8817e4Smiod 333*3d8817e4Smiod@end table 334*3d8817e4Smiod 335*3d8817e4Smiod@node M68HC11-Float 336*3d8817e4Smiod@section Floating Point 337*3d8817e4Smiod 338*3d8817e4Smiod@cindex floating point, M68HC11 339*3d8817e4Smiod@cindex M68HC11 floating point 340*3d8817e4SmiodPacked decimal (P) format floating literals are not supported. 341*3d8817e4SmiodFeel free to add the code! 342*3d8817e4Smiod 343*3d8817e4SmiodThe floating point formats generated by directives are these. 344*3d8817e4Smiod 345*3d8817e4Smiod@table @code 346*3d8817e4Smiod@cindex @code{float} directive, M68HC11 347*3d8817e4Smiod@item .float 348*3d8817e4Smiod@code{Single} precision floating point constants. 349*3d8817e4Smiod 350*3d8817e4Smiod@cindex @code{double} directive, M68HC11 351*3d8817e4Smiod@item .double 352*3d8817e4Smiod@code{Double} precision floating point constants. 353*3d8817e4Smiod 354*3d8817e4Smiod@cindex @code{extend} directive M68HC11 355*3d8817e4Smiod@cindex @code{ldouble} directive M68HC11 356*3d8817e4Smiod@item .extend 357*3d8817e4Smiod@itemx .ldouble 358*3d8817e4Smiod@code{Extended} precision (@code{long double}) floating point constants. 359*3d8817e4Smiod@end table 360*3d8817e4Smiod 361*3d8817e4Smiod@need 2000 362*3d8817e4Smiod@node M68HC11-opcodes 363*3d8817e4Smiod@section Opcodes 364*3d8817e4Smiod 365*3d8817e4Smiod@cindex M68HC11 opcodes 366*3d8817e4Smiod@cindex opcodes, M68HC11 367*3d8817e4Smiod@cindex instruction set, M68HC11 368*3d8817e4Smiod 369*3d8817e4Smiod@menu 370*3d8817e4Smiod* M68HC11-Branch:: Branch Improvement 371*3d8817e4Smiod@end menu 372*3d8817e4Smiod 373*3d8817e4Smiod@node M68HC11-Branch 374*3d8817e4Smiod@subsection Branch Improvement 375*3d8817e4Smiod 376*3d8817e4Smiod@cindex pseudo-opcodes, M68HC11 377*3d8817e4Smiod@cindex M68HC11 pseudo-opcodes 378*3d8817e4Smiod@cindex branch improvement, M68HC11 379*3d8817e4Smiod@cindex M68HC11 branch improvement 380*3d8817e4Smiod 381*3d8817e4SmiodCertain pseudo opcodes are permitted for branch instructions. 382*3d8817e4SmiodThey expand to the shortest branch instruction that reach the 383*3d8817e4Smiodtarget. Generally these mnemonics are made by prepending @samp{j} to 384*3d8817e4Smiodthe start of Motorola mnemonic. These pseudo opcodes are not affected 385*3d8817e4Smiodby the @samp{--short-branchs} or @samp{--force-long-branchs} options. 386*3d8817e4Smiod 387*3d8817e4SmiodThe following table summarizes the pseudo-operations. 388*3d8817e4Smiod 389*3d8817e4Smiod@smallexample 390*3d8817e4Smiod Displacement Width 391*3d8817e4Smiod +-------------------------------------------------------------+ 392*3d8817e4Smiod | Options | 393*3d8817e4Smiod | --short-branchs --force-long-branchs | 394*3d8817e4Smiod +--------------------------+----------------------------------+ 395*3d8817e4Smiod Op |BYTE WORD | BYTE WORD | 396*3d8817e4Smiod +--------------------------+----------------------------------+ 397*3d8817e4Smiod bsr | bsr <pc-rel> <error> | jsr <abs> | 398*3d8817e4Smiod bra | bra <pc-rel> <error> | jmp <abs> | 399*3d8817e4Smiodjbsr | bsr <pc-rel> jsr <abs> | bsr <pc-rel> jsr <abs> | 400*3d8817e4Smiodjbra | bra <pc-rel> jmp <abs> | bra <pc-rel> jmp <abs> | 401*3d8817e4Smiod bXX | bXX <pc-rel> <error> | bNX +3; jmp <abs> | 402*3d8817e4SmiodjbXX | bXX <pc-rel> bNX +3; | bXX <pc-rel> bNX +3; jmp <abs> | 403*3d8817e4Smiod | jmp <abs> | | 404*3d8817e4Smiod +--------------------------+----------------------------------+ 405*3d8817e4SmiodXX: condition 406*3d8817e4SmiodNX: negative of condition XX 407*3d8817e4Smiod 408*3d8817e4Smiod@end smallexample 409*3d8817e4Smiod 410*3d8817e4Smiod@table @code 411*3d8817e4Smiod@item jbsr 412*3d8817e4Smiod@itemx jbra 413*3d8817e4SmiodThese are the simplest jump pseudo-operations; they always map to one 414*3d8817e4Smiodparticular machine instruction, depending on the displacement to the 415*3d8817e4Smiodbranch target. 416*3d8817e4Smiod 417*3d8817e4Smiod@item jb@var{XX} 418*3d8817e4SmiodHere, @samp{jb@var{XX}} stands for an entire family of pseudo-operations, 419*3d8817e4Smiodwhere @var{XX} is a conditional branch or condition-code test. The full 420*3d8817e4Smiodlist of pseudo-ops in this family is: 421*3d8817e4Smiod@smallexample 422*3d8817e4Smiod jbcc jbeq jbge jbgt jbhi jbvs jbpl jblo 423*3d8817e4Smiod jbcs jbne jblt jble jbls jbvc jbmi 424*3d8817e4Smiod@end smallexample 425*3d8817e4Smiod 426*3d8817e4SmiodFor the cases of non-PC relative displacements and long displacements, 427*3d8817e4Smiod@code{@value{AS}} issues a longer code fragment in terms of 428*3d8817e4Smiod@var{NX}, the opposite condition to @var{XX}. For example, for the 429*3d8817e4Smiodnon-PC relative case: 430*3d8817e4Smiod@smallexample 431*3d8817e4Smiod jb@var{XX} foo 432*3d8817e4Smiod@end smallexample 433*3d8817e4Smiodgives 434*3d8817e4Smiod@smallexample 435*3d8817e4Smiod b@var{NX}s oof 436*3d8817e4Smiod jmp foo 437*3d8817e4Smiod oof: 438*3d8817e4Smiod@end smallexample 439*3d8817e4Smiod 440*3d8817e4Smiod@end table 441*3d8817e4Smiod 442*3d8817e4Smiod 443