1@section Relocations 2BFD maintains relocations in much the same way it maintains 3symbols: they are left alone until required, then read in 4en-masse and translated into an internal form. A common 5routine @code{bfd_perform_relocation} acts upon the 6canonical form to do the fixup. 7 8Relocations are maintained on a per section basis, 9while symbols are maintained on a per BFD basis. 10 11All that a back end has to do to fit the BFD interface is to create 12a @code{struct reloc_cache_entry} for each relocation 13in a particular section, and fill in the right bits of the structures. 14 15@menu 16* typedef arelent:: 17* howto manager:: 18@end menu 19 20 21@node typedef arelent, howto manager, Relocations, Relocations 22@subsection typedef arelent 23This is the structure of a relocation entry: 24 25 26@example 27 28typedef enum bfd_reloc_status 29@{ 30 /* No errors detected. */ 31 bfd_reloc_ok, 32 33 /* The relocation was performed, but there was an overflow. */ 34 bfd_reloc_overflow, 35 36 /* The address to relocate was not within the section supplied. */ 37 bfd_reloc_outofrange, 38 39 /* Used by special functions. */ 40 bfd_reloc_continue, 41 42 /* Unsupported relocation size requested. */ 43 bfd_reloc_notsupported, 44 45 /* Unused. */ 46 bfd_reloc_other, 47 48 /* The symbol to relocate against was undefined. */ 49 bfd_reloc_undefined, 50 51 /* The relocation was performed, but may not be ok - presently 52 generated only when linking i960 coff files with i960 b.out 53 symbols. If this type is returned, the error_message argument 54 to bfd_perform_relocation will be set. */ 55 bfd_reloc_dangerous 56 @} 57 bfd_reloc_status_type; 58 59 60typedef struct reloc_cache_entry 61@{ 62 /* A pointer into the canonical table of pointers. */ 63 struct bfd_symbol **sym_ptr_ptr; 64 65 /* offset in section. */ 66 bfd_size_type address; 67 68 /* addend for relocation value. */ 69 bfd_vma addend; 70 71 /* Pointer to how to perform the required relocation. */ 72 reloc_howto_type *howto; 73 74@} 75arelent; 76 77@end example 78@strong{Description}@* 79Here is a description of each of the fields within an @code{arelent}: 80 81@itemize @bullet 82 83@item 84@code{sym_ptr_ptr} 85@end itemize 86The symbol table pointer points to a pointer to the symbol 87associated with the relocation request. It is the pointer 88into the table returned by the back end's 89@code{canonicalize_symtab} action. @xref{Symbols}. The symbol is 90referenced through a pointer to a pointer so that tools like 91the linker can fix up all the symbols of the same name by 92modifying only one pointer. The relocation routine looks in 93the symbol and uses the base of the section the symbol is 94attached to and the value of the symbol as the initial 95relocation offset. If the symbol pointer is zero, then the 96section provided is looked up. 97 98@itemize @bullet 99 100@item 101@code{address} 102@end itemize 103The @code{address} field gives the offset in bytes from the base of 104the section data which owns the relocation record to the first 105byte of relocatable information. The actual data relocated 106will be relative to this point; for example, a relocation 107type which modifies the bottom two bytes of a four byte word 108would not touch the first byte pointed to in a big endian 109world. 110 111@itemize @bullet 112 113@item 114@code{addend} 115@end itemize 116The @code{addend} is a value provided by the back end to be added (!) 117to the relocation offset. Its interpretation is dependent upon 118the howto. For example, on the 68k the code: 119 120@example 121 char foo[]; 122 main() 123 @{ 124 return foo[0x12345678]; 125 @} 126@end example 127 128Could be compiled into: 129 130@example 131 linkw fp,#-4 132 moveb @@#12345678,d0 133 extbl d0 134 unlk fp 135 rts 136@end example 137 138This could create a reloc pointing to @code{foo}, but leave the 139offset in the data, something like: 140 141@example 142RELOCATION RECORDS FOR [.text]: 143offset type value 14400000006 32 _foo 145 14600000000 4e56 fffc ; linkw fp,#-4 14700000004 1039 1234 5678 ; moveb @@#12345678,d0 1480000000a 49c0 ; extbl d0 1490000000c 4e5e ; unlk fp 1500000000e 4e75 ; rts 151@end example 152 153Using coff and an 88k, some instructions don't have enough 154space in them to represent the full address range, and 155pointers have to be loaded in two parts. So you'd get something like: 156 157@example 158 or.u r13,r0,hi16(_foo+0x12345678) 159 ld.b r2,r13,lo16(_foo+0x12345678) 160 jmp r1 161@end example 162 163This should create two relocs, both pointing to @code{_foo}, and with 1640x12340000 in their addend field. The data would consist of: 165 166@example 167RELOCATION RECORDS FOR [.text]: 168offset type value 16900000002 HVRT16 _foo+0x12340000 17000000006 LVRT16 _foo+0x12340000 171 17200000000 5da05678 ; or.u r13,r0,0x5678 17300000004 1c4d5678 ; ld.b r2,r13,0x5678 17400000008 f400c001 ; jmp r1 175@end example 176 177The relocation routine digs out the value from the data, adds 178it to the addend to get the original offset, and then adds the 179value of @code{_foo}. Note that all 32 bits have to be kept around 180somewhere, to cope with carry from bit 15 to bit 16. 181 182One further example is the sparc and the a.out format. The 183sparc has a similar problem to the 88k, in that some 184instructions don't have room for an entire offset, but on the 185sparc the parts are created in odd sized lumps. The designers of 186the a.out format chose to not use the data within the section 187for storing part of the offset; all the offset is kept within 188the reloc. Anything in the data should be ignored. 189 190@example 191 save %sp,-112,%sp 192 sethi %hi(_foo+0x12345678),%g2 193 ldsb [%g2+%lo(_foo+0x12345678)],%i0 194 ret 195 restore 196@end example 197 198Both relocs contain a pointer to @code{foo}, and the offsets 199contain junk. 200 201@example 202RELOCATION RECORDS FOR [.text]: 203offset type value 20400000004 HI22 _foo+0x12345678 20500000008 LO10 _foo+0x12345678 206 20700000000 9de3bf90 ; save %sp,-112,%sp 20800000004 05000000 ; sethi %hi(_foo+0),%g2 20900000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0 2100000000c 81c7e008 ; ret 21100000010 81e80000 ; restore 212@end example 213 214@itemize @bullet 215 216@item 217@code{howto} 218@end itemize 219The @code{howto} field can be imagined as a 220relocation instruction. It is a pointer to a structure which 221contains information on what to do with all of the other 222information in the reloc record and data section. A back end 223would normally have a relocation instruction set and turn 224relocations into pointers to the correct structure on input - 225but it would be possible to create each howto field on demand. 226 227@subsubsection @code{enum complain_overflow} 228Indicates what sort of overflow checking should be done when 229performing a relocation. 230 231 232@example 233 234enum complain_overflow 235@{ 236 /* Do not complain on overflow. */ 237 complain_overflow_dont, 238 239 /* Complain if the bitfield overflows, whether it is considered 240 as signed or unsigned. */ 241 complain_overflow_bitfield, 242 243 /* Complain if the value overflows when considered as signed 244 number. */ 245 complain_overflow_signed, 246 247 /* Complain if the value overflows when considered as an 248 unsigned number. */ 249 complain_overflow_unsigned 250@}; 251@end example 252@subsubsection @code{reloc_howto_type} 253The @code{reloc_howto_type} is a structure which contains all the 254information that libbfd needs to know to tie up a back end's data. 255 256 257@example 258struct bfd_symbol; /* Forward declaration. */ 259 260struct reloc_howto_struct 261@{ 262 /* The type field has mainly a documentary use - the back end can 263 do what it wants with it, though normally the back end's 264 external idea of what a reloc number is stored 265 in this field. For example, a PC relative word relocation 266 in a coff environment has the type 023 - because that's 267 what the outside world calls a R_PCRWORD reloc. */ 268 unsigned int type; 269 270 /* The value the final relocation is shifted right by. This drops 271 unwanted data from the relocation. */ 272 unsigned int rightshift; 273 274 /* The size of the item to be relocated. This is *not* a 275 power-of-two measure. To get the number of bytes operated 276 on by a type of relocation, use bfd_get_reloc_size. */ 277 int size; 278 279 /* The number of bits in the item to be relocated. This is used 280 when doing overflow checking. */ 281 unsigned int bitsize; 282 283 /* Notes that the relocation is relative to the location in the 284 data section of the addend. The relocation function will 285 subtract from the relocation value the address of the location 286 being relocated. */ 287 bfd_boolean pc_relative; 288 289 /* The bit position of the reloc value in the destination. 290 The relocated value is left shifted by this amount. */ 291 unsigned int bitpos; 292 293 /* What type of overflow error should be checked for when 294 relocating. */ 295 enum complain_overflow complain_on_overflow; 296 297 /* If this field is non null, then the supplied function is 298 called rather than the normal function. This allows really 299 strange relocation methods to be accommodated (e.g., i960 callj 300 instructions). */ 301 bfd_reloc_status_type (*special_function) 302 (bfd *, arelent *, struct bfd_symbol *, void *, asection *, 303 bfd *, char **); 304 305 /* The textual name of the relocation type. */ 306 char *name; 307 308 /* Some formats record a relocation addend in the section contents 309 rather than with the relocation. For ELF formats this is the 310 distinction between USE_REL and USE_RELA (though the code checks 311 for USE_REL == 1/0). The value of this field is TRUE if the 312 addend is recorded with the section contents; when performing a 313 partial link (ld -r) the section contents (the data) will be 314 modified. The value of this field is FALSE if addends are 315 recorded with the relocation (in arelent.addend); when performing 316 a partial link the relocation will be modified. 317 All relocations for all ELF USE_RELA targets should set this field 318 to FALSE (values of TRUE should be looked on with suspicion). 319 However, the converse is not true: not all relocations of all ELF 320 USE_REL targets set this field to TRUE. Why this is so is peculiar 321 to each particular target. For relocs that aren't used in partial 322 links (e.g. GOT stuff) it doesn't matter what this is set to. */ 323 bfd_boolean partial_inplace; 324 325 /* src_mask selects the part of the instruction (or data) to be used 326 in the relocation sum. If the target relocations don't have an 327 addend in the reloc, eg. ELF USE_REL, src_mask will normally equal 328 dst_mask to extract the addend from the section contents. If 329 relocations do have an addend in the reloc, eg. ELF USE_RELA, this 330 field should be zero. Non-zero values for ELF USE_RELA targets are 331 bogus as in those cases the value in the dst_mask part of the 332 section contents should be treated as garbage. */ 333 bfd_vma src_mask; 334 335 /* dst_mask selects which parts of the instruction (or data) are 336 replaced with a relocated value. */ 337 bfd_vma dst_mask; 338 339 /* When some formats create PC relative instructions, they leave 340 the value of the pc of the place being relocated in the offset 341 slot of the instruction, so that a PC relative relocation can 342 be made just by adding in an ordinary offset (e.g., sun3 a.out). 343 Some formats leave the displacement part of an instruction 344 empty (e.g., m88k bcs); this flag signals the fact. */ 345 bfd_boolean pcrel_offset; 346@}; 347 348@end example 349@findex The HOWTO Macro 350@subsubsection @code{The HOWTO Macro} 351@strong{Description}@* 352The HOWTO define is horrible and will go away. 353@example 354#define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \ 355 @{ (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC @} 356@end example 357 358@strong{Description}@* 359And will be replaced with the totally magic way. But for the 360moment, we are compatible, so do it this way. 361@example 362#define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \ 363 HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \ 364 NAME, FALSE, 0, 0, IN) 365 366@end example 367 368@strong{Description}@* 369This is used to fill in an empty howto entry in an array. 370@example 371#define EMPTY_HOWTO(C) \ 372 HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \ 373 NULL, FALSE, 0, 0, FALSE) 374 375@end example 376 377@strong{Description}@* 378Helper routine to turn a symbol into a relocation value. 379@example 380#define HOWTO_PREPARE(relocation, symbol) \ 381 @{ \ 382 if (symbol != NULL) \ 383 @{ \ 384 if (bfd_is_com_section (symbol->section)) \ 385 @{ \ 386 relocation = 0; \ 387 @} \ 388 else \ 389 @{ \ 390 relocation = symbol->value; \ 391 @} \ 392 @} \ 393 @} 394 395@end example 396 397@findex bfd_get_reloc_size 398@subsubsection @code{bfd_get_reloc_size} 399@strong{Synopsis} 400@example 401unsigned int bfd_get_reloc_size (reloc_howto_type *); 402@end example 403@strong{Description}@* 404For a reloc_howto_type that operates on a fixed number of bytes, 405this returns the number of bytes operated on. 406 407@findex arelent_chain 408@subsubsection @code{arelent_chain} 409@strong{Description}@* 410How relocs are tied together in an @code{asection}: 411@example 412typedef struct relent_chain 413@{ 414 arelent relent; 415 struct relent_chain *next; 416@} 417arelent_chain; 418 419@end example 420 421@findex bfd_check_overflow 422@subsubsection @code{bfd_check_overflow} 423@strong{Synopsis} 424@example 425bfd_reloc_status_type bfd_check_overflow 426 (enum complain_overflow how, 427 unsigned int bitsize, 428 unsigned int rightshift, 429 unsigned int addrsize, 430 bfd_vma relocation); 431@end example 432@strong{Description}@* 433Perform overflow checking on @var{relocation} which has 434@var{bitsize} significant bits and will be shifted right by 435@var{rightshift} bits, on a machine with addresses containing 436@var{addrsize} significant bits. The result is either of 437@code{bfd_reloc_ok} or @code{bfd_reloc_overflow}. 438 439@findex bfd_perform_relocation 440@subsubsection @code{bfd_perform_relocation} 441@strong{Synopsis} 442@example 443bfd_reloc_status_type bfd_perform_relocation 444 (bfd *abfd, 445 arelent *reloc_entry, 446 void *data, 447 asection *input_section, 448 bfd *output_bfd, 449 char **error_message); 450@end example 451@strong{Description}@* 452If @var{output_bfd} is supplied to this function, the 453generated image will be relocatable; the relocations are 454copied to the output file after they have been changed to 455reflect the new state of the world. There are two ways of 456reflecting the results of partial linkage in an output file: 457by modifying the output data in place, and by modifying the 458relocation record. Some native formats (e.g., basic a.out and 459basic coff) have no way of specifying an addend in the 460relocation type, so the addend has to go in the output data. 461This is no big deal since in these formats the output data 462slot will always be big enough for the addend. Complex reloc 463types with addends were invented to solve just this problem. 464The @var{error_message} argument is set to an error message if 465this return @code{bfd_reloc_dangerous}. 466 467@findex bfd_install_relocation 468@subsubsection @code{bfd_install_relocation} 469@strong{Synopsis} 470@example 471bfd_reloc_status_type bfd_install_relocation 472 (bfd *abfd, 473 arelent *reloc_entry, 474 void *data, bfd_vma data_start, 475 asection *input_section, 476 char **error_message); 477@end example 478@strong{Description}@* 479This looks remarkably like @code{bfd_perform_relocation}, except it 480does not expect that the section contents have been filled in. 481I.e., it's suitable for use when creating, rather than applying 482a relocation. 483 484For now, this function should be considered reserved for the 485assembler. 486 487 488@node howto manager, , typedef arelent, Relocations 489@section The howto manager 490When an application wants to create a relocation, but doesn't 491know what the target machine might call it, it can find out by 492using this bit of code. 493 494@findex bfd_reloc_code_type 495@subsubsection @code{bfd_reloc_code_type} 496@strong{Description}@* 497The insides of a reloc code. The idea is that, eventually, there 498will be one enumerator for every type of relocation we ever do. 499Pass one of these values to @code{bfd_reloc_type_lookup}, and it'll 500return a howto pointer. 501 502This does mean that the application must determine the correct 503enumerator value; you can't get a howto pointer from a random set 504of attributes. 505 506Here are the possible values for @code{enum bfd_reloc_code_real}: 507 508@deffn {} BFD_RELOC_64 509@deffnx {} BFD_RELOC_32 510@deffnx {} BFD_RELOC_26 511@deffnx {} BFD_RELOC_24 512@deffnx {} BFD_RELOC_16 513@deffnx {} BFD_RELOC_14 514@deffnx {} BFD_RELOC_8 515Basic absolute relocations of N bits. 516@end deffn 517@deffn {} BFD_RELOC_64_PCREL 518@deffnx {} BFD_RELOC_32_PCREL 519@deffnx {} BFD_RELOC_24_PCREL 520@deffnx {} BFD_RELOC_16_PCREL 521@deffnx {} BFD_RELOC_12_PCREL 522@deffnx {} BFD_RELOC_8_PCREL 523PC-relative relocations. Sometimes these are relative to the address 524of the relocation itself; sometimes they are relative to the start of 525the section containing the relocation. It depends on the specific target. 526 527The 24-bit relocation is used in some Intel 960 configurations. 528@end deffn 529@deffn {} BFD_RELOC_32_GOT_PCREL 530@deffnx {} BFD_RELOC_16_GOT_PCREL 531@deffnx {} BFD_RELOC_8_GOT_PCREL 532@deffnx {} BFD_RELOC_32_GOTOFF 533@deffnx {} BFD_RELOC_16_GOTOFF 534@deffnx {} BFD_RELOC_LO16_GOTOFF 535@deffnx {} BFD_RELOC_HI16_GOTOFF 536@deffnx {} BFD_RELOC_HI16_S_GOTOFF 537@deffnx {} BFD_RELOC_8_GOTOFF 538@deffnx {} BFD_RELOC_64_PLT_PCREL 539@deffnx {} BFD_RELOC_32_PLT_PCREL 540@deffnx {} BFD_RELOC_24_PLT_PCREL 541@deffnx {} BFD_RELOC_16_PLT_PCREL 542@deffnx {} BFD_RELOC_8_PLT_PCREL 543@deffnx {} BFD_RELOC_64_PLTOFF 544@deffnx {} BFD_RELOC_32_PLTOFF 545@deffnx {} BFD_RELOC_16_PLTOFF 546@deffnx {} BFD_RELOC_LO16_PLTOFF 547@deffnx {} BFD_RELOC_HI16_PLTOFF 548@deffnx {} BFD_RELOC_HI16_S_PLTOFF 549@deffnx {} BFD_RELOC_8_PLTOFF 550For ELF. 551@end deffn 552@deffn {} BFD_RELOC_68K_GLOB_DAT 553@deffnx {} BFD_RELOC_68K_JMP_SLOT 554@deffnx {} BFD_RELOC_68K_RELATIVE 555Relocations used by 68K ELF. 556@end deffn 557@deffn {} BFD_RELOC_32_BASEREL 558@deffnx {} BFD_RELOC_16_BASEREL 559@deffnx {} BFD_RELOC_LO16_BASEREL 560@deffnx {} BFD_RELOC_HI16_BASEREL 561@deffnx {} BFD_RELOC_HI16_S_BASEREL 562@deffnx {} BFD_RELOC_8_BASEREL 563@deffnx {} BFD_RELOC_RVA 564Linkage-table relative. 565@end deffn 566@deffn {} BFD_RELOC_8_FFnn 567Absolute 8-bit relocation, but used to form an address like 0xFFnn. 568@end deffn 569@deffn {} BFD_RELOC_32_PCREL_S2 570@deffnx {} BFD_RELOC_16_PCREL_S2 571@deffnx {} BFD_RELOC_23_PCREL_S2 572These PC-relative relocations are stored as word displacements -- 573i.e., byte displacements shifted right two bits. The 30-bit word 574displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the 575SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The 576signed 16-bit displacement is used on the MIPS, and the 23-bit 577displacement is used on the Alpha. 578@end deffn 579@deffn {} BFD_RELOC_HI22 580@deffnx {} BFD_RELOC_LO10 581High 22 bits and low 10 bits of 32-bit value, placed into lower bits of 582the target word. These are used on the SPARC. 583@end deffn 584@deffn {} BFD_RELOC_GPREL16 585@deffnx {} BFD_RELOC_GPREL32 586For systems that allocate a Global Pointer register, these are 587displacements off that register. These relocation types are 588handled specially, because the value the register will have is 589decided relatively late. 590@end deffn 591@deffn {} BFD_RELOC_I960_CALLJ 592Reloc types used for i960/b.out. 593@end deffn 594@deffn {} BFD_RELOC_NONE 595@deffnx {} BFD_RELOC_SPARC_WDISP22 596@deffnx {} BFD_RELOC_SPARC22 597@deffnx {} BFD_RELOC_SPARC13 598@deffnx {} BFD_RELOC_SPARC_GOT10 599@deffnx {} BFD_RELOC_SPARC_GOT13 600@deffnx {} BFD_RELOC_SPARC_GOT22 601@deffnx {} BFD_RELOC_SPARC_PC10 602@deffnx {} BFD_RELOC_SPARC_PC22 603@deffnx {} BFD_RELOC_SPARC_WPLT30 604@deffnx {} BFD_RELOC_SPARC_COPY 605@deffnx {} BFD_RELOC_SPARC_GLOB_DAT 606@deffnx {} BFD_RELOC_SPARC_JMP_SLOT 607@deffnx {} BFD_RELOC_SPARC_RELATIVE 608@deffnx {} BFD_RELOC_SPARC_UA16 609@deffnx {} BFD_RELOC_SPARC_UA32 610@deffnx {} BFD_RELOC_SPARC_UA64 611SPARC ELF relocations. There is probably some overlap with other 612relocation types already defined. 613@end deffn 614@deffn {} BFD_RELOC_SPARC_BASE13 615@deffnx {} BFD_RELOC_SPARC_BASE22 616I think these are specific to SPARC a.out (e.g., Sun 4). 617@end deffn 618@deffn {} BFD_RELOC_SPARC_64 619@deffnx {} BFD_RELOC_SPARC_10 620@deffnx {} BFD_RELOC_SPARC_11 621@deffnx {} BFD_RELOC_SPARC_OLO10 622@deffnx {} BFD_RELOC_SPARC_HH22 623@deffnx {} BFD_RELOC_SPARC_HM10 624@deffnx {} BFD_RELOC_SPARC_LM22 625@deffnx {} BFD_RELOC_SPARC_PC_HH22 626@deffnx {} BFD_RELOC_SPARC_PC_HM10 627@deffnx {} BFD_RELOC_SPARC_PC_LM22 628@deffnx {} BFD_RELOC_SPARC_WDISP16 629@deffnx {} BFD_RELOC_SPARC_WDISP19 630@deffnx {} BFD_RELOC_SPARC_7 631@deffnx {} BFD_RELOC_SPARC_6 632@deffnx {} BFD_RELOC_SPARC_5 633@deffnx {} BFD_RELOC_SPARC_DISP64 634@deffnx {} BFD_RELOC_SPARC_PLT32 635@deffnx {} BFD_RELOC_SPARC_PLT64 636@deffnx {} BFD_RELOC_SPARC_HIX22 637@deffnx {} BFD_RELOC_SPARC_LOX10 638@deffnx {} BFD_RELOC_SPARC_H44 639@deffnx {} BFD_RELOC_SPARC_M44 640@deffnx {} BFD_RELOC_SPARC_L44 641@deffnx {} BFD_RELOC_SPARC_REGISTER 642SPARC64 relocations 643@end deffn 644@deffn {} BFD_RELOC_SPARC_REV32 645SPARC little endian relocation 646@end deffn 647@deffn {} BFD_RELOC_SPARC_TLS_GD_HI22 648@deffnx {} BFD_RELOC_SPARC_TLS_GD_LO10 649@deffnx {} BFD_RELOC_SPARC_TLS_GD_ADD 650@deffnx {} BFD_RELOC_SPARC_TLS_GD_CALL 651@deffnx {} BFD_RELOC_SPARC_TLS_LDM_HI22 652@deffnx {} BFD_RELOC_SPARC_TLS_LDM_LO10 653@deffnx {} BFD_RELOC_SPARC_TLS_LDM_ADD 654@deffnx {} BFD_RELOC_SPARC_TLS_LDM_CALL 655@deffnx {} BFD_RELOC_SPARC_TLS_LDO_HIX22 656@deffnx {} BFD_RELOC_SPARC_TLS_LDO_LOX10 657@deffnx {} BFD_RELOC_SPARC_TLS_LDO_ADD 658@deffnx {} BFD_RELOC_SPARC_TLS_IE_HI22 659@deffnx {} BFD_RELOC_SPARC_TLS_IE_LO10 660@deffnx {} BFD_RELOC_SPARC_TLS_IE_LD 661@deffnx {} BFD_RELOC_SPARC_TLS_IE_LDX 662@deffnx {} BFD_RELOC_SPARC_TLS_IE_ADD 663@deffnx {} BFD_RELOC_SPARC_TLS_LE_HIX22 664@deffnx {} BFD_RELOC_SPARC_TLS_LE_LOX10 665@deffnx {} BFD_RELOC_SPARC_TLS_DTPMOD32 666@deffnx {} BFD_RELOC_SPARC_TLS_DTPMOD64 667@deffnx {} BFD_RELOC_SPARC_TLS_DTPOFF32 668@deffnx {} BFD_RELOC_SPARC_TLS_DTPOFF64 669@deffnx {} BFD_RELOC_SPARC_TLS_TPOFF32 670@deffnx {} BFD_RELOC_SPARC_TLS_TPOFF64 671SPARC TLS relocations 672@end deffn 673@deffn {} BFD_RELOC_ALPHA_GPDISP_HI16 674Alpha ECOFF and ELF relocations. Some of these treat the symbol or 675"addend" in some special way. 676For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when 677writing; when reading, it will be the absolute section symbol. The 678addend is the displacement in bytes of the "lda" instruction from 679the "ldah" instruction (which is at the address of this reloc). 680@end deffn 681@deffn {} BFD_RELOC_ALPHA_GPDISP_LO16 682For GPDISP_LO16 ("ignore") relocations, the symbol is handled as 683with GPDISP_HI16 relocs. The addend is ignored when writing the 684relocations out, and is filled in with the file's GP value on 685reading, for convenience. 686@end deffn 687@deffn {} BFD_RELOC_ALPHA_GPDISP 688The ELF GPDISP relocation is exactly the same as the GPDISP_HI16 689relocation except that there is no accompanying GPDISP_LO16 690relocation. 691@end deffn 692@deffn {} BFD_RELOC_ALPHA_LITERAL 693@deffnx {} BFD_RELOC_ALPHA_ELF_LITERAL 694@deffnx {} BFD_RELOC_ALPHA_LITUSE 695The Alpha LITERAL/LITUSE relocs are produced by a symbol reference; 696the assembler turns it into a LDQ instruction to load the address of 697the symbol, and then fills in a register in the real instruction. 698 699The LITERAL reloc, at the LDQ instruction, refers to the .lita 700section symbol. The addend is ignored when writing, but is filled 701in with the file's GP value on reading, for convenience, as with the 702GPDISP_LO16 reloc. 703 704The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16. 705It should refer to the symbol to be referenced, as with 16_GOTOFF, 706but it generates output not based on the position within the .got 707section, but relative to the GP value chosen for the file during the 708final link stage. 709 710The LITUSE reloc, on the instruction using the loaded address, gives 711information to the linker that it might be able to use to optimize 712away some literal section references. The symbol is ignored (read 713as the absolute section symbol), and the "addend" indicates the type 714of instruction using the register: 7151 - "memory" fmt insn 7162 - byte-manipulation (byte offset reg) 7173 - jsr (target of branch) 718@end deffn 719@deffn {} BFD_RELOC_ALPHA_HINT 720The HINT relocation indicates a value that should be filled into the 721"hint" field of a jmp/jsr/ret instruction, for possible branch- 722prediction logic which may be provided on some processors. 723@end deffn 724@deffn {} BFD_RELOC_ALPHA_LINKAGE 725The LINKAGE relocation outputs a linkage pair in the object file, 726which is filled by the linker. 727@end deffn 728@deffn {} BFD_RELOC_ALPHA_CODEADDR 729The CODEADDR relocation outputs a STO_CA in the object file, 730which is filled by the linker. 731@end deffn 732@deffn {} BFD_RELOC_ALPHA_GPREL_HI16 733@deffnx {} BFD_RELOC_ALPHA_GPREL_LO16 734The GPREL_HI/LO relocations together form a 32-bit offset from the 735GP register. 736@end deffn 737@deffn {} BFD_RELOC_ALPHA_BRSGP 738Like BFD_RELOC_23_PCREL_S2, except that the source and target must 739share a common GP, and the target address is adjusted for 740STO_ALPHA_STD_GPLOAD. 741@end deffn 742@deffn {} BFD_RELOC_ALPHA_TLSGD 743@deffnx {} BFD_RELOC_ALPHA_TLSLDM 744@deffnx {} BFD_RELOC_ALPHA_DTPMOD64 745@deffnx {} BFD_RELOC_ALPHA_GOTDTPREL16 746@deffnx {} BFD_RELOC_ALPHA_DTPREL64 747@deffnx {} BFD_RELOC_ALPHA_DTPREL_HI16 748@deffnx {} BFD_RELOC_ALPHA_DTPREL_LO16 749@deffnx {} BFD_RELOC_ALPHA_DTPREL16 750@deffnx {} BFD_RELOC_ALPHA_GOTTPREL16 751@deffnx {} BFD_RELOC_ALPHA_TPREL64 752@deffnx {} BFD_RELOC_ALPHA_TPREL_HI16 753@deffnx {} BFD_RELOC_ALPHA_TPREL_LO16 754@deffnx {} BFD_RELOC_ALPHA_TPREL16 755Alpha thread-local storage relocations. 756@end deffn 757@deffn {} BFD_RELOC_MIPS_JMP 758Bits 27..2 of the relocation address shifted right 2 bits; 759simple reloc otherwise. 760@end deffn 761@deffn {} BFD_RELOC_MIPS16_JMP 762The MIPS16 jump instruction. 763@end deffn 764@deffn {} BFD_RELOC_MIPS16_GPREL 765MIPS16 GP relative reloc. 766@end deffn 767@deffn {} BFD_RELOC_HI16 768High 16 bits of 32-bit value; simple reloc. 769@end deffn 770@deffn {} BFD_RELOC_HI16_S 771High 16 bits of 32-bit value but the low 16 bits will be sign 772extended and added to form the final result. If the low 16 773bits form a negative number, we need to add one to the high value 774to compensate for the borrow when the low bits are added. 775@end deffn 776@deffn {} BFD_RELOC_LO16 777Low 16 bits. 778@end deffn 779@deffn {} BFD_RELOC_PCREL_HI16_S 780Like BFD_RELOC_HI16_S, but PC relative. 781@end deffn 782@deffn {} BFD_RELOC_PCREL_LO16 783Like BFD_RELOC_LO16, but PC relative. 784@end deffn 785@deffn {} BFD_RELOC_MIPS_LITERAL 786Relocation against a MIPS literal section. 787@end deffn 788@deffn {} BFD_RELOC_MIPS_GOT16 789@deffnx {} BFD_RELOC_MIPS_CALL16 790@deffnx {} BFD_RELOC_MIPS_GOT_HI16 791@deffnx {} BFD_RELOC_MIPS_GOT_LO16 792@deffnx {} BFD_RELOC_MIPS_CALL_HI16 793@deffnx {} BFD_RELOC_MIPS_CALL_LO16 794@deffnx {} BFD_RELOC_MIPS_SUB 795@deffnx {} BFD_RELOC_MIPS_GOT_PAGE 796@deffnx {} BFD_RELOC_MIPS_GOT_OFST 797@deffnx {} BFD_RELOC_MIPS_GOT_DISP 798@deffnx {} BFD_RELOC_MIPS_SHIFT5 799@deffnx {} BFD_RELOC_MIPS_SHIFT6 800@deffnx {} BFD_RELOC_MIPS_INSERT_A 801@deffnx {} BFD_RELOC_MIPS_INSERT_B 802@deffnx {} BFD_RELOC_MIPS_DELETE 803@deffnx {} BFD_RELOC_MIPS_HIGHEST 804@deffnx {} BFD_RELOC_MIPS_HIGHER 805@deffnx {} BFD_RELOC_MIPS_SCN_DISP 806@deffnx {} BFD_RELOC_MIPS_REL16 807@deffnx {} BFD_RELOC_MIPS_RELGOT 808@deffnx {} BFD_RELOC_MIPS_JALR 809MIPS ELF relocations. 810@end deffn 811@deffn {} BFD_RELOC_FRV_LABEL16 812@deffnx {} BFD_RELOC_FRV_LABEL24 813@deffnx {} BFD_RELOC_FRV_LO16 814@deffnx {} BFD_RELOC_FRV_HI16 815@deffnx {} BFD_RELOC_FRV_GPREL12 816@deffnx {} BFD_RELOC_FRV_GPRELU12 817@deffnx {} BFD_RELOC_FRV_GPREL32 818@deffnx {} BFD_RELOC_FRV_GPRELHI 819@deffnx {} BFD_RELOC_FRV_GPRELLO 820@deffnx {} BFD_RELOC_FRV_GOT12 821@deffnx {} BFD_RELOC_FRV_GOTHI 822@deffnx {} BFD_RELOC_FRV_GOTLO 823@deffnx {} BFD_RELOC_FRV_FUNCDESC 824@deffnx {} BFD_RELOC_FRV_FUNCDESC_GOT12 825@deffnx {} BFD_RELOC_FRV_FUNCDESC_GOTHI 826@deffnx {} BFD_RELOC_FRV_FUNCDESC_GOTLO 827@deffnx {} BFD_RELOC_FRV_FUNCDESC_VALUE 828@deffnx {} BFD_RELOC_FRV_FUNCDESC_GOTOFF12 829@deffnx {} BFD_RELOC_FRV_FUNCDESC_GOTOFFHI 830@deffnx {} BFD_RELOC_FRV_FUNCDESC_GOTOFFLO 831@deffnx {} BFD_RELOC_FRV_GOTOFF12 832@deffnx {} BFD_RELOC_FRV_GOTOFFHI 833@deffnx {} BFD_RELOC_FRV_GOTOFFLO 834Fujitsu Frv Relocations. 835@end deffn 836@deffn {} BFD_RELOC_MN10300_GOTOFF24 837This is a 24bit GOT-relative reloc for the mn10300. 838@end deffn 839@deffn {} BFD_RELOC_MN10300_GOT32 840This is a 32bit GOT-relative reloc for the mn10300, offset by two bytes 841in the instruction. 842@end deffn 843@deffn {} BFD_RELOC_MN10300_GOT24 844This is a 24bit GOT-relative reloc for the mn10300, offset by two bytes 845in the instruction. 846@end deffn 847@deffn {} BFD_RELOC_MN10300_GOT16 848This is a 16bit GOT-relative reloc for the mn10300, offset by two bytes 849in the instruction. 850@end deffn 851@deffn {} BFD_RELOC_MN10300_COPY 852Copy symbol at runtime. 853@end deffn 854@deffn {} BFD_RELOC_MN10300_GLOB_DAT 855Create GOT entry. 856@end deffn 857@deffn {} BFD_RELOC_MN10300_JMP_SLOT 858Create PLT entry. 859@end deffn 860@deffn {} BFD_RELOC_MN10300_RELATIVE 861Adjust by program base. 862@end deffn 863@deffn {} BFD_RELOC_386_GOT32 864@deffnx {} BFD_RELOC_386_PLT32 865@deffnx {} BFD_RELOC_386_COPY 866@deffnx {} BFD_RELOC_386_GLOB_DAT 867@deffnx {} BFD_RELOC_386_JUMP_SLOT 868@deffnx {} BFD_RELOC_386_RELATIVE 869@deffnx {} BFD_RELOC_386_GOTOFF 870@deffnx {} BFD_RELOC_386_GOTPC 871@deffnx {} BFD_RELOC_386_TLS_TPOFF 872@deffnx {} BFD_RELOC_386_TLS_IE 873@deffnx {} BFD_RELOC_386_TLS_GOTIE 874@deffnx {} BFD_RELOC_386_TLS_LE 875@deffnx {} BFD_RELOC_386_TLS_GD 876@deffnx {} BFD_RELOC_386_TLS_LDM 877@deffnx {} BFD_RELOC_386_TLS_LDO_32 878@deffnx {} BFD_RELOC_386_TLS_IE_32 879@deffnx {} BFD_RELOC_386_TLS_LE_32 880@deffnx {} BFD_RELOC_386_TLS_DTPMOD32 881@deffnx {} BFD_RELOC_386_TLS_DTPOFF32 882@deffnx {} BFD_RELOC_386_TLS_TPOFF32 883i386/elf relocations 884@end deffn 885@deffn {} BFD_RELOC_X86_64_GOT32 886@deffnx {} BFD_RELOC_X86_64_PLT32 887@deffnx {} BFD_RELOC_X86_64_COPY 888@deffnx {} BFD_RELOC_X86_64_GLOB_DAT 889@deffnx {} BFD_RELOC_X86_64_JUMP_SLOT 890@deffnx {} BFD_RELOC_X86_64_RELATIVE 891@deffnx {} BFD_RELOC_X86_64_GOTPCREL 892@deffnx {} BFD_RELOC_X86_64_32S 893@deffnx {} BFD_RELOC_X86_64_DTPMOD64 894@deffnx {} BFD_RELOC_X86_64_DTPOFF64 895@deffnx {} BFD_RELOC_X86_64_TPOFF64 896@deffnx {} BFD_RELOC_X86_64_TLSGD 897@deffnx {} BFD_RELOC_X86_64_TLSLD 898@deffnx {} BFD_RELOC_X86_64_DTPOFF32 899@deffnx {} BFD_RELOC_X86_64_GOTTPOFF 900@deffnx {} BFD_RELOC_X86_64_TPOFF32 901x86-64/elf relocations 902@end deffn 903@deffn {} BFD_RELOC_NS32K_IMM_8 904@deffnx {} BFD_RELOC_NS32K_IMM_16 905@deffnx {} BFD_RELOC_NS32K_IMM_32 906@deffnx {} BFD_RELOC_NS32K_IMM_8_PCREL 907@deffnx {} BFD_RELOC_NS32K_IMM_16_PCREL 908@deffnx {} BFD_RELOC_NS32K_IMM_32_PCREL 909@deffnx {} BFD_RELOC_NS32K_DISP_8 910@deffnx {} BFD_RELOC_NS32K_DISP_16 911@deffnx {} BFD_RELOC_NS32K_DISP_32 912@deffnx {} BFD_RELOC_NS32K_DISP_8_PCREL 913@deffnx {} BFD_RELOC_NS32K_DISP_16_PCREL 914@deffnx {} BFD_RELOC_NS32K_DISP_32_PCREL 915ns32k relocations 916@end deffn 917@deffn {} BFD_RELOC_PDP11_DISP_8_PCREL 918@deffnx {} BFD_RELOC_PDP11_DISP_6_PCREL 919PDP11 relocations 920@end deffn 921@deffn {} BFD_RELOC_PJ_CODE_HI16 922@deffnx {} BFD_RELOC_PJ_CODE_LO16 923@deffnx {} BFD_RELOC_PJ_CODE_DIR16 924@deffnx {} BFD_RELOC_PJ_CODE_DIR32 925@deffnx {} BFD_RELOC_PJ_CODE_REL16 926@deffnx {} BFD_RELOC_PJ_CODE_REL32 927Picojava relocs. Not all of these appear in object files. 928@end deffn 929@deffn {} BFD_RELOC_PPC_B26 930@deffnx {} BFD_RELOC_PPC_BA26 931@deffnx {} BFD_RELOC_PPC_TOC16 932@deffnx {} BFD_RELOC_PPC_B16 933@deffnx {} BFD_RELOC_PPC_B16_BRTAKEN 934@deffnx {} BFD_RELOC_PPC_B16_BRNTAKEN 935@deffnx {} BFD_RELOC_PPC_BA16 936@deffnx {} BFD_RELOC_PPC_BA16_BRTAKEN 937@deffnx {} BFD_RELOC_PPC_BA16_BRNTAKEN 938@deffnx {} BFD_RELOC_PPC_COPY 939@deffnx {} BFD_RELOC_PPC_GLOB_DAT 940@deffnx {} BFD_RELOC_PPC_JMP_SLOT 941@deffnx {} BFD_RELOC_PPC_RELATIVE 942@deffnx {} BFD_RELOC_PPC_LOCAL24PC 943@deffnx {} BFD_RELOC_PPC_EMB_NADDR32 944@deffnx {} BFD_RELOC_PPC_EMB_NADDR16 945@deffnx {} BFD_RELOC_PPC_EMB_NADDR16_LO 946@deffnx {} BFD_RELOC_PPC_EMB_NADDR16_HI 947@deffnx {} BFD_RELOC_PPC_EMB_NADDR16_HA 948@deffnx {} BFD_RELOC_PPC_EMB_SDAI16 949@deffnx {} BFD_RELOC_PPC_EMB_SDA2I16 950@deffnx {} BFD_RELOC_PPC_EMB_SDA2REL 951@deffnx {} BFD_RELOC_PPC_EMB_SDA21 952@deffnx {} BFD_RELOC_PPC_EMB_MRKREF 953@deffnx {} BFD_RELOC_PPC_EMB_RELSEC16 954@deffnx {} BFD_RELOC_PPC_EMB_RELST_LO 955@deffnx {} BFD_RELOC_PPC_EMB_RELST_HI 956@deffnx {} BFD_RELOC_PPC_EMB_RELST_HA 957@deffnx {} BFD_RELOC_PPC_EMB_BIT_FLD 958@deffnx {} BFD_RELOC_PPC_EMB_RELSDA 959@deffnx {} BFD_RELOC_PPC64_HIGHER 960@deffnx {} BFD_RELOC_PPC64_HIGHER_S 961@deffnx {} BFD_RELOC_PPC64_HIGHEST 962@deffnx {} BFD_RELOC_PPC64_HIGHEST_S 963@deffnx {} BFD_RELOC_PPC64_TOC16_LO 964@deffnx {} BFD_RELOC_PPC64_TOC16_HI 965@deffnx {} BFD_RELOC_PPC64_TOC16_HA 966@deffnx {} BFD_RELOC_PPC64_TOC 967@deffnx {} BFD_RELOC_PPC64_PLTGOT16 968@deffnx {} BFD_RELOC_PPC64_PLTGOT16_LO 969@deffnx {} BFD_RELOC_PPC64_PLTGOT16_HI 970@deffnx {} BFD_RELOC_PPC64_PLTGOT16_HA 971@deffnx {} BFD_RELOC_PPC64_ADDR16_DS 972@deffnx {} BFD_RELOC_PPC64_ADDR16_LO_DS 973@deffnx {} BFD_RELOC_PPC64_GOT16_DS 974@deffnx {} BFD_RELOC_PPC64_GOT16_LO_DS 975@deffnx {} BFD_RELOC_PPC64_PLT16_LO_DS 976@deffnx {} BFD_RELOC_PPC64_SECTOFF_DS 977@deffnx {} BFD_RELOC_PPC64_SECTOFF_LO_DS 978@deffnx {} BFD_RELOC_PPC64_TOC16_DS 979@deffnx {} BFD_RELOC_PPC64_TOC16_LO_DS 980@deffnx {} BFD_RELOC_PPC64_PLTGOT16_DS 981@deffnx {} BFD_RELOC_PPC64_PLTGOT16_LO_DS 982Power(rs6000) and PowerPC relocations. 983@end deffn 984@deffn {} BFD_RELOC_PPC_TLS 985@deffnx {} BFD_RELOC_PPC_DTPMOD 986@deffnx {} BFD_RELOC_PPC_TPREL16 987@deffnx {} BFD_RELOC_PPC_TPREL16_LO 988@deffnx {} BFD_RELOC_PPC_TPREL16_HI 989@deffnx {} BFD_RELOC_PPC_TPREL16_HA 990@deffnx {} BFD_RELOC_PPC_TPREL 991@deffnx {} BFD_RELOC_PPC_DTPREL16 992@deffnx {} BFD_RELOC_PPC_DTPREL16_LO 993@deffnx {} BFD_RELOC_PPC_DTPREL16_HI 994@deffnx {} BFD_RELOC_PPC_DTPREL16_HA 995@deffnx {} BFD_RELOC_PPC_DTPREL 996@deffnx {} BFD_RELOC_PPC_GOT_TLSGD16 997@deffnx {} BFD_RELOC_PPC_GOT_TLSGD16_LO 998@deffnx {} BFD_RELOC_PPC_GOT_TLSGD16_HI 999@deffnx {} BFD_RELOC_PPC_GOT_TLSGD16_HA 1000@deffnx {} BFD_RELOC_PPC_GOT_TLSLD16 1001@deffnx {} BFD_RELOC_PPC_GOT_TLSLD16_LO 1002@deffnx {} BFD_RELOC_PPC_GOT_TLSLD16_HI 1003@deffnx {} BFD_RELOC_PPC_GOT_TLSLD16_HA 1004@deffnx {} BFD_RELOC_PPC_GOT_TPREL16 1005@deffnx {} BFD_RELOC_PPC_GOT_TPREL16_LO 1006@deffnx {} BFD_RELOC_PPC_GOT_TPREL16_HI 1007@deffnx {} BFD_RELOC_PPC_GOT_TPREL16_HA 1008@deffnx {} BFD_RELOC_PPC_GOT_DTPREL16 1009@deffnx {} BFD_RELOC_PPC_GOT_DTPREL16_LO 1010@deffnx {} BFD_RELOC_PPC_GOT_DTPREL16_HI 1011@deffnx {} BFD_RELOC_PPC_GOT_DTPREL16_HA 1012@deffnx {} BFD_RELOC_PPC64_TPREL16_DS 1013@deffnx {} BFD_RELOC_PPC64_TPREL16_LO_DS 1014@deffnx {} BFD_RELOC_PPC64_TPREL16_HIGHER 1015@deffnx {} BFD_RELOC_PPC64_TPREL16_HIGHERA 1016@deffnx {} BFD_RELOC_PPC64_TPREL16_HIGHEST 1017@deffnx {} BFD_RELOC_PPC64_TPREL16_HIGHESTA 1018@deffnx {} BFD_RELOC_PPC64_DTPREL16_DS 1019@deffnx {} BFD_RELOC_PPC64_DTPREL16_LO_DS 1020@deffnx {} BFD_RELOC_PPC64_DTPREL16_HIGHER 1021@deffnx {} BFD_RELOC_PPC64_DTPREL16_HIGHERA 1022@deffnx {} BFD_RELOC_PPC64_DTPREL16_HIGHEST 1023@deffnx {} BFD_RELOC_PPC64_DTPREL16_HIGHESTA 1024PowerPC and PowerPC64 thread-local storage relocations. 1025@end deffn 1026@deffn {} BFD_RELOC_I370_D12 1027IBM 370/390 relocations 1028@end deffn 1029@deffn {} BFD_RELOC_CTOR 1030The type of reloc used to build a constructor table - at the moment 1031probably a 32 bit wide absolute relocation, but the target can choose. 1032It generally does map to one of the other relocation types. 1033@end deffn 1034@deffn {} BFD_RELOC_ARM_PCREL_BRANCH 1035ARM 26 bit pc-relative branch. The lowest two bits must be zero and are 1036not stored in the instruction. 1037@end deffn 1038@deffn {} BFD_RELOC_ARM_PCREL_BLX 1039ARM 26 bit pc-relative branch. The lowest bit must be zero and is 1040not stored in the instruction. The 2nd lowest bit comes from a 1 bit 1041field in the instruction. 1042@end deffn 1043@deffn {} BFD_RELOC_THUMB_PCREL_BLX 1044Thumb 22 bit pc-relative branch. The lowest bit must be zero and is 1045not stored in the instruction. The 2nd lowest bit comes from a 1 bit 1046field in the instruction. 1047@end deffn 1048@deffn {} BFD_RELOC_ARM_IMMEDIATE 1049@deffnx {} BFD_RELOC_ARM_ADRL_IMMEDIATE 1050@deffnx {} BFD_RELOC_ARM_OFFSET_IMM 1051@deffnx {} BFD_RELOC_ARM_SHIFT_IMM 1052@deffnx {} BFD_RELOC_ARM_SWI 1053@deffnx {} BFD_RELOC_ARM_MULTI 1054@deffnx {} BFD_RELOC_ARM_CP_OFF_IMM 1055@deffnx {} BFD_RELOC_ARM_CP_OFF_IMM_S2 1056@deffnx {} BFD_RELOC_ARM_ADR_IMM 1057@deffnx {} BFD_RELOC_ARM_LDR_IMM 1058@deffnx {} BFD_RELOC_ARM_LITERAL 1059@deffnx {} BFD_RELOC_ARM_IN_POOL 1060@deffnx {} BFD_RELOC_ARM_OFFSET_IMM8 1061@deffnx {} BFD_RELOC_ARM_HWLITERAL 1062@deffnx {} BFD_RELOC_ARM_THUMB_ADD 1063@deffnx {} BFD_RELOC_ARM_THUMB_IMM 1064@deffnx {} BFD_RELOC_ARM_THUMB_SHIFT 1065@deffnx {} BFD_RELOC_ARM_THUMB_OFFSET 1066@deffnx {} BFD_RELOC_ARM_GOT12 1067@deffnx {} BFD_RELOC_ARM_GOT32 1068@deffnx {} BFD_RELOC_ARM_JUMP_SLOT 1069@deffnx {} BFD_RELOC_ARM_COPY 1070@deffnx {} BFD_RELOC_ARM_GLOB_DAT 1071@deffnx {} BFD_RELOC_ARM_PLT32 1072@deffnx {} BFD_RELOC_ARM_RELATIVE 1073@deffnx {} BFD_RELOC_ARM_GOTOFF 1074@deffnx {} BFD_RELOC_ARM_GOTPC 1075These relocs are only used within the ARM assembler. They are not 1076(at present) written to any object files. 1077@end deffn 1078@deffn {} BFD_RELOC_SH_PCDISP8BY2 1079@deffnx {} BFD_RELOC_SH_PCDISP12BY2 1080@deffnx {} BFD_RELOC_SH_IMM4 1081@deffnx {} BFD_RELOC_SH_IMM4BY2 1082@deffnx {} BFD_RELOC_SH_IMM4BY4 1083@deffnx {} BFD_RELOC_SH_IMM8 1084@deffnx {} BFD_RELOC_SH_IMM8BY2 1085@deffnx {} BFD_RELOC_SH_IMM8BY4 1086@deffnx {} BFD_RELOC_SH_PCRELIMM8BY2 1087@deffnx {} BFD_RELOC_SH_PCRELIMM8BY4 1088@deffnx {} BFD_RELOC_SH_SWITCH16 1089@deffnx {} BFD_RELOC_SH_SWITCH32 1090@deffnx {} BFD_RELOC_SH_USES 1091@deffnx {} BFD_RELOC_SH_COUNT 1092@deffnx {} BFD_RELOC_SH_ALIGN 1093@deffnx {} BFD_RELOC_SH_CODE 1094@deffnx {} BFD_RELOC_SH_DATA 1095@deffnx {} BFD_RELOC_SH_LABEL 1096@deffnx {} BFD_RELOC_SH_LOOP_START 1097@deffnx {} BFD_RELOC_SH_LOOP_END 1098@deffnx {} BFD_RELOC_SH_COPY 1099@deffnx {} BFD_RELOC_SH_GLOB_DAT 1100@deffnx {} BFD_RELOC_SH_JMP_SLOT 1101@deffnx {} BFD_RELOC_SH_RELATIVE 1102@deffnx {} BFD_RELOC_SH_GOTPC 1103@deffnx {} BFD_RELOC_SH_GOT_LOW16 1104@deffnx {} BFD_RELOC_SH_GOT_MEDLOW16 1105@deffnx {} BFD_RELOC_SH_GOT_MEDHI16 1106@deffnx {} BFD_RELOC_SH_GOT_HI16 1107@deffnx {} BFD_RELOC_SH_GOTPLT_LOW16 1108@deffnx {} BFD_RELOC_SH_GOTPLT_MEDLOW16 1109@deffnx {} BFD_RELOC_SH_GOTPLT_MEDHI16 1110@deffnx {} BFD_RELOC_SH_GOTPLT_HI16 1111@deffnx {} BFD_RELOC_SH_PLT_LOW16 1112@deffnx {} BFD_RELOC_SH_PLT_MEDLOW16 1113@deffnx {} BFD_RELOC_SH_PLT_MEDHI16 1114@deffnx {} BFD_RELOC_SH_PLT_HI16 1115@deffnx {} BFD_RELOC_SH_GOTOFF_LOW16 1116@deffnx {} BFD_RELOC_SH_GOTOFF_MEDLOW16 1117@deffnx {} BFD_RELOC_SH_GOTOFF_MEDHI16 1118@deffnx {} BFD_RELOC_SH_GOTOFF_HI16 1119@deffnx {} BFD_RELOC_SH_GOTPC_LOW16 1120@deffnx {} BFD_RELOC_SH_GOTPC_MEDLOW16 1121@deffnx {} BFD_RELOC_SH_GOTPC_MEDHI16 1122@deffnx {} BFD_RELOC_SH_GOTPC_HI16 1123@deffnx {} BFD_RELOC_SH_COPY64 1124@deffnx {} BFD_RELOC_SH_GLOB_DAT64 1125@deffnx {} BFD_RELOC_SH_JMP_SLOT64 1126@deffnx {} BFD_RELOC_SH_RELATIVE64 1127@deffnx {} BFD_RELOC_SH_GOT10BY4 1128@deffnx {} BFD_RELOC_SH_GOT10BY8 1129@deffnx {} BFD_RELOC_SH_GOTPLT10BY4 1130@deffnx {} BFD_RELOC_SH_GOTPLT10BY8 1131@deffnx {} BFD_RELOC_SH_GOTPLT32 1132@deffnx {} BFD_RELOC_SH_SHMEDIA_CODE 1133@deffnx {} BFD_RELOC_SH_IMMU5 1134@deffnx {} BFD_RELOC_SH_IMMS6 1135@deffnx {} BFD_RELOC_SH_IMMS6BY32 1136@deffnx {} BFD_RELOC_SH_IMMU6 1137@deffnx {} BFD_RELOC_SH_IMMS10 1138@deffnx {} BFD_RELOC_SH_IMMS10BY2 1139@deffnx {} BFD_RELOC_SH_IMMS10BY4 1140@deffnx {} BFD_RELOC_SH_IMMS10BY8 1141@deffnx {} BFD_RELOC_SH_IMMS16 1142@deffnx {} BFD_RELOC_SH_IMMU16 1143@deffnx {} BFD_RELOC_SH_IMM_LOW16 1144@deffnx {} BFD_RELOC_SH_IMM_LOW16_PCREL 1145@deffnx {} BFD_RELOC_SH_IMM_MEDLOW16 1146@deffnx {} BFD_RELOC_SH_IMM_MEDLOW16_PCREL 1147@deffnx {} BFD_RELOC_SH_IMM_MEDHI16 1148@deffnx {} BFD_RELOC_SH_IMM_MEDHI16_PCREL 1149@deffnx {} BFD_RELOC_SH_IMM_HI16 1150@deffnx {} BFD_RELOC_SH_IMM_HI16_PCREL 1151@deffnx {} BFD_RELOC_SH_PT_16 1152@deffnx {} BFD_RELOC_SH_TLS_GD_32 1153@deffnx {} BFD_RELOC_SH_TLS_LD_32 1154@deffnx {} BFD_RELOC_SH_TLS_LDO_32 1155@deffnx {} BFD_RELOC_SH_TLS_IE_32 1156@deffnx {} BFD_RELOC_SH_TLS_LE_32 1157@deffnx {} BFD_RELOC_SH_TLS_DTPMOD32 1158@deffnx {} BFD_RELOC_SH_TLS_DTPOFF32 1159@deffnx {} BFD_RELOC_SH_TLS_TPOFF32 1160Renesas / SuperH SH relocs. Not all of these appear in object files. 1161@end deffn 1162@deffn {} BFD_RELOC_THUMB_PCREL_BRANCH9 1163@deffnx {} BFD_RELOC_THUMB_PCREL_BRANCH12 1164@deffnx {} BFD_RELOC_THUMB_PCREL_BRANCH23 1165Thumb 23-, 12- and 9-bit pc-relative branches. The lowest bit must 1166be zero and is not stored in the instruction. 1167@end deffn 1168@deffn {} BFD_RELOC_ARC_B22_PCREL 1169ARC Cores relocs. 1170ARC 22 bit pc-relative branch. The lowest two bits must be zero and are 1171not stored in the instruction. The high 20 bits are installed in bits 26 1172through 7 of the instruction. 1173@end deffn 1174@deffn {} BFD_RELOC_ARC_B26 1175ARC 26 bit absolute branch. The lowest two bits must be zero and are not 1176stored in the instruction. The high 24 bits are installed in bits 23 1177through 0. 1178@end deffn 1179@deffn {} BFD_RELOC_D10V_10_PCREL_R 1180Mitsubishi D10V relocs. 1181This is a 10-bit reloc with the right 2 bits 1182assumed to be 0. 1183@end deffn 1184@deffn {} BFD_RELOC_D10V_10_PCREL_L 1185Mitsubishi D10V relocs. 1186This is a 10-bit reloc with the right 2 bits 1187assumed to be 0. This is the same as the previous reloc 1188except it is in the left container, i.e., 1189shifted left 15 bits. 1190@end deffn 1191@deffn {} BFD_RELOC_D10V_18 1192This is an 18-bit reloc with the right 2 bits 1193assumed to be 0. 1194@end deffn 1195@deffn {} BFD_RELOC_D10V_18_PCREL 1196This is an 18-bit reloc with the right 2 bits 1197assumed to be 0. 1198@end deffn 1199@deffn {} BFD_RELOC_D30V_6 1200Mitsubishi D30V relocs. 1201This is a 6-bit absolute reloc. 1202@end deffn 1203@deffn {} BFD_RELOC_D30V_9_PCREL 1204This is a 6-bit pc-relative reloc with 1205the right 3 bits assumed to be 0. 1206@end deffn 1207@deffn {} BFD_RELOC_D30V_9_PCREL_R 1208This is a 6-bit pc-relative reloc with 1209the right 3 bits assumed to be 0. Same 1210as the previous reloc but on the right side 1211of the container. 1212@end deffn 1213@deffn {} BFD_RELOC_D30V_15 1214This is a 12-bit absolute reloc with the 1215right 3 bitsassumed to be 0. 1216@end deffn 1217@deffn {} BFD_RELOC_D30V_15_PCREL 1218This is a 12-bit pc-relative reloc with 1219the right 3 bits assumed to be 0. 1220@end deffn 1221@deffn {} BFD_RELOC_D30V_15_PCREL_R 1222This is a 12-bit pc-relative reloc with 1223the right 3 bits assumed to be 0. Same 1224as the previous reloc but on the right side 1225of the container. 1226@end deffn 1227@deffn {} BFD_RELOC_D30V_21 1228This is an 18-bit absolute reloc with 1229the right 3 bits assumed to be 0. 1230@end deffn 1231@deffn {} BFD_RELOC_D30V_21_PCREL 1232This is an 18-bit pc-relative reloc with 1233the right 3 bits assumed to be 0. 1234@end deffn 1235@deffn {} BFD_RELOC_D30V_21_PCREL_R 1236This is an 18-bit pc-relative reloc with 1237the right 3 bits assumed to be 0. Same 1238as the previous reloc but on the right side 1239of the container. 1240@end deffn 1241@deffn {} BFD_RELOC_D30V_32 1242This is a 32-bit absolute reloc. 1243@end deffn 1244@deffn {} BFD_RELOC_D30V_32_PCREL 1245This is a 32-bit pc-relative reloc. 1246@end deffn 1247@deffn {} BFD_RELOC_DLX_HI16_S 1248DLX relocs 1249@end deffn 1250@deffn {} BFD_RELOC_DLX_LO16 1251DLX relocs 1252@end deffn 1253@deffn {} BFD_RELOC_DLX_JMP26 1254DLX relocs 1255@end deffn 1256@deffn {} BFD_RELOC_M32R_24 1257Renesas M32R (formerly Mitsubishi M32R) relocs. 1258This is a 24 bit absolute address. 1259@end deffn 1260@deffn {} BFD_RELOC_M32R_10_PCREL 1261This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0. 1262@end deffn 1263@deffn {} BFD_RELOC_M32R_18_PCREL 1264This is an 18-bit reloc with the right 2 bits assumed to be 0. 1265@end deffn 1266@deffn {} BFD_RELOC_M32R_26_PCREL 1267This is a 26-bit reloc with the right 2 bits assumed to be 0. 1268@end deffn 1269@deffn {} BFD_RELOC_M32R_HI16_ULO 1270This is a 16-bit reloc containing the high 16 bits of an address 1271used when the lower 16 bits are treated as unsigned. 1272@end deffn 1273@deffn {} BFD_RELOC_M32R_HI16_SLO 1274This is a 16-bit reloc containing the high 16 bits of an address 1275used when the lower 16 bits are treated as signed. 1276@end deffn 1277@deffn {} BFD_RELOC_M32R_LO16 1278This is a 16-bit reloc containing the lower 16 bits of an address. 1279@end deffn 1280@deffn {} BFD_RELOC_M32R_SDA16 1281This is a 16-bit reloc containing the small data area offset for use in 1282add3, load, and store instructions. 1283@end deffn 1284@deffn {} BFD_RELOC_M32R_GOT24 1285@deffnx {} BFD_RELOC_M32R_26_PLTREL 1286@deffnx {} BFD_RELOC_M32R_COPY 1287@deffnx {} BFD_RELOC_M32R_GLOB_DAT 1288@deffnx {} BFD_RELOC_M32R_JMP_SLOT 1289@deffnx {} BFD_RELOC_M32R_RELATIVE 1290@deffnx {} BFD_RELOC_M32R_GOTOFF 1291@deffnx {} BFD_RELOC_M32R_GOTPC24 1292@deffnx {} BFD_RELOC_M32R_GOT16_HI_ULO 1293@deffnx {} BFD_RELOC_M32R_GOT16_HI_SLO 1294@deffnx {} BFD_RELOC_M32R_GOT16_LO 1295@deffnx {} BFD_RELOC_M32R_GOTPC_HI_ULO 1296@deffnx {} BFD_RELOC_M32R_GOTPC_HI_SLO 1297@deffnx {} BFD_RELOC_M32R_GOTPC_LO 1298For PIC. 1299@end deffn 1300@deffn {} BFD_RELOC_V850_9_PCREL 1301This is a 9-bit reloc 1302@end deffn 1303@deffn {} BFD_RELOC_V850_22_PCREL 1304This is a 22-bit reloc 1305@end deffn 1306@deffn {} BFD_RELOC_V850_SDA_16_16_OFFSET 1307This is a 16 bit offset from the short data area pointer. 1308@end deffn 1309@deffn {} BFD_RELOC_V850_SDA_15_16_OFFSET 1310This is a 16 bit offset (of which only 15 bits are used) from the 1311short data area pointer. 1312@end deffn 1313@deffn {} BFD_RELOC_V850_ZDA_16_16_OFFSET 1314This is a 16 bit offset from the zero data area pointer. 1315@end deffn 1316@deffn {} BFD_RELOC_V850_ZDA_15_16_OFFSET 1317This is a 16 bit offset (of which only 15 bits are used) from the 1318zero data area pointer. 1319@end deffn 1320@deffn {} BFD_RELOC_V850_TDA_6_8_OFFSET 1321This is an 8 bit offset (of which only 6 bits are used) from the 1322tiny data area pointer. 1323@end deffn 1324@deffn {} BFD_RELOC_V850_TDA_7_8_OFFSET 1325This is an 8bit offset (of which only 7 bits are used) from the tiny 1326data area pointer. 1327@end deffn 1328@deffn {} BFD_RELOC_V850_TDA_7_7_OFFSET 1329This is a 7 bit offset from the tiny data area pointer. 1330@end deffn 1331@deffn {} BFD_RELOC_V850_TDA_16_16_OFFSET 1332This is a 16 bit offset from the tiny data area pointer. 1333@end deffn 1334@deffn {} BFD_RELOC_V850_TDA_4_5_OFFSET 1335This is a 5 bit offset (of which only 4 bits are used) from the tiny 1336data area pointer. 1337@end deffn 1338@deffn {} BFD_RELOC_V850_TDA_4_4_OFFSET 1339This is a 4 bit offset from the tiny data area pointer. 1340@end deffn 1341@deffn {} BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET 1342This is a 16 bit offset from the short data area pointer, with the 1343bits placed non-contiguously in the instruction. 1344@end deffn 1345@deffn {} BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET 1346This is a 16 bit offset from the zero data area pointer, with the 1347bits placed non-contiguously in the instruction. 1348@end deffn 1349@deffn {} BFD_RELOC_V850_CALLT_6_7_OFFSET 1350This is a 6 bit offset from the call table base pointer. 1351@end deffn 1352@deffn {} BFD_RELOC_V850_CALLT_16_16_OFFSET 1353This is a 16 bit offset from the call table base pointer. 1354@end deffn 1355@deffn {} BFD_RELOC_V850_LONGCALL 1356Used for relaxing indirect function calls. 1357@end deffn 1358@deffn {} BFD_RELOC_V850_LONGJUMP 1359Used for relaxing indirect jumps. 1360@end deffn 1361@deffn {} BFD_RELOC_V850_ALIGN 1362Used to maintain alignment whilst relaxing. 1363@end deffn 1364@deffn {} BFD_RELOC_MN10300_32_PCREL 1365This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the 1366instruction. 1367@end deffn 1368@deffn {} BFD_RELOC_MN10300_16_PCREL 1369This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the 1370instruction. 1371@end deffn 1372@deffn {} BFD_RELOC_TIC30_LDP 1373This is a 8bit DP reloc for the tms320c30, where the most 1374significant 8 bits of a 24 bit word are placed into the least 1375significant 8 bits of the opcode. 1376@end deffn 1377@deffn {} BFD_RELOC_TIC54X_PARTLS7 1378This is a 7bit reloc for the tms320c54x, where the least 1379significant 7 bits of a 16 bit word are placed into the least 1380significant 7 bits of the opcode. 1381@end deffn 1382@deffn {} BFD_RELOC_TIC54X_PARTMS9 1383This is a 9bit DP reloc for the tms320c54x, where the most 1384significant 9 bits of a 16 bit word are placed into the least 1385significant 9 bits of the opcode. 1386@end deffn 1387@deffn {} BFD_RELOC_TIC54X_23 1388This is an extended address 23-bit reloc for the tms320c54x. 1389@end deffn 1390@deffn {} BFD_RELOC_TIC54X_16_OF_23 1391This is a 16-bit reloc for the tms320c54x, where the least 1392significant 16 bits of a 23-bit extended address are placed into 1393the opcode. 1394@end deffn 1395@deffn {} BFD_RELOC_TIC54X_MS7_OF_23 1396This is a reloc for the tms320c54x, where the most 1397significant 7 bits of a 23-bit extended address are placed into 1398the opcode. 1399@end deffn 1400@deffn {} BFD_RELOC_FR30_48 1401This is a 48 bit reloc for the FR30 that stores 32 bits. 1402@end deffn 1403@deffn {} BFD_RELOC_FR30_20 1404This is a 32 bit reloc for the FR30 that stores 20 bits split up into 1405two sections. 1406@end deffn 1407@deffn {} BFD_RELOC_FR30_6_IN_4 1408This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in 14094 bits. 1410@end deffn 1411@deffn {} BFD_RELOC_FR30_8_IN_8 1412This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset 1413into 8 bits. 1414@end deffn 1415@deffn {} BFD_RELOC_FR30_9_IN_8 1416This is a 16 bit reloc for the FR30 that stores a 9 bit short offset 1417into 8 bits. 1418@end deffn 1419@deffn {} BFD_RELOC_FR30_10_IN_8 1420This is a 16 bit reloc for the FR30 that stores a 10 bit word offset 1421into 8 bits. 1422@end deffn 1423@deffn {} BFD_RELOC_FR30_9_PCREL 1424This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative 1425short offset into 8 bits. 1426@end deffn 1427@deffn {} BFD_RELOC_FR30_12_PCREL 1428This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative 1429short offset into 11 bits. 1430@end deffn 1431@deffn {} BFD_RELOC_MCORE_PCREL_IMM8BY4 1432@deffnx {} BFD_RELOC_MCORE_PCREL_IMM11BY2 1433@deffnx {} BFD_RELOC_MCORE_PCREL_IMM4BY2 1434@deffnx {} BFD_RELOC_MCORE_PCREL_32 1435@deffnx {} BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2 1436@deffnx {} BFD_RELOC_MCORE_RVA 1437Motorola Mcore relocations. 1438@end deffn 1439@deffn {} BFD_RELOC_MMIX_GETA 1440@deffnx {} BFD_RELOC_MMIX_GETA_1 1441@deffnx {} BFD_RELOC_MMIX_GETA_2 1442@deffnx {} BFD_RELOC_MMIX_GETA_3 1443These are relocations for the GETA instruction. 1444@end deffn 1445@deffn {} BFD_RELOC_MMIX_CBRANCH 1446@deffnx {} BFD_RELOC_MMIX_CBRANCH_J 1447@deffnx {} BFD_RELOC_MMIX_CBRANCH_1 1448@deffnx {} BFD_RELOC_MMIX_CBRANCH_2 1449@deffnx {} BFD_RELOC_MMIX_CBRANCH_3 1450These are relocations for a conditional branch instruction. 1451@end deffn 1452@deffn {} BFD_RELOC_MMIX_PUSHJ 1453@deffnx {} BFD_RELOC_MMIX_PUSHJ_1 1454@deffnx {} BFD_RELOC_MMIX_PUSHJ_2 1455@deffnx {} BFD_RELOC_MMIX_PUSHJ_3 1456@deffnx {} BFD_RELOC_MMIX_PUSHJ_STUBBABLE 1457These are relocations for the PUSHJ instruction. 1458@end deffn 1459@deffn {} BFD_RELOC_MMIX_JMP 1460@deffnx {} BFD_RELOC_MMIX_JMP_1 1461@deffnx {} BFD_RELOC_MMIX_JMP_2 1462@deffnx {} BFD_RELOC_MMIX_JMP_3 1463These are relocations for the JMP instruction. 1464@end deffn 1465@deffn {} BFD_RELOC_MMIX_ADDR19 1466This is a relocation for a relative address as in a GETA instruction or 1467a branch. 1468@end deffn 1469@deffn {} BFD_RELOC_MMIX_ADDR27 1470This is a relocation for a relative address as in a JMP instruction. 1471@end deffn 1472@deffn {} BFD_RELOC_MMIX_REG_OR_BYTE 1473This is a relocation for an instruction field that may be a general 1474register or a value 0..255. 1475@end deffn 1476@deffn {} BFD_RELOC_MMIX_REG 1477This is a relocation for an instruction field that may be a general 1478register. 1479@end deffn 1480@deffn {} BFD_RELOC_MMIX_BASE_PLUS_OFFSET 1481This is a relocation for two instruction fields holding a register and 1482an offset, the equivalent of the relocation. 1483@end deffn 1484@deffn {} BFD_RELOC_MMIX_LOCAL 1485This relocation is an assertion that the expression is not allocated as 1486a global register. It does not modify contents. 1487@end deffn 1488@deffn {} BFD_RELOC_AVR_7_PCREL 1489This is a 16 bit reloc for the AVR that stores 8 bit pc relative 1490short offset into 7 bits. 1491@end deffn 1492@deffn {} BFD_RELOC_AVR_13_PCREL 1493This is a 16 bit reloc for the AVR that stores 13 bit pc relative 1494short offset into 12 bits. 1495@end deffn 1496@deffn {} BFD_RELOC_AVR_16_PM 1497This is a 16 bit reloc for the AVR that stores 17 bit value (usually 1498program memory address) into 16 bits. 1499@end deffn 1500@deffn {} BFD_RELOC_AVR_LO8_LDI 1501This is a 16 bit reloc for the AVR that stores 8 bit value (usually 1502data memory address) into 8 bit immediate value of LDI insn. 1503@end deffn 1504@deffn {} BFD_RELOC_AVR_HI8_LDI 1505This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit 1506of data memory address) into 8 bit immediate value of LDI insn. 1507@end deffn 1508@deffn {} BFD_RELOC_AVR_HH8_LDI 1509This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit 1510of program memory address) into 8 bit immediate value of LDI insn. 1511@end deffn 1512@deffn {} BFD_RELOC_AVR_LO8_LDI_NEG 1513This is a 16 bit reloc for the AVR that stores negated 8 bit value 1514(usually data memory address) into 8 bit immediate value of SUBI insn. 1515@end deffn 1516@deffn {} BFD_RELOC_AVR_HI8_LDI_NEG 1517This is a 16 bit reloc for the AVR that stores negated 8 bit value 1518(high 8 bit of data memory address) into 8 bit immediate value of 1519SUBI insn. 1520@end deffn 1521@deffn {} BFD_RELOC_AVR_HH8_LDI_NEG 1522This is a 16 bit reloc for the AVR that stores negated 8 bit value 1523(most high 8 bit of program memory address) into 8 bit immediate value 1524of LDI or SUBI insn. 1525@end deffn 1526@deffn {} BFD_RELOC_AVR_LO8_LDI_PM 1527This is a 16 bit reloc for the AVR that stores 8 bit value (usually 1528command address) into 8 bit immediate value of LDI insn. 1529@end deffn 1530@deffn {} BFD_RELOC_AVR_HI8_LDI_PM 1531This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit 1532of command address) into 8 bit immediate value of LDI insn. 1533@end deffn 1534@deffn {} BFD_RELOC_AVR_HH8_LDI_PM 1535This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit 1536of command address) into 8 bit immediate value of LDI insn. 1537@end deffn 1538@deffn {} BFD_RELOC_AVR_LO8_LDI_PM_NEG 1539This is a 16 bit reloc for the AVR that stores negated 8 bit value 1540(usually command address) into 8 bit immediate value of SUBI insn. 1541@end deffn 1542@deffn {} BFD_RELOC_AVR_HI8_LDI_PM_NEG 1543This is a 16 bit reloc for the AVR that stores negated 8 bit value 1544(high 8 bit of 16 bit command address) into 8 bit immediate value 1545of SUBI insn. 1546@end deffn 1547@deffn {} BFD_RELOC_AVR_HH8_LDI_PM_NEG 1548This is a 16 bit reloc for the AVR that stores negated 8 bit value 1549(high 6 bit of 22 bit command address) into 8 bit immediate 1550value of SUBI insn. 1551@end deffn 1552@deffn {} BFD_RELOC_AVR_CALL 1553This is a 32 bit reloc for the AVR that stores 23 bit value 1554into 22 bits. 1555@end deffn 1556@deffn {} BFD_RELOC_390_12 1557Direct 12 bit. 1558@end deffn 1559@deffn {} BFD_RELOC_390_GOT12 156012 bit GOT offset. 1561@end deffn 1562@deffn {} BFD_RELOC_390_PLT32 156332 bit PC relative PLT address. 1564@end deffn 1565@deffn {} BFD_RELOC_390_COPY 1566Copy symbol at runtime. 1567@end deffn 1568@deffn {} BFD_RELOC_390_GLOB_DAT 1569Create GOT entry. 1570@end deffn 1571@deffn {} BFD_RELOC_390_JMP_SLOT 1572Create PLT entry. 1573@end deffn 1574@deffn {} BFD_RELOC_390_RELATIVE 1575Adjust by program base. 1576@end deffn 1577@deffn {} BFD_RELOC_390_GOTPC 157832 bit PC relative offset to GOT. 1579@end deffn 1580@deffn {} BFD_RELOC_390_GOT16 158116 bit GOT offset. 1582@end deffn 1583@deffn {} BFD_RELOC_390_PC16DBL 1584PC relative 16 bit shifted by 1. 1585@end deffn 1586@deffn {} BFD_RELOC_390_PLT16DBL 158716 bit PC rel. PLT shifted by 1. 1588@end deffn 1589@deffn {} BFD_RELOC_390_PC32DBL 1590PC relative 32 bit shifted by 1. 1591@end deffn 1592@deffn {} BFD_RELOC_390_PLT32DBL 159332 bit PC rel. PLT shifted by 1. 1594@end deffn 1595@deffn {} BFD_RELOC_390_GOTPCDBL 159632 bit PC rel. GOT shifted by 1. 1597@end deffn 1598@deffn {} BFD_RELOC_390_GOT64 159964 bit GOT offset. 1600@end deffn 1601@deffn {} BFD_RELOC_390_PLT64 160264 bit PC relative PLT address. 1603@end deffn 1604@deffn {} BFD_RELOC_390_GOTENT 160532 bit rel. offset to GOT entry. 1606@end deffn 1607@deffn {} BFD_RELOC_390_GOTOFF64 160864 bit offset to GOT. 1609@end deffn 1610@deffn {} BFD_RELOC_390_GOTPLT12 161112-bit offset to symbol-entry within GOT, with PLT handling. 1612@end deffn 1613@deffn {} BFD_RELOC_390_GOTPLT16 161416-bit offset to symbol-entry within GOT, with PLT handling. 1615@end deffn 1616@deffn {} BFD_RELOC_390_GOTPLT32 161732-bit offset to symbol-entry within GOT, with PLT handling. 1618@end deffn 1619@deffn {} BFD_RELOC_390_GOTPLT64 162064-bit offset to symbol-entry within GOT, with PLT handling. 1621@end deffn 1622@deffn {} BFD_RELOC_390_GOTPLTENT 162332-bit rel. offset to symbol-entry within GOT, with PLT handling. 1624@end deffn 1625@deffn {} BFD_RELOC_390_PLTOFF16 162616-bit rel. offset from the GOT to a PLT entry. 1627@end deffn 1628@deffn {} BFD_RELOC_390_PLTOFF32 162932-bit rel. offset from the GOT to a PLT entry. 1630@end deffn 1631@deffn {} BFD_RELOC_390_PLTOFF64 163264-bit rel. offset from the GOT to a PLT entry. 1633@end deffn 1634@deffn {} BFD_RELOC_390_TLS_LOAD 1635@deffnx {} BFD_RELOC_390_TLS_GDCALL 1636@deffnx {} BFD_RELOC_390_TLS_LDCALL 1637@deffnx {} BFD_RELOC_390_TLS_GD32 1638@deffnx {} BFD_RELOC_390_TLS_GD64 1639@deffnx {} BFD_RELOC_390_TLS_GOTIE12 1640@deffnx {} BFD_RELOC_390_TLS_GOTIE32 1641@deffnx {} BFD_RELOC_390_TLS_GOTIE64 1642@deffnx {} BFD_RELOC_390_TLS_LDM32 1643@deffnx {} BFD_RELOC_390_TLS_LDM64 1644@deffnx {} BFD_RELOC_390_TLS_IE32 1645@deffnx {} BFD_RELOC_390_TLS_IE64 1646@deffnx {} BFD_RELOC_390_TLS_IEENT 1647@deffnx {} BFD_RELOC_390_TLS_LE32 1648@deffnx {} BFD_RELOC_390_TLS_LE64 1649@deffnx {} BFD_RELOC_390_TLS_LDO32 1650@deffnx {} BFD_RELOC_390_TLS_LDO64 1651@deffnx {} BFD_RELOC_390_TLS_DTPMOD 1652@deffnx {} BFD_RELOC_390_TLS_DTPOFF 1653@deffnx {} BFD_RELOC_390_TLS_TPOFF 1654s390 tls relocations. 1655@end deffn 1656@deffn {} BFD_RELOC_390_20 1657@deffnx {} BFD_RELOC_390_GOT20 1658@deffnx {} BFD_RELOC_390_GOTPLT20 1659@deffnx {} BFD_RELOC_390_TLS_GOTIE20 1660Long displacement extension. 1661@end deffn 1662@deffn {} BFD_RELOC_IP2K_FR9 1663Scenix IP2K - 9-bit register number / data address 1664@end deffn 1665@deffn {} BFD_RELOC_IP2K_BANK 1666Scenix IP2K - 4-bit register/data bank number 1667@end deffn 1668@deffn {} BFD_RELOC_IP2K_ADDR16CJP 1669Scenix IP2K - low 13 bits of instruction word address 1670@end deffn 1671@deffn {} BFD_RELOC_IP2K_PAGE3 1672Scenix IP2K - high 3 bits of instruction word address 1673@end deffn 1674@deffn {} BFD_RELOC_IP2K_LO8DATA 1675@deffnx {} BFD_RELOC_IP2K_HI8DATA 1676@deffnx {} BFD_RELOC_IP2K_EX8DATA 1677Scenix IP2K - ext/low/high 8 bits of data address 1678@end deffn 1679@deffn {} BFD_RELOC_IP2K_LO8INSN 1680@deffnx {} BFD_RELOC_IP2K_HI8INSN 1681Scenix IP2K - low/high 8 bits of instruction word address 1682@end deffn 1683@deffn {} BFD_RELOC_IP2K_PC_SKIP 1684Scenix IP2K - even/odd PC modifier to modify snb pcl.0 1685@end deffn 1686@deffn {} BFD_RELOC_IP2K_TEXT 1687Scenix IP2K - 16 bit word address in text section. 1688@end deffn 1689@deffn {} BFD_RELOC_IP2K_FR_OFFSET 1690Scenix IP2K - 7-bit sp or dp offset 1691@end deffn 1692@deffn {} BFD_RELOC_VPE4KMATH_DATA 1693@deffnx {} BFD_RELOC_VPE4KMATH_INSN 1694Scenix VPE4K coprocessor - data/insn-space addressing 1695@end deffn 1696@deffn {} BFD_RELOC_VTABLE_INHERIT 1697@deffnx {} BFD_RELOC_VTABLE_ENTRY 1698These two relocations are used by the linker to determine which of 1699the entries in a C++ virtual function table are actually used. When 1700the --gc-sections option is given, the linker will zero out the entries 1701that are not used, so that the code for those functions need not be 1702included in the output. 1703 1704VTABLE_INHERIT is a zero-space relocation used to describe to the 1705linker the inheritance tree of a C++ virtual function table. The 1706relocation's symbol should be the parent class' vtable, and the 1707relocation should be located at the child vtable. 1708 1709VTABLE_ENTRY is a zero-space relocation that describes the use of a 1710virtual function table entry. The reloc's symbol should refer to the 1711table of the class mentioned in the code. Off of that base, an offset 1712describes the entry that is being used. For Rela hosts, this offset 1713is stored in the reloc's addend. For Rel hosts, we are forced to put 1714this offset in the reloc's section offset. 1715@end deffn 1716@deffn {} BFD_RELOC_IA64_IMM14 1717@deffnx {} BFD_RELOC_IA64_IMM22 1718@deffnx {} BFD_RELOC_IA64_IMM64 1719@deffnx {} BFD_RELOC_IA64_DIR32MSB 1720@deffnx {} BFD_RELOC_IA64_DIR32LSB 1721@deffnx {} BFD_RELOC_IA64_DIR64MSB 1722@deffnx {} BFD_RELOC_IA64_DIR64LSB 1723@deffnx {} BFD_RELOC_IA64_GPREL22 1724@deffnx {} BFD_RELOC_IA64_GPREL64I 1725@deffnx {} BFD_RELOC_IA64_GPREL32MSB 1726@deffnx {} BFD_RELOC_IA64_GPREL32LSB 1727@deffnx {} BFD_RELOC_IA64_GPREL64MSB 1728@deffnx {} BFD_RELOC_IA64_GPREL64LSB 1729@deffnx {} BFD_RELOC_IA64_LTOFF22 1730@deffnx {} BFD_RELOC_IA64_LTOFF64I 1731@deffnx {} BFD_RELOC_IA64_PLTOFF22 1732@deffnx {} BFD_RELOC_IA64_PLTOFF64I 1733@deffnx {} BFD_RELOC_IA64_PLTOFF64MSB 1734@deffnx {} BFD_RELOC_IA64_PLTOFF64LSB 1735@deffnx {} BFD_RELOC_IA64_FPTR64I 1736@deffnx {} BFD_RELOC_IA64_FPTR32MSB 1737@deffnx {} BFD_RELOC_IA64_FPTR32LSB 1738@deffnx {} BFD_RELOC_IA64_FPTR64MSB 1739@deffnx {} BFD_RELOC_IA64_FPTR64LSB 1740@deffnx {} BFD_RELOC_IA64_PCREL21B 1741@deffnx {} BFD_RELOC_IA64_PCREL21BI 1742@deffnx {} BFD_RELOC_IA64_PCREL21M 1743@deffnx {} BFD_RELOC_IA64_PCREL21F 1744@deffnx {} BFD_RELOC_IA64_PCREL22 1745@deffnx {} BFD_RELOC_IA64_PCREL60B 1746@deffnx {} BFD_RELOC_IA64_PCREL64I 1747@deffnx {} BFD_RELOC_IA64_PCREL32MSB 1748@deffnx {} BFD_RELOC_IA64_PCREL32LSB 1749@deffnx {} BFD_RELOC_IA64_PCREL64MSB 1750@deffnx {} BFD_RELOC_IA64_PCREL64LSB 1751@deffnx {} BFD_RELOC_IA64_LTOFF_FPTR22 1752@deffnx {} BFD_RELOC_IA64_LTOFF_FPTR64I 1753@deffnx {} BFD_RELOC_IA64_LTOFF_FPTR32MSB 1754@deffnx {} BFD_RELOC_IA64_LTOFF_FPTR32LSB 1755@deffnx {} BFD_RELOC_IA64_LTOFF_FPTR64MSB 1756@deffnx {} BFD_RELOC_IA64_LTOFF_FPTR64LSB 1757@deffnx {} BFD_RELOC_IA64_SEGREL32MSB 1758@deffnx {} BFD_RELOC_IA64_SEGREL32LSB 1759@deffnx {} BFD_RELOC_IA64_SEGREL64MSB 1760@deffnx {} BFD_RELOC_IA64_SEGREL64LSB 1761@deffnx {} BFD_RELOC_IA64_SECREL32MSB 1762@deffnx {} BFD_RELOC_IA64_SECREL32LSB 1763@deffnx {} BFD_RELOC_IA64_SECREL64MSB 1764@deffnx {} BFD_RELOC_IA64_SECREL64LSB 1765@deffnx {} BFD_RELOC_IA64_REL32MSB 1766@deffnx {} BFD_RELOC_IA64_REL32LSB 1767@deffnx {} BFD_RELOC_IA64_REL64MSB 1768@deffnx {} BFD_RELOC_IA64_REL64LSB 1769@deffnx {} BFD_RELOC_IA64_LTV32MSB 1770@deffnx {} BFD_RELOC_IA64_LTV32LSB 1771@deffnx {} BFD_RELOC_IA64_LTV64MSB 1772@deffnx {} BFD_RELOC_IA64_LTV64LSB 1773@deffnx {} BFD_RELOC_IA64_IPLTMSB 1774@deffnx {} BFD_RELOC_IA64_IPLTLSB 1775@deffnx {} BFD_RELOC_IA64_COPY 1776@deffnx {} BFD_RELOC_IA64_LTOFF22X 1777@deffnx {} BFD_RELOC_IA64_LDXMOV 1778@deffnx {} BFD_RELOC_IA64_TPREL14 1779@deffnx {} BFD_RELOC_IA64_TPREL22 1780@deffnx {} BFD_RELOC_IA64_TPREL64I 1781@deffnx {} BFD_RELOC_IA64_TPREL64MSB 1782@deffnx {} BFD_RELOC_IA64_TPREL64LSB 1783@deffnx {} BFD_RELOC_IA64_LTOFF_TPREL22 1784@deffnx {} BFD_RELOC_IA64_DTPMOD64MSB 1785@deffnx {} BFD_RELOC_IA64_DTPMOD64LSB 1786@deffnx {} BFD_RELOC_IA64_LTOFF_DTPMOD22 1787@deffnx {} BFD_RELOC_IA64_DTPREL14 1788@deffnx {} BFD_RELOC_IA64_DTPREL22 1789@deffnx {} BFD_RELOC_IA64_DTPREL64I 1790@deffnx {} BFD_RELOC_IA64_DTPREL32MSB 1791@deffnx {} BFD_RELOC_IA64_DTPREL32LSB 1792@deffnx {} BFD_RELOC_IA64_DTPREL64MSB 1793@deffnx {} BFD_RELOC_IA64_DTPREL64LSB 1794@deffnx {} BFD_RELOC_IA64_LTOFF_DTPREL22 1795Intel IA64 Relocations. 1796@end deffn 1797@deffn {} BFD_RELOC_M68HC11_HI8 1798Motorola 68HC11 reloc. 1799This is the 8 bit high part of an absolute address. 1800@end deffn 1801@deffn {} BFD_RELOC_M68HC11_LO8 1802Motorola 68HC11 reloc. 1803This is the 8 bit low part of an absolute address. 1804@end deffn 1805@deffn {} BFD_RELOC_M68HC11_3B 1806Motorola 68HC11 reloc. 1807This is the 3 bit of a value. 1808@end deffn 1809@deffn {} BFD_RELOC_M68HC11_RL_JUMP 1810Motorola 68HC11 reloc. 1811This reloc marks the beginning of a jump/call instruction. 1812It is used for linker relaxation to correctly identify beginning 1813of instruction and change some branches to use PC-relative 1814addressing mode. 1815@end deffn 1816@deffn {} BFD_RELOC_M68HC11_RL_GROUP 1817Motorola 68HC11 reloc. 1818This reloc marks a group of several instructions that gcc generates 1819and for which the linker relaxation pass can modify and/or remove 1820some of them. 1821@end deffn 1822@deffn {} BFD_RELOC_M68HC11_LO16 1823Motorola 68HC11 reloc. 1824This is the 16-bit lower part of an address. It is used for 'call' 1825instruction to specify the symbol address without any special 1826transformation (due to memory bank window). 1827@end deffn 1828@deffn {} BFD_RELOC_M68HC11_PAGE 1829Motorola 68HC11 reloc. 1830This is a 8-bit reloc that specifies the page number of an address. 1831It is used by 'call' instruction to specify the page number of 1832the symbol. 1833@end deffn 1834@deffn {} BFD_RELOC_M68HC11_24 1835Motorola 68HC11 reloc. 1836This is a 24-bit reloc that represents the address with a 16-bit 1837value and a 8-bit page number. The symbol address is transformed 1838to follow the 16K memory bank of 68HC12 (seen as mapped in the window). 1839@end deffn 1840@deffn {} BFD_RELOC_M68HC12_5B 1841Motorola 68HC12 reloc. 1842This is the 5 bits of a value. 1843@end deffn 1844@deffn {} BFD_RELOC_CRIS_BDISP8 1845@deffnx {} BFD_RELOC_CRIS_UNSIGNED_5 1846@deffnx {} BFD_RELOC_CRIS_SIGNED_6 1847@deffnx {} BFD_RELOC_CRIS_UNSIGNED_6 1848@deffnx {} BFD_RELOC_CRIS_UNSIGNED_4 1849These relocs are only used within the CRIS assembler. They are not 1850(at present) written to any object files. 1851@end deffn 1852@deffn {} BFD_RELOC_CRIS_COPY 1853@deffnx {} BFD_RELOC_CRIS_GLOB_DAT 1854@deffnx {} BFD_RELOC_CRIS_JUMP_SLOT 1855@deffnx {} BFD_RELOC_CRIS_RELATIVE 1856Relocs used in ELF shared libraries for CRIS. 1857@end deffn 1858@deffn {} BFD_RELOC_CRIS_32_GOT 185932-bit offset to symbol-entry within GOT. 1860@end deffn 1861@deffn {} BFD_RELOC_CRIS_16_GOT 186216-bit offset to symbol-entry within GOT. 1863@end deffn 1864@deffn {} BFD_RELOC_CRIS_32_GOTPLT 186532-bit offset to symbol-entry within GOT, with PLT handling. 1866@end deffn 1867@deffn {} BFD_RELOC_CRIS_16_GOTPLT 186816-bit offset to symbol-entry within GOT, with PLT handling. 1869@end deffn 1870@deffn {} BFD_RELOC_CRIS_32_GOTREL 187132-bit offset to symbol, relative to GOT. 1872@end deffn 1873@deffn {} BFD_RELOC_CRIS_32_PLT_GOTREL 187432-bit offset to symbol with PLT entry, relative to GOT. 1875@end deffn 1876@deffn {} BFD_RELOC_CRIS_32_PLT_PCREL 187732-bit offset to symbol with PLT entry, relative to this relocation. 1878@end deffn 1879@deffn {} BFD_RELOC_860_COPY 1880@deffnx {} BFD_RELOC_860_GLOB_DAT 1881@deffnx {} BFD_RELOC_860_JUMP_SLOT 1882@deffnx {} BFD_RELOC_860_RELATIVE 1883@deffnx {} BFD_RELOC_860_PC26 1884@deffnx {} BFD_RELOC_860_PLT26 1885@deffnx {} BFD_RELOC_860_PC16 1886@deffnx {} BFD_RELOC_860_LOW0 1887@deffnx {} BFD_RELOC_860_SPLIT0 1888@deffnx {} BFD_RELOC_860_LOW1 1889@deffnx {} BFD_RELOC_860_SPLIT1 1890@deffnx {} BFD_RELOC_860_LOW2 1891@deffnx {} BFD_RELOC_860_SPLIT2 1892@deffnx {} BFD_RELOC_860_LOW3 1893@deffnx {} BFD_RELOC_860_LOGOT0 1894@deffnx {} BFD_RELOC_860_SPGOT0 1895@deffnx {} BFD_RELOC_860_LOGOT1 1896@deffnx {} BFD_RELOC_860_SPGOT1 1897@deffnx {} BFD_RELOC_860_LOGOTOFF0 1898@deffnx {} BFD_RELOC_860_SPGOTOFF0 1899@deffnx {} BFD_RELOC_860_LOGOTOFF1 1900@deffnx {} BFD_RELOC_860_SPGOTOFF1 1901@deffnx {} BFD_RELOC_860_LOGOTOFF2 1902@deffnx {} BFD_RELOC_860_LOGOTOFF3 1903@deffnx {} BFD_RELOC_860_LOPC 1904@deffnx {} BFD_RELOC_860_HIGHADJ 1905@deffnx {} BFD_RELOC_860_HAGOT 1906@deffnx {} BFD_RELOC_860_HAGOTOFF 1907@deffnx {} BFD_RELOC_860_HAPC 1908@deffnx {} BFD_RELOC_860_HIGH 1909@deffnx {} BFD_RELOC_860_HIGOT 1910@deffnx {} BFD_RELOC_860_HIGOTOFF 1911Intel i860 Relocations. 1912@end deffn 1913@deffn {} BFD_RELOC_OPENRISC_ABS_26 1914@deffnx {} BFD_RELOC_OPENRISC_REL_26 1915OpenRISC Relocations. 1916@end deffn 1917@deffn {} BFD_RELOC_H8_DIR16A8 1918@deffnx {} BFD_RELOC_H8_DIR16R8 1919@deffnx {} BFD_RELOC_H8_DIR24A8 1920@deffnx {} BFD_RELOC_H8_DIR24R8 1921@deffnx {} BFD_RELOC_H8_DIR32A16 1922H8 elf Relocations. 1923@end deffn 1924@deffn {} BFD_RELOC_XSTORMY16_REL_12 1925@deffnx {} BFD_RELOC_XSTORMY16_12 1926@deffnx {} BFD_RELOC_XSTORMY16_24 1927@deffnx {} BFD_RELOC_XSTORMY16_FPTR16 1928Sony Xstormy16 Relocations. 1929@end deffn 1930@deffn {} BFD_RELOC_VAX_GLOB_DAT 1931@deffnx {} BFD_RELOC_VAX_JMP_SLOT 1932@deffnx {} BFD_RELOC_VAX_RELATIVE 1933Relocations used by VAX ELF. 1934@end deffn 1935@deffn {} BFD_RELOC_MSP430_10_PCREL 1936@deffnx {} BFD_RELOC_MSP430_16_PCREL 1937@deffnx {} BFD_RELOC_MSP430_16 1938@deffnx {} BFD_RELOC_MSP430_16_PCREL_BYTE 1939@deffnx {} BFD_RELOC_MSP430_16_BYTE 1940msp430 specific relocation codes 1941@end deffn 1942@deffn {} BFD_RELOC_IQ2000_OFFSET_16 1943@deffnx {} BFD_RELOC_IQ2000_OFFSET_21 1944@deffnx {} BFD_RELOC_IQ2000_UHI16 1945IQ2000 Relocations. 1946@end deffn 1947@deffn {} BFD_RELOC_XTENSA_RTLD 1948Special Xtensa relocation used only by PLT entries in ELF shared 1949objects to indicate that the runtime linker should set the value 1950to one of its own internal functions or data structures. 1951@end deffn 1952@deffn {} BFD_RELOC_XTENSA_GLOB_DAT 1953@deffnx {} BFD_RELOC_XTENSA_JMP_SLOT 1954@deffnx {} BFD_RELOC_XTENSA_RELATIVE 1955Xtensa relocations for ELF shared objects. 1956@end deffn 1957@deffn {} BFD_RELOC_XTENSA_PLT 1958Xtensa relocation used in ELF object files for symbols that may require 1959PLT entries. Otherwise, this is just a generic 32-bit relocation. 1960@end deffn 1961@deffn {} BFD_RELOC_XTENSA_OP0 1962@deffnx {} BFD_RELOC_XTENSA_OP1 1963@deffnx {} BFD_RELOC_XTENSA_OP2 1964Generic Xtensa relocations. Only the operand number is encoded 1965in the relocation. The details are determined by extracting the 1966instruction opcode. 1967@end deffn 1968@deffn {} BFD_RELOC_XTENSA_ASM_EXPAND 1969Xtensa relocation to mark that the assembler expanded the 1970instructions from an original target. The expansion size is 1971encoded in the reloc size. 1972@end deffn 1973@deffn {} BFD_RELOC_XTENSA_ASM_SIMPLIFY 1974Xtensa relocation to mark that the linker should simplify 1975assembler-expanded instructions. This is commonly used 1976internally by the linker after analysis of a 1977BFD_RELOC_XTENSA_ASM_EXPAND. 1978@end deffn 1979 1980@example 1981 1982typedef enum bfd_reloc_code_real bfd_reloc_code_real_type; 1983@end example 1984@findex bfd_reloc_type_lookup 1985@subsubsection @code{bfd_reloc_type_lookup} 1986@strong{Synopsis} 1987@example 1988reloc_howto_type *bfd_reloc_type_lookup 1989 (bfd *abfd, bfd_reloc_code_real_type code); 1990@end example 1991@strong{Description}@* 1992Return a pointer to a howto structure which, when 1993invoked, will perform the relocation @var{code} on data from the 1994architecture noted. 1995 1996@findex bfd_default_reloc_type_lookup 1997@subsubsection @code{bfd_default_reloc_type_lookup} 1998@strong{Synopsis} 1999@example 2000reloc_howto_type *bfd_default_reloc_type_lookup 2001 (bfd *abfd, bfd_reloc_code_real_type code); 2002@end example 2003@strong{Description}@* 2004Provides a default relocation lookup routine for any architecture. 2005 2006@findex bfd_get_reloc_code_name 2007@subsubsection @code{bfd_get_reloc_code_name} 2008@strong{Synopsis} 2009@example 2010const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code); 2011@end example 2012@strong{Description}@* 2013Provides a printable name for the supplied relocation code. 2014Useful mainly for printing error messages. 2015 2016@findex bfd_generic_relax_section 2017@subsubsection @code{bfd_generic_relax_section} 2018@strong{Synopsis} 2019@example 2020bfd_boolean bfd_generic_relax_section 2021 (bfd *abfd, 2022 asection *section, 2023 struct bfd_link_info *, 2024 bfd_boolean *); 2025@end example 2026@strong{Description}@* 2027Provides default handling for relaxing for back ends which 2028don't do relaxing -- i.e., does nothing except make sure that the 2029final size of the section is set. 2030 2031@findex bfd_generic_gc_sections 2032@subsubsection @code{bfd_generic_gc_sections} 2033@strong{Synopsis} 2034@example 2035bfd_boolean bfd_generic_gc_sections 2036 (bfd *, struct bfd_link_info *); 2037@end example 2038@strong{Description}@* 2039Provides default handling for relaxing for back ends which 2040don't do section gc -- i.e., does nothing. 2041 2042@findex bfd_generic_merge_sections 2043@subsubsection @code{bfd_generic_merge_sections} 2044@strong{Synopsis} 2045@example 2046bfd_boolean bfd_generic_merge_sections 2047 (bfd *, struct bfd_link_info *); 2048@end example 2049@strong{Description}@* 2050Provides default handling for SEC_MERGE section merging for back ends 2051which don't have SEC_MERGE support -- i.e., does nothing. 2052 2053@findex bfd_generic_get_relocated_section_contents 2054@subsubsection @code{bfd_generic_get_relocated_section_contents} 2055@strong{Synopsis} 2056@example 2057bfd_byte *bfd_generic_get_relocated_section_contents 2058 (bfd *abfd, 2059 struct bfd_link_info *link_info, 2060 struct bfd_link_order *link_order, 2061 bfd_byte *data, 2062 bfd_boolean relocatable, 2063 asymbol **symbols); 2064@end example 2065@strong{Description}@* 2066Provides default handling of relocation effort for back ends 2067which can't be bothered to do it efficiently. 2068 2069