1 /* tc-cris.c -- Assembler code for the CRIS CPU core. 2 Copyright 2000, 2001 Free Software Foundation, Inc. 3 4 Contributed by Axis Communications AB, Lund, Sweden. 5 Originally written for GAS 1.38.1 by Mikael Asker. 6 Updated, BFDized and GNUified by Hans-Peter Nilsson. 7 8 This file is part of GAS, the GNU Assembler. 9 10 GAS is free software; you can redistribute it and/or modify 11 it under the terms of the GNU General Public License as published by 12 the Free Software Foundation; either version 2, or (at your option) 13 any later version. 14 15 GAS is distributed in the hope that it will be useful, 16 but WITHOUT ANY WARRANTY; without even the implied warranty of 17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 GNU General Public License for more details. 19 20 You should have received a copy of the GNU General Public License 21 along with GAS; see the file COPYING. If not, write to the 22 Free Software Foundation, 59 Temple Place - Suite 330, Boston, 23 MA 02111-1307, USA. */ 24 25 #include <stdio.h> 26 #include <ctype.h> 27 #include "as.h" 28 #include "subsegs.h" 29 #include "opcode/cris.h" 30 #include "dwarf2dbg.h" 31 32 /* Conventions used here: 33 Generally speaking, pointers to binutils types such as "fragS" and 34 "expressionS" get parameter and variable names ending in "P", such as 35 "fragP", to harmonize with the rest of the binutils code. Other 36 pointers get a "p" suffix, such as "bufp". Any function or type-name 37 that could clash with a current or future binutils or GAS function get 38 a "cris_" prefix. */ 39 40 #define SYNTAX_RELAX_REG_PREFIX "no_register_prefix" 41 #define SYNTAX_ENFORCE_REG_PREFIX "register_prefix" 42 #define SYNTAX_USER_SYM_LEADING_UNDERSCORE "leading_underscore" 43 #define SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE "no_leading_underscore" 44 #define REGISTER_PREFIX_CHAR '$' 45 46 /* This might be CRIS_INSN_NONE if we're assembling a prefix-insn only. 47 Note that some prefix-insns might be assembled as CRIS_INSN_NORMAL. */ 48 enum cris_insn_kind 49 { 50 CRIS_INSN_NORMAL, CRIS_INSN_NONE, CRIS_INSN_BRANCH 51 }; 52 53 /* An instruction will have one of these prefixes. 54 Although the same bit-pattern, we handle BDAP with an immediate 55 expression (eventually quick or [pc+]) different from when we only have 56 register expressions. */ 57 enum prefix_kind 58 { 59 PREFIX_NONE, PREFIX_BDAP_IMM, PREFIX_BDAP, PREFIX_BIAP, PREFIX_DIP, 60 PREFIX_PUSH 61 }; 62 63 /* The prefix for an instruction. */ 64 struct cris_prefix 65 { 66 enum prefix_kind kind; 67 int base_reg_number; 68 unsigned int opcode; 69 70 /* There might be an expression to be evaluated, like I in [rN+I]. */ 71 expressionS expr; 72 73 /* If there's an expression, we might need a relocation. Here's the 74 type of what relocation to start relaxaton with. 75 The relocation is assumed to start immediately after the prefix insn, 76 so we don't provide an offset. */ 77 enum bfd_reloc_code_real reloc; 78 }; 79 80 /* The description of the instruction being assembled. */ 81 struct cris_instruction 82 { 83 /* If CRIS_INSN_NONE, then this insn is of zero length. */ 84 enum cris_insn_kind insn_type; 85 86 /* If a special register was mentioned, this is its description, else 87 it is NULL. */ 88 const struct cris_spec_reg *spec_reg; 89 90 unsigned int opcode; 91 92 /* An insn may have at most one expression; theoretically there could be 93 another in its prefix (but I don't see how that could happen). */ 94 expressionS expr; 95 96 /* The expression might need a relocation. Here's one to start 97 relaxation with. */ 98 enum bfd_reloc_code_real reloc; 99 100 /* The size in bytes of an immediate expression, or zero in 101 nonapplicable. */ 102 int imm_oprnd_size; 103 }; 104 105 static void cris_process_instruction PARAMS ((char *, 106 struct cris_instruction *, 107 struct cris_prefix *)); 108 static int get_bwd_size_modifier PARAMS ((char **, int *)); 109 static int get_bw_size_modifier PARAMS ((char **, int *)); 110 static int get_gen_reg PARAMS ((char **, int *)); 111 static int get_spec_reg PARAMS ((char **, 112 const struct cris_spec_reg **)); 113 static int get_autoinc_prefix_or_indir_op PARAMS ((char **, 114 struct cris_prefix *, 115 int *, int *, int *, 116 expressionS *)); 117 static int get_3op_or_dip_prefix_op PARAMS ((char **, 118 struct cris_prefix *)); 119 static int cris_get_expression PARAMS ((char **, expressionS *)); 120 static int get_flags PARAMS ((char **, int *)); 121 static void gen_bdap PARAMS ((int, expressionS *)); 122 static int branch_disp PARAMS ((int)); 123 static void gen_cond_branch_32 PARAMS ((char *, char *, fragS *, 124 symbolS *, symbolS *, long int)); 125 static void cris_number_to_imm PARAMS ((char *, long, int, fixS *)); 126 static void cris_create_short_jump PARAMS ((char *, addressT, addressT, 127 fragS *, symbolS *)); 128 static void s_syntax PARAMS ((int)); 129 static void s_cris_file PARAMS ((int)); 130 static void s_cris_loc PARAMS ((int)); 131 132 /* All the .syntax functions. */ 133 static void cris_force_reg_prefix PARAMS ((void)); 134 static void cris_relax_reg_prefix PARAMS ((void)); 135 static void cris_sym_leading_underscore PARAMS ((void)); 136 static void cris_sym_no_leading_underscore PARAMS ((void)); 137 static char *cris_insn_first_word_frag PARAMS ((void)); 138 139 /* Handle to the opcode hash table. */ 140 static struct hash_control *op_hash = NULL; 141 142 /* Whether we demand that registers have a `$' prefix. Default here. */ 143 static boolean demand_register_prefix = false; 144 145 /* Whether global user symbols have a leading underscore. Default here. */ 146 static boolean symbols_have_leading_underscore = true; 147 148 const pseudo_typeS md_pseudo_table[] = 149 { 150 {"dword", cons, 4}, 151 {"syntax", s_syntax, 0}, 152 {"file", s_cris_file, 0}, 153 {"loc", s_cris_loc, 0}, 154 {NULL, 0, 0} 155 }; 156 157 static int warn_for_branch_expansion = 0; 158 159 const char cris_comment_chars[] = ";"; 160 161 /* This array holds the chars that only start a comment at the beginning of 162 a line. If the line seems to have the form '# 123 filename' 163 .line and .file directives will appear in the pre-processed output. */ 164 /* Note that input_file.c hand-checks for '#' at the beginning of the 165 first line of the input file. This is because the compiler outputs 166 #NO_APP at the beginning of its output. */ 167 /* Also note that slash-star will always start a comment. */ 168 const char line_comment_chars[] = "#"; 169 const char line_separator_chars[] = "@"; 170 171 /* Now all floating point support is shut off. See md_atof. */ 172 const char EXP_CHARS[] = ""; 173 const char FLT_CHARS[] = ""; 174 175 /* For CRIS, we encode the relax_substateTs (in e.g. fr_substate) as: 176 2 1 0 177 ---/ /--+-----------------+-----------------+-----------------+ 178 | what state ? | how long ? | 179 ---/ /--+-----------------+-----------------+-----------------+ 180 181 The "how long" bits are 00 = byte, 01 = word, 10 = dword (long). 182 This is a Un*x convention. 183 Not all lengths are legit for a given value of (what state). 184 185 Groups for CRIS address relaxing: 186 187 1. Bcc 188 length: byte, word, 10-byte expansion 189 190 2. BDAP 191 length: byte, word, dword */ 192 193 #define STATE_CONDITIONAL_BRANCH (1) 194 #define STATE_BASE_PLUS_DISP_PREFIX (2) 195 196 #define STATE_LENGTH_MASK (3) 197 #define STATE_BYTE (0) 198 #define STATE_WORD (1) 199 #define STATE_DWORD (2) 200 /* Symbol undefined. */ 201 #define STATE_UNDF (3) 202 #define STATE_MAX_LENGTH (3) 203 204 /* These displacements are relative to the adress following the opcode 205 word of the instruction. The first letter is Byte, Word. The 2nd 206 letter is Forward, Backward. */ 207 208 #define BRANCH_BF ( 254) 209 #define BRANCH_BB (-256) 210 #define BRANCH_WF (2 + 32767) 211 #define BRANCH_WB (2 + -32768) 212 213 #define BDAP_BF ( 127) 214 #define BDAP_BB (-128) 215 #define BDAP_WF ( 32767) 216 #define BDAP_WB (-32768) 217 218 #define ENCODE_RELAX(what, length) (((what) << 2) + (length)) 219 220 const relax_typeS md_cris_relax_table[] = 221 { 222 /* Error sentinel (0, 0). */ 223 {1, 1, 0, 0}, 224 225 /* Unused (0, 1). */ 226 {1, 1, 0, 0}, 227 228 /* Unused (0, 2). */ 229 {1, 1, 0, 0}, 230 231 /* Unused (0, 3). */ 232 {1, 1, 0, 0}, 233 234 /* Bcc o (1, 0). */ 235 {BRANCH_BF, BRANCH_BB, 0, ENCODE_RELAX (1, 1)}, 236 237 /* Bcc [PC+] (1, 1). */ 238 {BRANCH_WF, BRANCH_WB, 2, ENCODE_RELAX (1, 2)}, 239 240 /* BEXT/BWF, BA, JUMP (external), JUMP (always), Bnot_cc, JUMP (default) 241 (1, 2). */ 242 {0, 0, 10, 0}, 243 244 /* Unused (1, 3). */ 245 {1, 1, 0, 0}, 246 247 /* BDAP o (2, 0). */ 248 {BDAP_BF, BDAP_BB, 0, ENCODE_RELAX (2, 1)}, 249 250 /* BDAP.[bw] [PC+] (2, 1). */ 251 {BDAP_WF, BDAP_WB, 2, ENCODE_RELAX (2, 2)}, 252 253 /* BDAP.d [PC+] (2, 2). */ 254 {0, 0, 4, 0} 255 }; 256 257 #undef BRANCH_BF 258 #undef BRANCH_BB 259 #undef BRANCH_WF 260 #undef BRANCH_WB 261 #undef BDAP_BF 262 #undef BDAP_BB 263 #undef BDAP_WF 264 #undef BDAP_WB 265 266 /* Target-specific multicharacter options, not const-declared at usage 267 in 2.9.1 and CVS of 2000-02-16. */ 268 struct option md_longopts[] = 269 { 270 #define OPTION_NO_US (OPTION_MD_BASE + 0) 271 {"no-underscore", no_argument, NULL, OPTION_NO_US}, 272 #define OPTION_US (OPTION_MD_BASE + 1) 273 {"underscore", no_argument, NULL, OPTION_US}, 274 {NULL, no_argument, NULL, 0} 275 }; 276 277 /* Not const-declared at usage in 2.9.1. */ 278 size_t md_longopts_size = sizeof (md_longopts); 279 const char *md_shortopts = "hHN"; 280 281 /* At first glance, this may seems wrong and should be 4 (ba + nop); but 282 since a short_jump must skip a *number* of long jumps, it must also be 283 a long jump. Here, we hope to make it a "ba [16bit_offs]" and a "nop" 284 for the delay slot and hope that the jump table at most needs 285 32767/4=8191 long-jumps. A branch is better than a jump, since it is 286 relative; we will not have a reloc to fix up somewhere. 287 288 Note that we can't add relocs, because relaxation uses these fixed 289 numbers, and md_create_short_jump is called after relaxation. */ 290 291 const int md_short_jump_size = 6; 292 const int md_long_jump_size = 6; 293 294 /* Report output format. Small changes in output format (like elf 295 variants below) can happen until all options are parsed. */ 296 297 const char * 298 cris_target_format () 299 { 300 switch (OUTPUT_FLAVOR) 301 { 302 case bfd_target_aout_flavour: 303 return "a.out-cris"; 304 305 case bfd_target_elf_flavour: 306 if (symbols_have_leading_underscore) 307 return "elf32-us-cris"; 308 return "elf32-cris"; 309 310 default: 311 abort (); 312 return NULL; 313 } 314 } 315 316 /* Prepare machine-dependent frags for relaxation. 317 318 Called just before relaxation starts. Any symbol that is now undefined 319 will not become defined. 320 321 Return the correct fr_subtype in the frag. 322 323 Return the initial "guess for fr_var" to caller. The guess for fr_var 324 is *actually* the growth beyond fr_fix. Whatever we do to grow fr_fix 325 or fr_var contributes to our returned value. 326 327 Although it may not be explicit in the frag, pretend 328 fr_var starts with a value. */ 329 330 int 331 md_estimate_size_before_relax (fragP, segment_type) 332 fragS *fragP; 333 /* The segment is either N_DATA or N_TEXT. */ 334 segT segment_type; 335 { 336 int old_fr_fix; 337 338 old_fr_fix = fragP->fr_fix; 339 340 switch (fragP->fr_subtype) 341 { 342 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_UNDF): 343 if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 344 { 345 /* The symbol lies in the same segment - a relaxable case. */ 346 fragP->fr_subtype 347 = ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE); 348 } 349 else 350 { 351 /* Unknown or not the same segment, so not relaxable. */ 352 char *writep; 353 354 /* A small branch-always (2 bytes) to the "real" branch 355 instruction, plus a delay-slot nop (2 bytes), plus a 356 jump (2 plus 4 bytes). See gen_cond_branch_32. */ 357 fragP->fr_fix += 2 + 2 + 2 + 4; 358 writep = fragP->fr_literal + old_fr_fix; 359 gen_cond_branch_32 (fragP->fr_opcode, writep, fragP, 360 fragP->fr_symbol, (symbolS *) NULL, 361 fragP->fr_offset); 362 frag_wane (fragP); 363 } 364 break; 365 366 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE): 367 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_WORD): 368 /* We *might* give a better initial guess if we peek at offsets 369 now, but the caller will relax correctly and without this, so 370 don't bother. */ 371 break; 372 373 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_UNDF): 374 /* Note that we can not do anything sane with relaxing 375 [rX + a_known_symbol_in_text], it will have to be a 32-bit 376 value. 377 378 We could play tricks with managing a constant pool and make 379 a_known_symbol_in_text a "bdap [pc + offset]" pointing there, but 380 that's pointless, it can only be longer and slower. 381 382 Off-topic: If PIC becomes *really* important, and has to be done 383 in the assembler and linker only (which would be weird or 384 clueless), we can so something. Imagine: 385 move.x [r + 32_bit_symbol],r 386 move.x [32_bit_symbol],r 387 move.x 32_bit_symbol,r 388 can be shortened by a word (8-bit offset) if we are close to the 389 symbol or keep its length (16-bit offset) or be a word longer 390 (32-bit offset). Then change the 32_bit_symbol into a "bdap [pc 391 + offset]", and put the offset to the 32_bit_symbol in "offset". 392 Weird, to say the least, and we still have to add support for a 393 PC-relative relocation in the loader (shared libraries). But 394 it's an interesting thought. */ 395 396 if (S_GET_SEGMENT (fragP->fr_symbol) != absolute_section) 397 { 398 /* Go for dword if not absolute or same segment. */ 399 fragP->fr_subtype 400 = ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_DWORD); 401 fragP->fr_var += 4; 402 } 403 else 404 { 405 /* Absolute expression. */ 406 long int value; 407 value = S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset; 408 409 if (value >= -128 && value <= 127) 410 { 411 /* Byte displacement. */ 412 (fragP->fr_opcode)[0] = value; 413 } 414 else 415 { 416 /* Word or dword displacement. */ 417 int pow2_of_size = 1; 418 char *writep; 419 420 if (value < -32768 || value > 32767) 421 { 422 /* Outside word range, make it a dword. */ 423 pow2_of_size = 2; 424 } 425 426 /* Modify the byte-offset BDAP into a word or dword offset 427 BDAP. Or really, a BDAP rX,8bit into a 428 BDAP.[wd] rX,[PC+] followed by a word or dword. */ 429 (fragP->fr_opcode)[0] = BDAP_PC_LOW + pow2_of_size * 16; 430 431 /* Keep the register number in the highest four bits. */ 432 (fragP->fr_opcode)[1] &= 0xF0; 433 (fragP->fr_opcode)[1] |= BDAP_INCR_HIGH; 434 435 /* It grew by two or four bytes. */ 436 fragP->fr_fix += 1 << pow2_of_size; 437 writep = fragP->fr_literal + old_fr_fix; 438 md_number_to_chars (writep, value, 1 << pow2_of_size); 439 } 440 frag_wane (fragP); 441 } 442 break; 443 444 default: 445 BAD_CASE (fragP->fr_subtype); 446 } 447 448 return fragP->fr_var + (fragP->fr_fix - old_fr_fix); 449 } 450 451 /* Perform post-processing of machine-dependent frags after relaxation. 452 Called after relaxation is finished. 453 In: Address of frag. 454 fr_type == rs_machine_dependent. 455 fr_subtype is what the address relaxed to. 456 457 Out: Any fixS:s and constants are set up. 458 459 The caller will turn the frag into a ".space 0". */ 460 461 void 462 md_convert_frag (abfd, sec, fragP) 463 bfd *abfd ATTRIBUTE_UNUSED; 464 segT sec ATTRIBUTE_UNUSED; 465 fragS *fragP; 466 { 467 /* Pointer to first byte in variable-sized part of the frag. */ 468 char *var_partp; 469 470 /* Pointer to first opcode byte in frag. */ 471 char *opcodep; 472 473 /* Used to check integrity of the relaxation. 474 One of 2 = long, 1 = word, or 0 = byte. */ 475 int length_code; 476 477 /* Size in bytes of variable-sized part of frag. */ 478 int var_part_size = 0; 479 480 /* This is part of *fragP. It contains all information about addresses 481 and offsets to varying parts. */ 482 symbolS *symbolP; 483 unsigned long var_part_offset; 484 485 /* Where, in file space, is _var of *fragP? */ 486 unsigned long address_of_var_part = 0; 487 488 /* Where, in file space, does addr point? */ 489 unsigned long target_address; 490 491 know (fragP->fr_type == rs_machine_dependent); 492 493 length_code = fragP->fr_subtype & STATE_LENGTH_MASK; 494 know (length_code >= 0 && length_code < STATE_MAX_LENGTH); 495 496 var_part_offset = fragP->fr_fix; 497 var_partp = fragP->fr_literal + var_part_offset; 498 opcodep = fragP->fr_opcode; 499 500 symbolP = fragP->fr_symbol; 501 target_address 502 = (symbolP 503 ? S_GET_VALUE (symbolP) + symbol_get_frag(fragP->fr_symbol)->fr_address 504 : 0 ) + fragP->fr_offset; 505 address_of_var_part = fragP->fr_address + var_part_offset; 506 507 switch (fragP->fr_subtype) 508 { 509 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE): 510 opcodep[0] = branch_disp ((target_address - address_of_var_part)); 511 var_part_size = 0; 512 break; 513 514 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_WORD): 515 /* We had a quick immediate branch, now turn it into a word one i.e. a 516 PC autoincrement. */ 517 opcodep[0] = BRANCH_PC_LOW; 518 opcodep[1] &= 0xF0; 519 opcodep[1] |= BRANCH_INCR_HIGH; 520 md_number_to_chars (var_partp, 521 (long) (target_address - (address_of_var_part + 2)), 522 2); 523 var_part_size = 2; 524 break; 525 526 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_DWORD): 527 gen_cond_branch_32 (fragP->fr_opcode, var_partp, fragP, 528 fragP->fr_symbol, (symbolS *) NULL, 529 fragP->fr_offset); 530 /* Ten bytes added: a branch, nop and a jump. */ 531 var_part_size = 2 + 2 + 4 + 2; 532 break; 533 534 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_BYTE): 535 var_partp[0] = target_address - (address_of_var_part + 1); 536 var_part_size = 0; 537 break; 538 539 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_WORD): 540 /* We had a BDAP 8-bit "quick immediate", now turn it into a 16-bit 541 one that uses PC autoincrement. */ 542 opcodep[0] = BDAP_PC_LOW + (1 << 4); 543 opcodep[1] &= 0xF0; 544 opcodep[1] |= BDAP_INCR_HIGH; 545 md_number_to_chars (var_partp, (long) (target_address), 2); 546 var_part_size = 2; 547 break; 548 549 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_DWORD): 550 /* We had a BDAP 16-bit "word", change the offset to a dword. */ 551 opcodep[0] = BDAP_PC_LOW + (2 << 4); 552 opcodep[1] &= 0xF0; 553 opcodep[1] |= BDAP_INCR_HIGH; 554 if (fragP->fr_symbol == NULL) 555 md_number_to_chars (var_partp, fragP->fr_offset, 4); 556 else 557 fix_new (fragP, var_partp - fragP->fr_literal, 4, fragP->fr_symbol, 558 fragP->fr_offset, 0, BFD_RELOC_32); 559 var_part_size = 4; 560 break; 561 562 default: 563 BAD_CASE (fragP->fr_subtype); 564 break; 565 } 566 567 fragP->fr_fix += var_part_size; 568 } 569 570 /* Generate a short jump around a secondary jump table. 571 Used by md_create_long_jump. 572 573 This used to be md_create_short_jump, but is now called from 574 md_create_long_jump instead, when sufficient. 575 since the sizes of the jumps are the same. It used to be brittle, 576 making possibilities for creating bad code. */ 577 578 static void 579 cris_create_short_jump (storep, from_addr, to_addr, fragP, to_symbol) 580 char *storep; 581 addressT from_addr; 582 addressT to_addr; 583 fragS *fragP ATTRIBUTE_UNUSED; 584 symbolS *to_symbol ATTRIBUTE_UNUSED; 585 { 586 long int distance; 587 588 distance = to_addr - from_addr; 589 590 if (-254 <= distance && distance <= 256) 591 { 592 /* Create a "short" short jump: "BA distance - 2". */ 593 storep[0] = branch_disp (distance - 2); 594 storep[1] = BA_QUICK_HIGH; 595 596 /* A nop for the delay slot. */ 597 md_number_to_chars (storep + 2, NOP_OPCODE, 2); 598 599 /* The extra word should be filled with something sane too. Make it 600 a nop to keep disassembly sane. */ 601 md_number_to_chars (storep + 4, NOP_OPCODE, 2); 602 } 603 else 604 { 605 /* Make it a "long" short jump: "BA (PC+)". */ 606 md_number_to_chars (storep, BA_PC_INCR_OPCODE, 2); 607 608 /* ".WORD distance - 4". */ 609 md_number_to_chars (storep + 2, (long) (distance - 4), 2); 610 611 /* A nop for the delay slot. */ 612 md_number_to_chars (storep + 4, NOP_OPCODE, 2); 613 } 614 } 615 616 /* Generate a long jump in a secondary jump table. 617 618 storep Where to store the jump instruction. 619 from_addr Address of the jump instruction. 620 to_addr Destination address of the jump. 621 fragP Which frag the destination address operand 622 lies in. 623 to_symbol Destination symbol. */ 624 625 void 626 md_create_long_jump (storep, from_addr, to_addr, fragP, to_symbol) 627 char *storep; 628 addressT from_addr; 629 addressT to_addr; 630 fragS *fragP; 631 symbolS *to_symbol; 632 { 633 long int distance; 634 635 distance = to_addr - from_addr; 636 637 if (-32763 <= distance && distance <= 32772) 638 { 639 /* Then make it a "short" long jump. */ 640 cris_create_short_jump (storep, from_addr, to_addr, fragP, 641 to_symbol); 642 } 643 else 644 { 645 /* We have a "long" long jump: "JUMP (PC+)". */ 646 md_number_to_chars (storep, JUMP_PC_INCR_OPCODE, 2); 647 648 /* Follow with a ".DWORD to_addr". */ 649 fix_new (fragP, storep + 2 - fragP->fr_literal, 4, to_symbol, 650 0, 0, BFD_RELOC_32); 651 } 652 } 653 654 /* Allocate space for the first piece of an insn, and mark it as the 655 start of the insn for debug-format use. */ 656 657 static char * 658 cris_insn_first_word_frag () 659 { 660 char *insnp = frag_more (2); 661 662 /* We need to mark the start of the insn by passing dwarf2_emit_insn 663 the offset from the current fragment position. This must be done 664 after the first fragment is created but before any other fragments 665 (fixed or varying) are created. Note that the offset only 666 corresponds to the "size" of the insn for a fixed-size, 667 non-expanded insn. */ 668 if (OUTPUT_FLAVOR == bfd_target_elf_flavour) 669 dwarf2_emit_insn (2); 670 671 return insnp; 672 } 673 674 /* Port-specific assembler initialization. */ 675 676 void 677 md_begin () 678 { 679 const char *hashret = NULL; 680 int i = 0; 681 682 /* Set up a hash table for the instructions. */ 683 op_hash = hash_new (); 684 if (op_hash == NULL) 685 as_fatal (_("Virtual memory exhausted")); 686 687 while (cris_opcodes[i].name != NULL) 688 { 689 const char *name = cris_opcodes[i].name; 690 hashret = hash_insert (op_hash, name, (PTR) &cris_opcodes[i]); 691 692 if (hashret != NULL && *hashret != '\0') 693 as_fatal (_("Can't hash `%s': %s\n"), cris_opcodes[i].name, 694 *hashret == 0 ? _("(unknown reason)") : hashret); 695 do 696 { 697 if (cris_opcodes[i].match & cris_opcodes[i].lose) 698 as_fatal (_("Buggy opcode: `%s' \"%s\"\n"), cris_opcodes[i].name, 699 cris_opcodes[i].args); 700 701 ++i; 702 } 703 while (cris_opcodes[i].name != NULL 704 && strcmp (cris_opcodes[i].name, name) == 0); 705 } 706 } 707 708 /* Assemble a source line. */ 709 710 void 711 md_assemble (str) 712 char *str; 713 { 714 struct cris_instruction output_instruction; 715 struct cris_prefix prefix; 716 char *opcodep; 717 char *p; 718 719 know (str); 720 721 /* Do the low-level grunt - assemble to bits and split up into a prefix 722 and ordinary insn. */ 723 cris_process_instruction (str, &output_instruction, &prefix); 724 725 /* Handle any prefixes to the instruction. */ 726 switch (prefix.kind) 727 { 728 case PREFIX_NONE: 729 break; 730 731 /* When the expression is unknown for a BDAP, it can need 0, 2 or 4 732 extra bytes, so we handle it separately. */ 733 case PREFIX_BDAP_IMM: 734 gen_bdap (prefix.base_reg_number, &prefix.expr); 735 break; 736 737 case PREFIX_BDAP: 738 case PREFIX_BIAP: 739 case PREFIX_DIP: 740 opcodep = cris_insn_first_word_frag (); 741 742 /* Output the prefix opcode. */ 743 md_number_to_chars (opcodep, (long) prefix.opcode, 2); 744 745 /* This only happens for DIP, but is ok for the others as they have 746 no reloc. */ 747 if (prefix.reloc != BFD_RELOC_NONE) 748 { 749 /* Output an absolute mode address. */ 750 p = frag_more (4); 751 fix_new_exp (frag_now, (p - frag_now->fr_literal), 4, 752 &prefix.expr, 0, prefix.reloc); 753 } 754 break; 755 756 case PREFIX_PUSH: 757 opcodep = cris_insn_first_word_frag (); 758 759 /* Output the prefix opcode. Being a "push", we add the negative 760 size of the register to "sp". */ 761 if (output_instruction.spec_reg != NULL) 762 { 763 /* Special register. */ 764 opcodep[0] = -output_instruction.spec_reg->reg_size; 765 } 766 else 767 { 768 /* General register. */ 769 opcodep[0] = -4; 770 } 771 opcodep[1] = (REG_SP << 4) + (BDAP_QUICK_OPCODE >> 8); 772 break; 773 774 default: 775 BAD_CASE (prefix.kind); 776 } 777 778 /* If we only had a prefix insn, we're done. */ 779 if (output_instruction.insn_type == CRIS_INSN_NONE) 780 return; 781 782 /* Done with the prefix. Continue with the main instruction. */ 783 if (prefix.kind == PREFIX_NONE) 784 opcodep = cris_insn_first_word_frag (); 785 else 786 opcodep = frag_more (2); 787 788 /* Output the instruction opcode. */ 789 md_number_to_chars (opcodep, (long) (output_instruction.opcode), 2); 790 791 /* Output the symbol-dependent instruction stuff. */ 792 if (output_instruction.insn_type == CRIS_INSN_BRANCH) 793 { 794 segT to_seg = absolute_section; 795 int is_undefined = 0; 796 int length_code; 797 798 if (output_instruction.expr.X_op != O_constant) 799 { 800 to_seg = S_GET_SEGMENT (output_instruction.expr.X_add_symbol); 801 802 if (to_seg == undefined_section) 803 is_undefined = 1; 804 } 805 806 if (output_instruction.expr.X_op == O_constant 807 || to_seg == now_seg || is_undefined) 808 { 809 /* If is_undefined, then the expression may BECOME now_seg. */ 810 length_code = is_undefined ? STATE_UNDF : STATE_BYTE; 811 812 /* Make room for max ten bytes of variable length. */ 813 frag_var (rs_machine_dependent, 10, 0, 814 ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, length_code), 815 output_instruction.expr.X_add_symbol, 816 output_instruction.expr.X_add_number, 817 opcodep); 818 } 819 else 820 { 821 /* We have: to_seg != now_seg && to_seg != undefined_section. 822 This means it is a branch to a known symbol in another 823 section. Code in data? Weird but valid. Emit a 32-bit 824 branch. */ 825 gen_cond_branch_32 (opcodep, frag_more (10), frag_now, 826 output_instruction.expr.X_add_symbol, 827 (symbolS *) NULL, 828 output_instruction.expr.X_add_number); 829 } 830 } 831 else 832 { 833 if (output_instruction.imm_oprnd_size > 0) 834 { 835 /* The intruction has an immediate operand. */ 836 enum bfd_reloc_code_real reloc = 0; 837 838 switch (output_instruction.imm_oprnd_size) 839 { 840 /* Any byte-size immediate constants are treated as 841 word-size. FIXME: Thus overflow check does not work 842 correctly. */ 843 844 case 2: 845 reloc = BFD_RELOC_16; 846 break; 847 848 case 4: 849 reloc = BFD_RELOC_32; 850 break; 851 852 default: 853 BAD_CASE (output_instruction.imm_oprnd_size); 854 } 855 856 p = frag_more (output_instruction.imm_oprnd_size); 857 fix_new_exp (frag_now, (p - frag_now->fr_literal), 858 output_instruction.imm_oprnd_size, 859 &output_instruction.expr, 0, reloc); 860 } 861 else if (output_instruction.reloc != BFD_RELOC_NONE) 862 { 863 /* An immediate operand that has a relocation and needs to be 864 processed further. */ 865 866 /* It is important to use fix_new_exp here and everywhere else 867 (and not fix_new), as fix_new_exp can handle "difference 868 expressions" - where the expression contains a difference of 869 two symbols in the same segment. */ 870 fix_new_exp (frag_now, (opcodep - frag_now->fr_literal), 2, 871 &output_instruction.expr, 0, 872 output_instruction.reloc); 873 } 874 } 875 } 876 877 /* Low level text-to-bits assembly. */ 878 879 static void 880 cris_process_instruction (insn_text, out_insnp, prefixp) 881 char *insn_text; 882 struct cris_instruction *out_insnp; 883 struct cris_prefix *prefixp; 884 { 885 char *s; 886 char modified_char = 0; 887 const char *args; 888 struct cris_opcode *instruction; 889 char *operands; 890 int match = 0; 891 int mode; 892 int regno; 893 int size_bits; 894 895 /* Reset these fields to a harmless state in case we need to return in 896 error. */ 897 prefixp->kind = PREFIX_NONE; 898 prefixp->reloc = BFD_RELOC_NONE; 899 out_insnp->insn_type = CRIS_INSN_NORMAL; 900 out_insnp->imm_oprnd_size = 0; 901 902 /* Find the end of the opcode mnemonic. We assume (true in 2.9.1) 903 that the caller has translated the opcode to lower-case, up to the 904 first non-letter. */ 905 for (operands = insn_text; islower (*operands); ++operands) 906 ; 907 908 /* Terminate the opcode after letters, but save the character there if 909 it was of significance. */ 910 switch (*operands) 911 { 912 case '\0': 913 break; 914 915 case '.': 916 /* Put back the modified character later. */ 917 modified_char = *operands; 918 /* Fall through. */ 919 920 case ' ': 921 /* Consume the character after the mnemonic 922 and replace it with '\0'. */ 923 *operands++ = '\0'; 924 break; 925 926 default: 927 as_bad (_("Unknown opcode: `%s'"), insn_text); 928 return; 929 } 930 931 /* Find the instruction. */ 932 instruction = (struct cris_opcode *) hash_find (op_hash, insn_text); 933 if (instruction == NULL) 934 { 935 as_bad (_("Unknown opcode: `%s'"), insn_text); 936 return; 937 } 938 939 /* Put back the modified character. */ 940 switch (modified_char) 941 { 942 case 0: 943 break; 944 945 default: 946 *--operands = modified_char; 947 } 948 949 /* Try to match an opcode table slot. */ 950 for (s = operands;;) 951 { 952 int imm_expr_found; 953 954 /* Initialize *prefixp, perhaps after being modified for a 955 "near match". */ 956 prefixp->kind = PREFIX_NONE; 957 prefixp->reloc = BFD_RELOC_NONE; 958 959 /* Initialize *out_insnp. */ 960 memset (out_insnp, 0, sizeof (*out_insnp)); 961 out_insnp->opcode = instruction->match; 962 out_insnp->reloc = BFD_RELOC_NONE; 963 out_insnp->insn_type = CRIS_INSN_NORMAL; 964 out_insnp->imm_oprnd_size = 0; 965 966 imm_expr_found = 0; 967 968 /* Build the opcode, checking as we go to make sure that the 969 operands match. */ 970 for (args = instruction->args;; ++args) 971 { 972 switch (*args) 973 { 974 case '\0': 975 /* If we've come to the end of arguments, we're done. */ 976 if (*s == '\0') 977 match = 1; 978 break; 979 980 case '!': 981 /* Non-matcher character for disassembly. 982 Ignore it here. */ 983 continue; 984 985 case ',': 986 case ' ': 987 /* These must match exactly. */ 988 if (*s++ == *args) 989 continue; 990 break; 991 992 case 'B': 993 /* This is not really an operand, but causes a "BDAP 994 -size,SP" prefix to be output, for PUSH instructions. */ 995 prefixp->kind = PREFIX_PUSH; 996 continue; 997 998 case 'b': 999 /* This letter marks an operand that should not be matched 1000 in the assembler. It is a branch with 16-bit 1001 displacement. The assembler will create them from the 1002 8-bit flavor when necessary. The assembler does not 1003 support the [rN+] operand, as the [r15+] that is 1004 generated for 16-bit displacements. */ 1005 break; 1006 1007 case 'c': 1008 /* A 5-bit unsigned immediate in bits <4:0>. */ 1009 if (! cris_get_expression (&s, &out_insnp->expr)) 1010 break; 1011 else 1012 { 1013 if (out_insnp->expr.X_op == O_constant 1014 && (out_insnp->expr.X_add_number < 0 1015 || out_insnp->expr.X_add_number > 31)) 1016 as_bad (_("Immediate value not in 5 bit unsigned range: %ld"), 1017 out_insnp->expr.X_add_number); 1018 1019 out_insnp->reloc = BFD_RELOC_CRIS_UNSIGNED_5; 1020 continue; 1021 } 1022 1023 case 'C': 1024 /* A 4-bit unsigned immediate in bits <3:0>. */ 1025 if (! cris_get_expression (&s, &out_insnp->expr)) 1026 break; 1027 else 1028 { 1029 if (out_insnp->expr.X_op == O_constant 1030 && (out_insnp->expr.X_add_number < 0 1031 || out_insnp->expr.X_add_number > 15)) 1032 as_bad (_("Immediate value not in 4 bit unsigned range: %ld"), 1033 out_insnp->expr.X_add_number); 1034 1035 out_insnp->reloc = BFD_RELOC_CRIS_UNSIGNED_4; 1036 continue; 1037 } 1038 1039 case 'D': 1040 /* General register in bits <15:12> and <3:0>. */ 1041 if (! get_gen_reg (&s, ®no)) 1042 break; 1043 else 1044 { 1045 out_insnp->opcode |= regno /* << 0 */; 1046 out_insnp->opcode |= regno << 12; 1047 continue; 1048 } 1049 1050 case 'f': 1051 /* Flags from the condition code register. */ 1052 { 1053 int flags = 0; 1054 1055 if (! get_flags (&s, &flags)) 1056 break; 1057 1058 out_insnp->opcode |= ((flags & 0xf0) << 8) | (flags & 0xf); 1059 continue; 1060 } 1061 1062 case 'i': 1063 /* A 6-bit signed immediate in bits <5:0>. */ 1064 if (! cris_get_expression (&s, &out_insnp->expr)) 1065 break; 1066 else 1067 { 1068 if (out_insnp->expr.X_op == O_constant 1069 && (out_insnp->expr.X_add_number < -32 1070 || out_insnp->expr.X_add_number > 31)) 1071 as_bad (_("Immediate value not in 6 bit range: %ld"), 1072 out_insnp->expr.X_add_number); 1073 out_insnp->reloc = BFD_RELOC_CRIS_SIGNED_6; 1074 continue; 1075 } 1076 1077 case 'I': 1078 /* A 6-bit unsigned immediate in bits <5:0>. */ 1079 if (! cris_get_expression (&s, &out_insnp->expr)) 1080 break; 1081 else 1082 { 1083 if (out_insnp->expr.X_op == O_constant 1084 && (out_insnp->expr.X_add_number < 0 1085 || out_insnp->expr.X_add_number > 63)) 1086 as_bad (_("Immediate value not in 6 bit unsigned range: %ld"), 1087 out_insnp->expr.X_add_number); 1088 out_insnp->reloc = BFD_RELOC_CRIS_UNSIGNED_6; 1089 continue; 1090 } 1091 1092 case 'M': 1093 /* A size modifier, B, W or D, to be put in a bit position 1094 suitable for CLEAR instructions (i.e. reflecting a zero 1095 register). */ 1096 if (! get_bwd_size_modifier (&s, &size_bits)) 1097 break; 1098 else 1099 { 1100 switch (size_bits) 1101 { 1102 case 0: 1103 out_insnp->opcode |= 0 << 12; 1104 break; 1105 1106 case 1: 1107 out_insnp->opcode |= 4 << 12; 1108 break; 1109 1110 case 2: 1111 out_insnp->opcode |= 8 << 12; 1112 break; 1113 } 1114 continue; 1115 } 1116 1117 case 'm': 1118 /* A size modifier, B, W or D, to be put in bits <5:4>. */ 1119 if (! get_bwd_size_modifier (&s, &size_bits)) 1120 break; 1121 else 1122 { 1123 out_insnp->opcode |= size_bits << 4; 1124 continue; 1125 } 1126 1127 case 'o': 1128 /* A branch expression. */ 1129 if (! cris_get_expression (&s, &out_insnp->expr)) 1130 break; 1131 else 1132 { 1133 out_insnp->insn_type = CRIS_INSN_BRANCH; 1134 continue; 1135 } 1136 1137 case 'O': 1138 /* A BDAP expression for any size, "expr,r". */ 1139 if (! cris_get_expression (&s, &prefixp->expr)) 1140 break; 1141 else 1142 { 1143 if (*s != ',') 1144 break; 1145 1146 s++; 1147 1148 if (!get_gen_reg (&s, &prefixp->base_reg_number)) 1149 break; 1150 1151 /* Since 'O' is used with an explicit bdap, we have no 1152 "real" instruction. */ 1153 prefixp->kind = PREFIX_BDAP_IMM; 1154 out_insnp->insn_type = CRIS_INSN_NONE; 1155 continue; 1156 } 1157 1158 case 'P': 1159 /* Special register in bits <15:12>. */ 1160 if (! get_spec_reg (&s, &out_insnp->spec_reg)) 1161 break; 1162 else 1163 { 1164 /* Use of some special register names come with a 1165 specific warning. Note that we have no ".cpu type" 1166 pseudo yet, so some of this is just unused 1167 framework. */ 1168 if (out_insnp->spec_reg->warning) 1169 as_warn (out_insnp->spec_reg->warning); 1170 else if (out_insnp->spec_reg->applicable_version 1171 == cris_ver_warning) 1172 /* Others have a generic warning. */ 1173 as_warn (_("Unimplemented register `%s' specified"), 1174 out_insnp->spec_reg->name); 1175 1176 out_insnp->opcode 1177 |= out_insnp->spec_reg->number << 12; 1178 continue; 1179 } 1180 1181 case 'p': 1182 /* This character is used in the disassembler to 1183 recognize a prefix instruction to fold into the 1184 addressing mode for the next instruction. It is 1185 ignored here. */ 1186 continue; 1187 1188 case 'R': 1189 /* General register in bits <15:12>. */ 1190 if (! get_gen_reg (&s, ®no)) 1191 break; 1192 else 1193 { 1194 out_insnp->opcode |= regno << 12; 1195 continue; 1196 } 1197 1198 case 'r': 1199 /* General register in bits <3:0>. */ 1200 if (! get_gen_reg (&s, ®no)) 1201 break; 1202 else 1203 { 1204 out_insnp->opcode |= regno /* << 0 */; 1205 continue; 1206 } 1207 1208 case 'S': 1209 /* Source operand in bit <10> and a prefix; a 3-operand 1210 prefix. */ 1211 if (! get_3op_or_dip_prefix_op (&s, prefixp)) 1212 break; 1213 else 1214 continue; 1215 1216 case 's': 1217 /* Source operand in bits <10>, <3:0> and optionally a 1218 prefix; i.e. an indirect operand or an side-effect 1219 prefix. */ 1220 if (! get_autoinc_prefix_or_indir_op (&s, prefixp, &mode, 1221 ®no, 1222 &imm_expr_found, 1223 &out_insnp->expr)) 1224 break; 1225 else 1226 { 1227 if (prefixp->kind != PREFIX_NONE) 1228 { 1229 /* A prefix, so it has the autoincrement bit 1230 set. */ 1231 out_insnp->opcode |= (AUTOINCR_BIT << 8); 1232 } 1233 else 1234 /* No prefix. The "mode" variable contains bits like 1235 whether or not this is autoincrement mode. */ 1236 out_insnp->opcode |= (mode << 10); 1237 1238 out_insnp->opcode |= regno /* << 0 */ ; 1239 continue; 1240 } 1241 1242 case 'x': 1243 /* Rs.m in bits <15:12> and <5:4>. */ 1244 if (! get_gen_reg (&s, ®no) 1245 || ! get_bwd_size_modifier (&s, &size_bits)) 1246 break; 1247 else 1248 { 1249 out_insnp->opcode |= (regno << 12) | (size_bits << 4); 1250 continue; 1251 } 1252 1253 case 'y': 1254 /* Source operand in bits <10>, <3:0> and optionally a 1255 prefix; i.e. an indirect operand or an side-effect 1256 prefix. 1257 1258 The difference to 's' is that this does not allow an 1259 "immediate" expression. */ 1260 if (! get_autoinc_prefix_or_indir_op (&s, prefixp, 1261 &mode, ®no, 1262 &imm_expr_found, 1263 &out_insnp->expr) 1264 || imm_expr_found) 1265 break; 1266 else 1267 { 1268 if (prefixp->kind != PREFIX_NONE) 1269 { 1270 /* A prefix, and those matched here always have 1271 side-effects (see 's' case). */ 1272 out_insnp->opcode |= (AUTOINCR_BIT << 8); 1273 } 1274 else 1275 { 1276 /* No prefix. The "mode" variable contains bits 1277 like whether or not this is autoincrement 1278 mode. */ 1279 out_insnp->opcode |= (mode << 10); 1280 } 1281 1282 out_insnp->opcode |= regno /* << 0 */; 1283 continue; 1284 } 1285 1286 case 'z': 1287 /* Size modifier (B or W) in bit <4>. */ 1288 if (! get_bw_size_modifier (&s, &size_bits)) 1289 break; 1290 else 1291 { 1292 out_insnp->opcode |= size_bits << 4; 1293 continue; 1294 } 1295 1296 default: 1297 BAD_CASE (*args); 1298 } 1299 1300 /* We get here when we fail a match above or we found a 1301 complete match. Break out of this loop. */ 1302 break; 1303 } 1304 1305 /* Was it a match or a miss? */ 1306 if (match == 0) 1307 { 1308 /* If it's just that the args don't match, maybe the next 1309 item in the table is the same opcode but with 1310 matching operands. */ 1311 if (instruction[1].name != NULL 1312 && ! strcmp (instruction->name, instruction[1].name)) 1313 { 1314 /* Yep. Restart and try that one instead. */ 1315 ++instruction; 1316 s = operands; 1317 continue; 1318 } 1319 else 1320 { 1321 /* We've come to the end of instructions with this 1322 opcode, so it must be an error. */ 1323 as_bad (_("Illegal operands")); 1324 return; 1325 } 1326 } 1327 else 1328 { 1329 /* We have a match. Check if there's anything more to do. */ 1330 if (imm_expr_found) 1331 { 1332 /* There was an immediate mode operand, so we must check 1333 that it has an appropriate size. */ 1334 1335 switch (instruction->imm_oprnd_size) 1336 { 1337 default: 1338 case SIZE_NONE: 1339 /* Shouldn't happen; this one does not have immediate 1340 operands with different sizes. */ 1341 BAD_CASE (instruction->imm_oprnd_size); 1342 break; 1343 1344 case SIZE_FIX_32: 1345 out_insnp->imm_oprnd_size = 4; 1346 break; 1347 1348 case SIZE_SPEC_REG: 1349 switch (out_insnp->spec_reg->reg_size) 1350 { 1351 case 1: 1352 if (out_insnp->expr.X_op == O_constant 1353 && (out_insnp->expr.X_add_number < -128 1354 || out_insnp->expr.X_add_number > 255)) 1355 as_bad (_("Immediate value not in 8 bit range: %ld"), 1356 out_insnp->expr.X_add_number); 1357 /* Fall through. */ 1358 case 2: 1359 /* FIXME: We need an indicator in the instruction 1360 table to pass on, to indicate if we need to check 1361 overflow for a signed or unsigned number. */ 1362 if (out_insnp->expr.X_op == O_constant 1363 && (out_insnp->expr.X_add_number < -32768 1364 || out_insnp->expr.X_add_number > 65535)) 1365 as_bad (_("Immediate value not in 16 bit range: %ld"), 1366 out_insnp->expr.X_add_number); 1367 out_insnp->imm_oprnd_size = 2; 1368 break; 1369 1370 case 4: 1371 out_insnp->imm_oprnd_size = 4; 1372 break; 1373 1374 default: 1375 BAD_CASE (out_insnp->spec_reg->reg_size); 1376 } 1377 break; 1378 1379 case SIZE_FIELD: 1380 switch (size_bits) 1381 { 1382 case 0: 1383 if (out_insnp->expr.X_op == O_constant 1384 && (out_insnp->expr.X_add_number < -128 1385 || out_insnp->expr.X_add_number > 255)) 1386 as_bad (_("Immediate value not in 8 bit range: %ld"), 1387 out_insnp->expr.X_add_number); 1388 /* Fall through. */ 1389 case 1: 1390 if (out_insnp->expr.X_op == O_constant 1391 && (out_insnp->expr.X_add_number < -32768 1392 || out_insnp->expr.X_add_number > 65535)) 1393 as_bad (_("Immediate value not in 16 bit range: %ld"), 1394 out_insnp->expr.X_add_number); 1395 out_insnp->imm_oprnd_size = 2; 1396 break; 1397 1398 case 2: 1399 out_insnp->imm_oprnd_size = 4; 1400 break; 1401 1402 default: 1403 BAD_CASE (out_insnp->spec_reg->reg_size); 1404 } 1405 } 1406 } 1407 } 1408 break; 1409 } 1410 } 1411 1412 /* Get a B, W, or D size modifier from the string pointed out by *cPP, 1413 which must point to a '.' in front of the modifier. On successful 1414 return, *cPP is advanced to the character following the size 1415 modifier, and is undefined otherwise. 1416 1417 cPP Pointer to pointer to string starting 1418 with the size modifier. 1419 1420 size_bitsp Pointer to variable to contain the size bits on 1421 successful return. 1422 1423 Return 1 iff a correct size modifier is found, else 0. */ 1424 1425 static int 1426 get_bwd_size_modifier (cPP, size_bitsp) 1427 char **cPP; 1428 int *size_bitsp; 1429 { 1430 if (**cPP != '.') 1431 return 0; 1432 else 1433 { 1434 /* Consume the '.'. */ 1435 (*cPP)++; 1436 1437 switch (**cPP) 1438 { 1439 case 'B': 1440 case 'b': 1441 *size_bitsp = 0; 1442 break; 1443 1444 case 'W': 1445 case 'w': 1446 *size_bitsp = 1; 1447 break; 1448 1449 case 'D': 1450 case 'd': 1451 *size_bitsp = 2; 1452 break; 1453 1454 default: 1455 return 0; 1456 } 1457 1458 /* Consume the size letter. */ 1459 (*cPP)++; 1460 return 1; 1461 } 1462 } 1463 1464 /* Get a B or W size modifier from the string pointed out by *cPP, 1465 which must point to a '.' in front of the modifier. On successful 1466 return, *cPP is advanced to the character following the size 1467 modifier, and is undefined otherwise. 1468 1469 cPP Pointer to pointer to string starting 1470 with the size modifier. 1471 1472 size_bitsp Pointer to variable to contain the size bits on 1473 successful return. 1474 1475 Return 1 iff a correct size modifier is found, else 0. */ 1476 1477 static int 1478 get_bw_size_modifier (cPP, size_bitsp) 1479 char **cPP; 1480 int *size_bitsp; 1481 { 1482 if (**cPP != '.') 1483 return 0; 1484 else 1485 { 1486 /* Consume the '.'. */ 1487 (*cPP)++; 1488 1489 switch (**cPP) 1490 { 1491 case 'B': 1492 case 'b': 1493 *size_bitsp = 0; 1494 break; 1495 1496 case 'W': 1497 case 'w': 1498 *size_bitsp = 1; 1499 break; 1500 1501 default: 1502 return 0; 1503 } 1504 1505 /* Consume the size letter. */ 1506 (*cPP)++; 1507 return 1; 1508 } 1509 } 1510 1511 /* Get a general register from the string pointed out by *cPP. The 1512 variable *cPP is advanced to the character following the general 1513 register name on a successful return, and has its initial position 1514 otherwise. 1515 1516 cPP Pointer to pointer to string, beginning with a general 1517 register name. 1518 1519 regnop Pointer to int containing the register number. 1520 1521 Return 1 iff a correct general register designator is found, 1522 else 0. */ 1523 1524 static int 1525 get_gen_reg (cPP, regnop) 1526 char **cPP; 1527 int *regnop; 1528 { 1529 char *oldp; 1530 oldp = *cPP; 1531 1532 /* Handle a sometimes-mandatory dollar sign as register prefix. */ 1533 if (**cPP == REGISTER_PREFIX_CHAR) 1534 (*cPP)++; 1535 else if (demand_register_prefix) 1536 return 0; 1537 1538 switch (**cPP) 1539 { 1540 case 'P': 1541 case 'p': 1542 /* "P" as in "PC"? Consume the "P". */ 1543 (*cPP)++; 1544 1545 if ((**cPP == 'C' || **cPP == 'c') 1546 && ! isalnum ((*cPP)[1])) 1547 { 1548 /* It's "PC": consume the "c" and we're done. */ 1549 (*cPP)++; 1550 *regnop = REG_PC; 1551 return 1; 1552 } 1553 break; 1554 1555 case 'R': 1556 case 'r': 1557 /* Hopefully r[0-9] or r1[0-5]. Consume 'R' or 'r'. */ 1558 (*cPP)++; 1559 1560 if (isdigit (**cPP)) 1561 { 1562 /* It's r[0-9]. Consume and check the next digit. */ 1563 *regnop = **cPP - '0'; 1564 (*cPP)++; 1565 1566 if (! isalnum (**cPP)) 1567 { 1568 /* No more digits, we're done. */ 1569 return 1; 1570 } 1571 else 1572 { 1573 /* One more digit. Consume and add. */ 1574 *regnop = *regnop * 10 + (**cPP - '0'); 1575 1576 /* We need to check for a valid register number; Rn, 1577 0 <= n <= MAX_REG. */ 1578 if (*regnop <= MAX_REG) 1579 { 1580 /* Consume second digit. */ 1581 (*cPP)++; 1582 return 1; 1583 } 1584 } 1585 } 1586 break; 1587 1588 case 'S': 1589 case 's': 1590 /* "S" as in "SP"? Consume the "S". */ 1591 (*cPP)++; 1592 if (**cPP == 'P' || **cPP == 'p') 1593 { 1594 /* It's "SP": consume the "p" and we're done. */ 1595 (*cPP)++; 1596 *regnop = REG_SP; 1597 return 1; 1598 } 1599 break; 1600 1601 default: 1602 /* Just here to silence compilation warnings. */ 1603 ; 1604 } 1605 1606 /* We get here if we fail. Restore the pointer. */ 1607 *cPP = oldp; 1608 return 0; 1609 } 1610 1611 /* Get a special register from the string pointed out by *cPP. The 1612 variable *cPP is advanced to the character following the special 1613 register name if one is found, and retains its original position 1614 otherwise. 1615 1616 cPP Pointer to pointer to string starting with a special register 1617 name. 1618 1619 sregpp Pointer to Pointer to struct spec_reg, where a pointer to the 1620 register description will be stored. 1621 1622 Return 1 iff a correct special register name is found. */ 1623 1624 static int 1625 get_spec_reg (cPP, sregpp) 1626 char **cPP; 1627 const struct cris_spec_reg **sregpp; 1628 { 1629 char *s1; 1630 const char *s2; 1631 char *name_begin = *cPP; 1632 1633 const struct cris_spec_reg *sregp; 1634 1635 /* Handle a sometimes-mandatory dollar sign as register prefix. */ 1636 if (*name_begin == REGISTER_PREFIX_CHAR) 1637 name_begin++; 1638 else if (demand_register_prefix) 1639 return 0; 1640 1641 /* Loop over all special registers. */ 1642 for (sregp = cris_spec_regs; sregp->name != NULL; sregp++) 1643 { 1644 /* Start over from beginning of the supposed name. */ 1645 s1 = name_begin; 1646 s2 = sregp->name; 1647 1648 while (*s2 != '\0' 1649 && (isupper (*s1) ? tolower (*s1) == *s2 : *s1 == *s2)) 1650 { 1651 s1++; 1652 s2++; 1653 } 1654 1655 /* For a match, we must have consumed the name in the table, and we 1656 must be outside what could be part of a name. Assume here that a 1657 test for alphanumerics is sufficient for a name test. */ 1658 if (*s2 == 0 && ! isalnum (*s1)) 1659 { 1660 /* We have a match. Update the pointer and be done. */ 1661 *cPP = s1; 1662 *sregpp = sregp; 1663 return 1; 1664 } 1665 } 1666 1667 /* If we got here, we did not find any name. */ 1668 return 0; 1669 } 1670 1671 /* Get an unprefixed or side-effect-prefix operand from the string pointed 1672 out by *cPP. The pointer *cPP is advanced to the character following 1673 the indirect operand if we have success, else it contains an undefined 1674 value. 1675 1676 cPP Pointer to pointer to string beginning with the first 1677 character of the supposed operand. 1678 1679 prefixp Pointer to structure containing an optional instruction 1680 prefix. 1681 1682 is_autoincp Pointer to int indicating the indirect or autoincrement 1683 bits. 1684 1685 src_regnop Pointer to int containing the source register number in 1686 the instruction. 1687 1688 imm_foundp Pointer to an int indicating if an immediate expression 1689 is found. 1690 1691 imm_exprP Pointer to a structure containing an immediate 1692 expression, if success and if *imm_foundp is nonzero. 1693 1694 Return 1 iff a correct indirect operand is found. */ 1695 1696 static int 1697 get_autoinc_prefix_or_indir_op (cPP, prefixp, is_autoincp, src_regnop, 1698 imm_foundp, imm_exprP) 1699 char **cPP; 1700 struct cris_prefix *prefixp; 1701 int *is_autoincp; 1702 int *src_regnop; 1703 int *imm_foundp; 1704 expressionS *imm_exprP; 1705 { 1706 /* Assume there was no immediate mode expression. */ 1707 *imm_foundp = 0; 1708 1709 if (**cPP == '[') 1710 { 1711 /* So this operand is one of: 1712 Indirect: [rN] 1713 Autoincrement: [rN+] 1714 Indexed with assign: [rN=rM+rO.S] 1715 Offset with assign: [rN=rM+I], [rN=rM+[rO].s], [rN=rM+[rO+].s] 1716 1717 Either way, consume the '['. */ 1718 (*cPP)++; 1719 1720 /* Get the rN register. */ 1721 if (! get_gen_reg (cPP, src_regnop)) 1722 /* If there was no register, then this cannot match. */ 1723 return 0; 1724 else 1725 { 1726 /* We got the register, now check the next character. */ 1727 switch (**cPP) 1728 { 1729 case ']': 1730 /* Indirect mode. We're done here. */ 1731 prefixp->kind = PREFIX_NONE; 1732 *is_autoincp = 0; 1733 break; 1734 1735 case '+': 1736 /* This must be an auto-increment mode, if there's a 1737 match. */ 1738 prefixp->kind = PREFIX_NONE; 1739 *is_autoincp = 1; 1740 1741 /* We consume this character and break out to check the 1742 closing ']'. */ 1743 (*cPP)++; 1744 break; 1745 1746 case '=': 1747 /* This must be indexed with assign, or offset with assign 1748 to match. */ 1749 (*cPP)++; 1750 1751 /* Either way, the next thing must be a register. */ 1752 if (! get_gen_reg (cPP, &prefixp->base_reg_number)) 1753 /* No register, no match. */ 1754 return 0; 1755 else 1756 { 1757 /* We've consumed "[rN=rM", so we must be looking at 1758 "+rO.s]" or "+I]", or "-I]", or "+[rO].s]" or 1759 "+[rO+].s]". */ 1760 if (**cPP == '+') 1761 { 1762 int index_reg_number; 1763 (*cPP)++; 1764 1765 if (**cPP == '[') 1766 { 1767 int size_bits; 1768 /* This must be [rx=ry+[rz].s] or 1769 [rx=ry+[rz+].s] or no match. We must be 1770 looking at rz after consuming the '['. */ 1771 (*cPP)++; 1772 1773 if (!get_gen_reg (cPP, &index_reg_number)) 1774 return 0; 1775 1776 prefixp->kind = PREFIX_BDAP; 1777 prefixp->opcode 1778 = (BDAP_INDIR_OPCODE 1779 + (prefixp->base_reg_number << 12) 1780 + index_reg_number); 1781 1782 if (**cPP == '+') 1783 { 1784 /* We've seen "[rx=ry+[rz+" here, so now we 1785 know that there must be "].s]" left to 1786 check. */ 1787 (*cPP)++; 1788 prefixp->opcode |= AUTOINCR_BIT << 8; 1789 } 1790 1791 /* If it wasn't autoincrement, we don't need to 1792 add anything. */ 1793 1794 /* Check the next-to-last ']'. */ 1795 if (**cPP != ']') 1796 return 0; 1797 1798 (*cPP)++; 1799 1800 /* Check the ".s" modifier. */ 1801 if (! get_bwd_size_modifier (cPP, &size_bits)) 1802 return 0; 1803 1804 prefixp->opcode |= size_bits << 4; 1805 1806 /* Now we got [rx=ry+[rz+].s or [rx=ry+[rz].s. 1807 We break out to check the final ']'. */ 1808 break; 1809 } 1810 /* It wasn't an indirection. Check if it's a 1811 register. */ 1812 else if (get_gen_reg (cPP, &index_reg_number)) 1813 { 1814 int size_bits; 1815 1816 /* Indexed with assign mode: "[rN+rM.S]". */ 1817 prefixp->kind = PREFIX_BIAP; 1818 prefixp->opcode 1819 = (BIAP_OPCODE + (index_reg_number << 12) 1820 + prefixp->base_reg_number /* << 0 */); 1821 1822 if (! get_bwd_size_modifier (cPP, &size_bits)) 1823 /* Size missing, this isn't a match. */ 1824 return 0; 1825 else 1826 { 1827 /* Size found, break out to check the 1828 final ']'. */ 1829 prefixp->opcode |= size_bits << 4; 1830 break; 1831 } 1832 } 1833 /* Not a register. Then this must be "[rN+I]". */ 1834 else if (cris_get_expression (cPP, &prefixp->expr)) 1835 { 1836 /* We've got offset with assign mode. Fill 1837 in the blanks and break out to match the 1838 final ']'. */ 1839 prefixp->kind = PREFIX_BDAP_IMM; 1840 break; 1841 } 1842 else 1843 /* Neither register nor expression found, so 1844 this can't be a match. */ 1845 return 0; 1846 } 1847 /* Not "[rN+" but perhaps "[rN-"? */ 1848 else if (**cPP == '-') 1849 { 1850 /* We must have an offset with assign mode. */ 1851 if (! cris_get_expression (cPP, &prefixp->expr)) 1852 /* No expression, no match. */ 1853 return 0; 1854 else 1855 { 1856 /* We've got offset with assign mode. Fill 1857 in the blanks and break out to match the 1858 final ']'. */ 1859 prefixp->kind = PREFIX_BDAP_IMM; 1860 break; 1861 } 1862 } 1863 else 1864 /* Neither '+' nor '-' after "[rN=rM". Lose. */ 1865 return 0; 1866 } 1867 default: 1868 /* Neither ']' nor '+' nor '=' after "[rN". Lose. */ 1869 return 0; 1870 } 1871 } 1872 1873 /* When we get here, we have a match and will just check the closing 1874 ']'. We can still fail though. */ 1875 if (**cPP != ']') 1876 return 0; 1877 else 1878 { 1879 /* Don't forget to consume the final ']'. 1880 Then return in glory. */ 1881 (*cPP)++; 1882 return 1; 1883 } 1884 } 1885 /* No indirection. Perhaps a constant? */ 1886 else if (cris_get_expression (cPP, imm_exprP)) 1887 { 1888 /* Expression found, this is immediate mode. */ 1889 prefixp->kind = PREFIX_NONE; 1890 *is_autoincp = 1; 1891 *src_regnop = REG_PC; 1892 *imm_foundp = 1; 1893 return 1; 1894 } 1895 1896 /* No luck today. */ 1897 return 0; 1898 } 1899 1900 /* This function gets an indirect operand in a three-address operand 1901 combination from the string pointed out by *cPP. The pointer *cPP is 1902 advanced to the character following the indirect operand on success, or 1903 has an unspecified value on failure. 1904 1905 cPP Pointer to pointer to string begining 1906 with the operand 1907 1908 prefixp Pointer to structure containing an 1909 instruction prefix 1910 1911 Returns 1 iff a correct indirect operand is found. */ 1912 1913 static int 1914 get_3op_or_dip_prefix_op (cPP, prefixp) 1915 char **cPP; 1916 struct cris_prefix *prefixp; 1917 { 1918 int reg_number; 1919 1920 if (**cPP != '[') 1921 /* We must have a '[' or it's a clean failure. */ 1922 return 0; 1923 1924 /* Eat the first '['. */ 1925 (*cPP)++; 1926 1927 if (**cPP == '[') 1928 { 1929 /* A second '[', so this must be double-indirect mode. */ 1930 (*cPP)++; 1931 prefixp->kind = PREFIX_DIP; 1932 prefixp->opcode = DIP_OPCODE; 1933 1934 /* Get the register or fail entirely. */ 1935 if (! get_gen_reg (cPP, ®_number)) 1936 return 0; 1937 else 1938 { 1939 prefixp->opcode |= reg_number /* << 0 */ ; 1940 if (**cPP == '+') 1941 { 1942 /* Since we found a '+', this must be double-indirect 1943 autoincrement mode. */ 1944 (*cPP)++; 1945 prefixp->opcode |= AUTOINCR_BIT << 8; 1946 } 1947 1948 /* There's nothing particular to do, if this was a 1949 double-indirect *without* autoincrement. */ 1950 } 1951 1952 /* Check the first ']'. The second one is checked at the end. */ 1953 if (**cPP != ']') 1954 return 0; 1955 1956 /* Eat the first ']', so we'll be looking at a second ']'. */ 1957 (*cPP)++; 1958 } 1959 /* No second '['. Then we should have a register here, making 1960 it "[rN". */ 1961 else if (get_gen_reg (cPP, &prefixp->base_reg_number)) 1962 { 1963 /* This must be indexed or offset mode: "[rN+I]" or 1964 "[rN+rM.S]" or "[rN+[rM].S]" or "[rN+[rM+].S]". */ 1965 if (**cPP == '+') 1966 { 1967 /* Not the first alternative, must be one of the last 1968 three. */ 1969 int index_reg_number; 1970 1971 (*cPP)++; 1972 1973 if (**cPP == '[') 1974 { 1975 /* This is "[rx+["... Expect a register next. */ 1976 int size_bits; 1977 (*cPP)++; 1978 1979 if (!get_gen_reg (cPP, &index_reg_number)) 1980 return 0; 1981 1982 prefixp->kind = PREFIX_BDAP; 1983 prefixp->opcode 1984 = (BDAP_INDIR_OPCODE 1985 + (prefixp->base_reg_number << 12) 1986 + index_reg_number); 1987 1988 /* We've seen "[rx+[ry", so check if this is 1989 autoincrement. */ 1990 if (**cPP == '+') 1991 { 1992 /* Yep, now at "[rx+[ry+". */ 1993 (*cPP)++; 1994 prefixp->opcode |= AUTOINCR_BIT << 8; 1995 } 1996 /* If it wasn't autoincrement, we don't need to 1997 add anything. */ 1998 1999 /* Check a first closing ']': "[rx+[ry]" or 2000 "[rx+[ry+]". */ 2001 if (**cPP != ']') 2002 return 0; 2003 (*cPP)++; 2004 2005 /* Now expect a size modifier ".S". */ 2006 if (! get_bwd_size_modifier (cPP, &size_bits)) 2007 return 0; 2008 2009 prefixp->opcode |= size_bits << 4; 2010 2011 /* Ok, all interesting stuff has been seen: 2012 "[rx+[ry+].S" or "[rx+[ry].S". We only need to 2013 expect a final ']', which we'll do in a common 2014 closing session. */ 2015 } 2016 /* Seen "[rN+", but not a '[', so check if we have a 2017 register. */ 2018 else if (get_gen_reg (cPP, &index_reg_number)) 2019 { 2020 /* This is indexed mode: "[rN+rM.S]" or 2021 "[rN+rM.S+]". */ 2022 int size_bits; 2023 prefixp->kind = PREFIX_BIAP; 2024 prefixp->opcode 2025 = (BIAP_OPCODE 2026 | prefixp->base_reg_number /* << 0 */ 2027 | (index_reg_number << 12)); 2028 2029 /* Consume the ".S". */ 2030 if (! get_bwd_size_modifier (cPP, &size_bits)) 2031 /* Missing size, so fail. */ 2032 return 0; 2033 else 2034 /* Size found. Add that piece and drop down to 2035 the common checking of the closing ']'. */ 2036 prefixp->opcode |= size_bits << 4; 2037 } 2038 /* Seen "[rN+", but not a '[' or a register, so then 2039 it must be a constant "I". */ 2040 else if (cris_get_expression (cPP, &prefixp->expr)) 2041 { 2042 /* Expression found, so fill in the bits of offset 2043 mode and drop down to check the closing ']'. */ 2044 prefixp->kind = PREFIX_BDAP_IMM; 2045 } 2046 else 2047 /* Nothing valid here: lose. */ 2048 return 0; 2049 } 2050 /* Seen "[rN" but no '+', so check if it's a '-'. */ 2051 else if (**cPP == '-') 2052 { 2053 /* Yep, we must have offset mode. */ 2054 if (! cris_get_expression (cPP, &prefixp->expr)) 2055 /* No expression, so we lose. */ 2056 return 0; 2057 else 2058 { 2059 /* Expression found to make this offset mode, so 2060 fill those bits and drop down to check the 2061 closing ']'. */ 2062 prefixp->kind = PREFIX_BDAP_IMM; 2063 } 2064 } 2065 else 2066 { 2067 /* We've seen "[rN", but not '+' or '-'; rather a ']'. 2068 Hmm. Normally this is a simple indirect mode that we 2069 shouldn't match, but if we expect ']', then we have a 2070 zero offset, so it can be a three-address-operand, 2071 like "[rN],rO,rP", thus offset mode. 2072 2073 Don't eat the ']', that will be done in the closing 2074 ceremony. */ 2075 prefixp->expr.X_op = O_constant; 2076 prefixp->expr.X_add_number = 0; 2077 prefixp->expr.X_add_symbol = NULL; 2078 prefixp->expr.X_op_symbol = NULL; 2079 prefixp->kind = PREFIX_BDAP_IMM; 2080 } 2081 } 2082 /* A '[', but no second '[', and no register. Check if we 2083 have an expression, making this "[I]" for a double-indirect 2084 prefix. */ 2085 else if (cris_get_expression (cPP, &prefixp->expr)) 2086 { 2087 /* Expression found, the so called absolute mode for a 2088 double-indirect prefix on PC. */ 2089 prefixp->kind = PREFIX_DIP; 2090 prefixp->opcode = DIP_OPCODE | (AUTOINCR_BIT << 8) | REG_PC; 2091 prefixp->reloc = BFD_RELOC_32; 2092 } 2093 else 2094 /* Neither '[' nor register nor expression. We lose. */ 2095 return 0; 2096 2097 /* We get here as a closing ceremony to a successful match. We just 2098 need to check the closing ']'. */ 2099 if (**cPP != ']') 2100 /* Oops. Close but no air-polluter. */ 2101 return 0; 2102 2103 /* Don't forget to consume that ']', before returning in glory. */ 2104 (*cPP)++; 2105 return 1; 2106 } 2107 2108 /* Get an expression from the string pointed out by *cPP. 2109 The pointer *cPP is advanced to the character following the expression 2110 on a success, or retains its original value otherwise. 2111 2112 cPP Pointer to pointer to string beginning with the expression. 2113 2114 exprP Pointer to structure containing the expression. 2115 2116 Return 1 iff a correct expression is found. */ 2117 2118 static int 2119 cris_get_expression (cPP, exprP) 2120 char **cPP; 2121 expressionS *exprP; 2122 { 2123 char *saved_input_line_pointer; 2124 segT exp; 2125 2126 /* The "expression" function expects to find an expression at the 2127 global variable input_line_pointer, so we have to save it to give 2128 the impression that we don't fiddle with global variables. */ 2129 saved_input_line_pointer = input_line_pointer; 2130 input_line_pointer = *cPP; 2131 2132 exp = expression (exprP); 2133 if (exprP->X_op == O_illegal || exprP->X_op == O_absent) 2134 { 2135 input_line_pointer = saved_input_line_pointer; 2136 return 0; 2137 } 2138 2139 /* Everything seems to be fine, just restore the global 2140 input_line_pointer and say we're successful. */ 2141 *cPP = input_line_pointer; 2142 input_line_pointer = saved_input_line_pointer; 2143 return 1; 2144 } 2145 2146 /* Get a sequence of flag characters from *spp. The pointer *cPP is 2147 advanced to the character following the expression. The flag 2148 characters are consecutive, no commas or spaces. 2149 2150 cPP Pointer to pointer to string beginning with the expression. 2151 2152 flagp Pointer to int to return the flags expression. 2153 2154 Return 1 iff a correct flags expression is found. */ 2155 2156 static int 2157 get_flags (cPP, flagsp) 2158 char **cPP; 2159 int *flagsp; 2160 { 2161 for (;;) 2162 { 2163 switch (**cPP) 2164 { 2165 case 'd': 2166 case 'D': 2167 case 'm': 2168 case 'M': 2169 *flagsp |= 0x80; 2170 break; 2171 2172 case 'e': 2173 case 'E': 2174 case 'b': 2175 case 'B': 2176 *flagsp |= 0x40; 2177 break; 2178 2179 case 'i': 2180 case 'I': 2181 *flagsp |= 0x20; 2182 break; 2183 2184 case 'x': 2185 case 'X': 2186 *flagsp |= 0x10; 2187 break; 2188 2189 case 'n': 2190 case 'N': 2191 *flagsp |= 0x8; 2192 break; 2193 2194 case 'z': 2195 case 'Z': 2196 *flagsp |= 0x4; 2197 break; 2198 2199 case 'v': 2200 case 'V': 2201 *flagsp |= 0x2; 2202 break; 2203 2204 case 'c': 2205 case 'C': 2206 *flagsp |= 1; 2207 break; 2208 2209 default: 2210 /* We consider this successful if we stop at a comma or 2211 whitespace. Anything else, and we consider it a failure. */ 2212 if (**cPP != ',' 2213 && **cPP != 0 2214 && ! isspace (**cPP)) 2215 return 0; 2216 else 2217 return 1; 2218 } 2219 2220 /* Don't forget to consume each flag character. */ 2221 (*cPP)++; 2222 } 2223 } 2224 2225 /* Generate code and fixes for a BDAP prefix. 2226 2227 base_regno Int containing the base register number. 2228 2229 exprP Pointer to structure containing the offset expression. */ 2230 2231 static void 2232 gen_bdap (base_regno, exprP) 2233 int base_regno; 2234 expressionS *exprP; 2235 { 2236 unsigned int opcode; 2237 char *opcodep; 2238 2239 /* Put out the prefix opcode; assume quick immediate mode at first. */ 2240 opcode = BDAP_QUICK_OPCODE | (base_regno << 12); 2241 opcodep = cris_insn_first_word_frag (); 2242 md_number_to_chars (opcodep, opcode, 2); 2243 2244 if (exprP->X_op == O_constant) 2245 { 2246 /* We have an absolute expression that we know the size of right 2247 now. */ 2248 long int value; 2249 int size; 2250 2251 value = exprP->X_add_number; 2252 if (value < -32768 || value > 32767) 2253 /* Outside range for a "word", make it a dword. */ 2254 size = 2; 2255 else 2256 /* Assume "word" size. */ 2257 size = 1; 2258 2259 /* If this is a signed-byte value, we can fit it into the prefix 2260 insn itself. */ 2261 if (value >= -128 && value <= 127) 2262 opcodep[0] = value; 2263 else 2264 { 2265 /* This is a word or dword displacement, which will be put in a 2266 word or dword after the prefix. */ 2267 char *p; 2268 2269 opcodep[0] = BDAP_PC_LOW + (size << 4); 2270 opcodep[1] &= 0xF0; 2271 opcodep[1] |= BDAP_INCR_HIGH; 2272 p = frag_more (1 << size); 2273 md_number_to_chars (p, value, 1 << size); 2274 } 2275 } 2276 else 2277 /* The expression is not defined yet but may become absolute. We make 2278 it a relocation to be relaxed. */ 2279 frag_var (rs_machine_dependent, 4, 0, 2280 ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_UNDF), 2281 exprP->X_add_symbol, exprP->X_add_number, opcodep); 2282 } 2283 2284 /* Encode a branch displacement in the range -256..254 into the form used 2285 by CRIS conditional branch instructions. 2286 2287 offset The displacement value in bytes. */ 2288 2289 static int 2290 branch_disp (offset) 2291 int offset; 2292 { 2293 int disp; 2294 2295 disp = offset & 0xFE; 2296 2297 if (offset < 0) 2298 disp |= 1; 2299 2300 return disp; 2301 } 2302 2303 /* Generate code and fixes for a 32-bit conditional branch instruction 2304 created by "extending" an existing 8-bit branch instruction. 2305 2306 opcodep Pointer to the word containing the original 8-bit branch 2307 instruction. 2308 2309 writep Pointer to "extension area" following the first instruction 2310 word. 2311 2312 fragP Pointer to the frag containing the instruction. 2313 2314 add_symP, Parts of the destination address expression. 2315 sub_symP, 2316 add_num. */ 2317 2318 static void 2319 gen_cond_branch_32 (opcodep, writep, fragP, add_symP, sub_symP, add_num) 2320 char *opcodep; 2321 char *writep; 2322 fragS *fragP; 2323 symbolS *add_symP; 2324 symbolS *sub_symP; 2325 long int add_num; 2326 { 2327 if (warn_for_branch_expansion) 2328 { 2329 /* FIXME: Find out and change to as_warn_where. Add testcase. */ 2330 as_warn (_("32-bit conditional branch generated")); 2331 } 2332 2333 /* Here, writep points to what will be opcodep + 2. First, we change 2334 the actual branch in opcodep[0] and opcodep[1], so that in the 2335 final insn, it will look like: 2336 opcodep+10: Bcc .-6 2337 2338 This means we don't have to worry about changing the opcode or 2339 messing with te delay-slot instruction. So, we move it to last in 2340 the "extended" branch, and just change the displacement. Admittedly, 2341 it's not the optimal extended construct, but we should get this 2342 rarely enough that it shouldn't matter. */ 2343 2344 writep[8] = branch_disp (-2 - 6); 2345 writep[9] = opcodep[1]; 2346 2347 /* Then, we change the branch to an unconditional branch over the 2348 extended part, to the new location of the Bcc: 2349 opcodep: BA .+10 2350 opcodep+2: NOP 2351 2352 Note that these two writes are to currently different locations, 2353 merged later. */ 2354 2355 md_number_to_chars (opcodep, BA_QUICK_OPCODE + 8, 2); 2356 md_number_to_chars (writep, NOP_OPCODE, 2); 2357 2358 /* Then the extended thing, the 32-bit jump insn. 2359 opcodep+4: JUMP [PC+] */ 2360 2361 md_number_to_chars (writep + 2, JUMP_PC_INCR_OPCODE, 2); 2362 2363 /* We have to fill in the actual value too. 2364 opcodep+6: .DWORD 2365 This is most probably an expression, but we can cope with an absolute 2366 value too. FIXME: Testcase needed. */ 2367 2368 if (add_symP == NULL && sub_symP == NULL) 2369 /* An absolute address. */ 2370 md_number_to_chars (writep + 4, add_num, 4); 2371 else 2372 { 2373 /* Not absolute, we have to make it a frag for later evaluation. */ 2374 know (sub_symP == 0); 2375 2376 fix_new (fragP, writep + 4 - fragP->fr_literal, 4, add_symP, 2377 add_num, 0, BFD_RELOC_32); 2378 } 2379 } 2380 2381 /* This *could* be: 2382 2383 Turn a string in input_line_pointer into a floating point constant 2384 of type TYPE, and store the appropriate bytes in *LITP. The number 2385 of LITTLENUMS emitted is stored in *SIZEP. 2386 2387 type A character from FLTCHARS that describes what kind of 2388 floating-point number is wanted. 2389 2390 litp A pointer to an array that the result should be stored in. 2391 2392 sizep A pointer to an integer where the size of the result is stored. 2393 2394 But we don't support floating point constants in assembly code *at all*, 2395 since it's suboptimal and just opens up bug opportunities. GCC emits 2396 the bit patterns as hex. All we could do here is to emit what GCC 2397 would have done in the first place. *Nobody* writes floating-point 2398 code as assembly code, but if they do, they should be able enough to 2399 find out the correct bit patterns and use them. */ 2400 2401 char * 2402 md_atof (type, litp, sizep) 2403 char type ATTRIBUTE_UNUSED; 2404 char *litp ATTRIBUTE_UNUSED; 2405 int *sizep ATTRIBUTE_UNUSED; 2406 { 2407 /* FIXME: Is this function mentioned in the internals.texi manual? If 2408 not, add it. */ 2409 return _("Bad call to md_atof () - floating point formats are not supported"); 2410 } 2411 2412 /* Turn a number as a fixS * into a series of bytes that represents the 2413 number on the target machine. The purpose of this procedure is the 2414 same as that of md_number_to_chars but this procedure is supposed to 2415 handle general bit field fixes and machine-dependent fixups. 2416 2417 bufp Pointer to an array where the result should be stored. 2418 2419 val The value to store. 2420 2421 n The number of bytes in "val" that should be stored. 2422 2423 fixP The fix to be applied to the bit field starting at bufp. */ 2424 2425 static void 2426 cris_number_to_imm (bufp, val, n, fixP) 2427 char *bufp; 2428 long val; 2429 int n; 2430 fixS *fixP; 2431 { 2432 segT sym_seg; 2433 2434 know (n <= 4); 2435 know (fixP); 2436 2437 /* We put the relative "vma" for the other segment for inter-segment 2438 relocations in the object data to stay binary "compatible" (with an 2439 uninteresting old version) for the relocation. 2440 Maybe delete some day. */ 2441 if (fixP->fx_addsy 2442 && (sym_seg = S_GET_SEGMENT (fixP->fx_addsy)) != now_seg) 2443 val += sym_seg->vma; 2444 2445 switch (fixP->fx_r_type) 2446 { 2447 /* Ditto here, we put the addend into the object code as 2448 well as the reloc addend. Keep it that way for now, to simplify 2449 regression tests on the object file contents. FIXME: Seems 2450 uninteresting now that we have a test suite. */ 2451 2452 case BFD_RELOC_32: 2453 /* No use having warnings here, since most hosts have a 32-bit type 2454 for "long" (which will probably change soon, now that I wrote 2455 this). */ 2456 bufp[3] = (val >> 24) & 0xFF; 2457 bufp[2] = (val >> 16) & 0xFF; 2458 bufp[1] = (val >> 8) & 0xFF; 2459 bufp[0] = val & 0xFF; 2460 break; 2461 2462 /* FIXME: The 16 and 8-bit cases should have a way to check 2463 whether a signed or unsigned (or any signedness) number is 2464 accepted. 2465 FIXME: Does the as_bad calls find the line number by themselves, 2466 or should we change them into as_bad_where? */ 2467 2468 case BFD_RELOC_16: 2469 if (val > 0xffff || val < -32768) 2470 as_bad (_("Value not in 16 bit range: %ld"), val); 2471 if (! fixP->fx_addsy) 2472 { 2473 bufp[1] = (val >> 8) & 0xFF; 2474 bufp[0] = val & 0xFF; 2475 } 2476 break; 2477 2478 case BFD_RELOC_8: 2479 if (val > 255 || val < -128) 2480 as_bad (_("Value not in 8 bit range: %ld"), val); 2481 if (! fixP->fx_addsy) 2482 bufp[0] = val & 0xFF; 2483 break; 2484 2485 case BFD_RELOC_CRIS_UNSIGNED_4: 2486 if (val > 15 || val < 0) 2487 as_bad (_("Value not in 4 bit unsigned range: %ld"), val); 2488 if (! fixP->fx_addsy) 2489 bufp[0] |= val & 0x0F; 2490 break; 2491 2492 case BFD_RELOC_CRIS_UNSIGNED_5: 2493 if (val > 31 || val < 0) 2494 as_bad (_("Value not in 5 bit unsigned range: %ld"), val); 2495 if (! fixP->fx_addsy) 2496 bufp[0] |= val & 0x1F; 2497 break; 2498 2499 case BFD_RELOC_CRIS_SIGNED_6: 2500 if (val > 31 || val < -32) 2501 as_bad (_("Value not in 6 bit range: %ld"), val); 2502 if (! fixP->fx_addsy) 2503 bufp[0] |= val & 0x3F; 2504 break; 2505 2506 case BFD_RELOC_CRIS_UNSIGNED_6: 2507 if (val > 63 || val < 0) 2508 as_bad (_("Value not in 6 bit unsigned range: %ld"), val); 2509 if (! fixP->fx_addsy) 2510 bufp[0] |= val & 0x3F; 2511 break; 2512 2513 case BFD_RELOC_CRIS_BDISP8: 2514 if (! fixP->fx_addsy) 2515 bufp[0] = branch_disp (val); 2516 break; 2517 2518 case BFD_RELOC_NONE: 2519 /* May actually happen automatically. For example at broken 2520 words, if the word turns out not to be broken. 2521 FIXME: When? Which testcase? */ 2522 if (! fixP->fx_addsy) 2523 md_number_to_chars (bufp, val, n); 2524 break; 2525 2526 case BFD_RELOC_VTABLE_INHERIT: 2527 /* This borrowed from tc-ppc.c on a whim. */ 2528 if (fixP->fx_addsy 2529 && !S_IS_DEFINED (fixP->fx_addsy) 2530 && !S_IS_WEAK (fixP->fx_addsy)) 2531 S_SET_WEAK (fixP->fx_addsy); 2532 /* Fall through. */ 2533 2534 case BFD_RELOC_VTABLE_ENTRY: 2535 fixP->fx_done = 0; 2536 break; 2537 2538 default: 2539 BAD_CASE (fixP->fx_r_type); 2540 } 2541 } 2542 2543 /* Processes machine-dependent command line options. Called once for 2544 each option on the command line that the machine-independent part of 2545 GAS does not understand. */ 2546 2547 int 2548 md_parse_option (arg, argp) 2549 int arg; 2550 char *argp ATTRIBUTE_UNUSED; 2551 { 2552 switch (arg) 2553 { 2554 case 'H': 2555 case 'h': 2556 printf (_("Please use --help to see usage and options for this assembler.\n")); 2557 md_show_usage (stdout); 2558 exit (EXIT_SUCCESS); 2559 2560 case 'N': 2561 warn_for_branch_expansion = 1; 2562 return 1; 2563 2564 case OPTION_NO_US: 2565 demand_register_prefix = true; 2566 2567 if (OUTPUT_FLAVOR == bfd_target_aout_flavour) 2568 as_bad (_("--no-underscore is invalid with a.out format"), arg); 2569 else 2570 symbols_have_leading_underscore = false; 2571 return 1; 2572 2573 case OPTION_US: 2574 demand_register_prefix = false; 2575 symbols_have_leading_underscore = true; 2576 return 1; 2577 2578 default: 2579 return 0; 2580 } 2581 } 2582 2583 /* Round up a section size to the appropriate boundary. */ 2584 valueT 2585 md_section_align (segment, size) 2586 segT segment; 2587 valueT size; 2588 { 2589 /* Round all sects to multiple of 4, except the bss section, which 2590 we'll round to word-size. 2591 2592 FIXME: Check if this really matters. All sections should be 2593 rounded up, and all sections should (optionally) be assumed to be 2594 dword-aligned, it's just that there is actual usage of linking to a 2595 multiple of two. */ 2596 if (OUTPUT_FLAVOR == bfd_target_aout_flavour) 2597 { 2598 if (segment == bss_section) 2599 return (size + 1) & ~1; 2600 return (size + 3) & ~3; 2601 } 2602 else 2603 { 2604 /* FIXME: Is this wanted? It matches the testsuite, but that's not 2605 really a valid reason. */ 2606 if (segment == text_section) 2607 return (size + 3) & ~3; 2608 } 2609 2610 return size; 2611 } 2612 2613 /* Generate a machine-dependent relocation. */ 2614 arelent * 2615 tc_gen_reloc (section, fixP) 2616 asection *section ATTRIBUTE_UNUSED; 2617 fixS *fixP; 2618 { 2619 arelent *relP; 2620 bfd_reloc_code_real_type code; 2621 2622 switch (fixP->fx_r_type) 2623 { 2624 case BFD_RELOC_32: 2625 case BFD_RELOC_16: 2626 case BFD_RELOC_8: 2627 case BFD_RELOC_VTABLE_INHERIT: 2628 case BFD_RELOC_VTABLE_ENTRY: 2629 code = fixP->fx_r_type; 2630 break; 2631 default: 2632 as_bad_where (fixP->fx_file, fixP->fx_line, 2633 _("Semantics error. This type of operand can not be relocated, it must be an assembly-time constant")); 2634 return 0; 2635 } 2636 2637 relP = (arelent *) xmalloc (sizeof (arelent)); 2638 assert (relP != 0); 2639 relP->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); 2640 *relP->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy); 2641 relP->address = fixP->fx_frag->fr_address + fixP->fx_where; 2642 2643 if (fixP->fx_pcrel) 2644 /* FIXME: Is this correct? */ 2645 relP->addend = fixP->fx_addnumber; 2646 else 2647 /* At least *this one* is correct. */ 2648 relP->addend = fixP->fx_offset; 2649 2650 /* This is the standard place for KLUDGEs to work around bugs in 2651 bfd_install_relocation (first such note in the documentation 2652 appears with binutils-2.8). 2653 2654 That function bfd_install_relocation does the wrong thing with 2655 putting stuff into the addend of a reloc (it should stay out) for a 2656 weak symbol. The really bad thing is that it adds the 2657 "segment-relative offset" of the symbol into the reloc. In this 2658 case, the reloc should instead be relative to the symbol with no 2659 other offset than the assembly code shows; and since the symbol is 2660 weak, any local definition should be ignored until link time (or 2661 thereafter). 2662 To wit: weaksym+42 should be weaksym+42 in the reloc, 2663 not weaksym+(offset_from_segment_of_local_weaksym_definition) 2664 2665 To "work around" this, we subtract the segment-relative offset of 2666 "known" weak symbols. This evens out the extra offset. 2667 2668 That happens for a.out but not for ELF, since for ELF, 2669 bfd_install_relocation uses the "special function" field of the 2670 howto, and does not execute the code that needs to be undone. */ 2671 2672 if (OUTPUT_FLAVOR == bfd_target_aout_flavour 2673 && fixP->fx_addsy && S_IS_WEAK (fixP->fx_addsy) 2674 && ! bfd_is_und_section (S_GET_SEGMENT (fixP->fx_addsy))) 2675 { 2676 relP->addend -= S_GET_VALUE (fixP->fx_addsy); 2677 } 2678 2679 relP->howto = bfd_reloc_type_lookup (stdoutput, code); 2680 if (! relP->howto) 2681 { 2682 const char *name; 2683 2684 name = S_GET_NAME (fixP->fx_addsy); 2685 if (name == NULL) 2686 name = _("<unknown>"); 2687 as_fatal (_("Cannot generate relocation type for symbol %s, code %s"), 2688 name, bfd_get_reloc_code_name (code)); 2689 } 2690 2691 return relP; 2692 } 2693 2694 /* Machine-dependent usage-output. */ 2695 2696 void 2697 md_show_usage (stream) 2698 FILE *stream; 2699 { 2700 fprintf (stream, _("CRIS-specific options:\n")); 2701 fprintf (stream, "%s", 2702 _(" -h, -H Don't execute, print this help text. Deprecated.\n")); 2703 fprintf (stream, "%s", 2704 _(" -N Warn when branches are expanded to jumps.\n")); 2705 fprintf (stream, "%s", 2706 _(" --underscore User symbols are normally prepended with underscore.\n")); 2707 fprintf (stream, "%s", 2708 _(" Registers will not need any prefix.\n")); 2709 fprintf (stream, "%s", 2710 _(" --no-underscore User symbols do not have any prefix.\n")); 2711 fprintf (stream, "%s", 2712 _(" Registers will require a `$'-prefix.\n")); 2713 } 2714 2715 /* Apply a fixS (fixup of an instruction or data that we didn't have 2716 enough info to complete immediately) to the data in a frag. */ 2717 2718 int 2719 md_apply_fix (fixP, valP) 2720 fixS *fixP; 2721 valueT *valP; 2722 { 2723 long val = *valP; 2724 2725 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; 2726 2727 if (fixP->fx_addsy == 0 && !fixP->fx_pcrel) 2728 fixP->fx_done = 1; 2729 2730 if (fixP->fx_bit_fixP || fixP->fx_im_disp != 0) 2731 { 2732 as_bad_where (fixP->fx_file, fixP->fx_line, _("Invalid relocation")); 2733 fixP->fx_done = 1; 2734 } 2735 else 2736 { 2737 /* I took this from tc-arc.c, since we used to not support 2738 fx_subsy != NULL. I'm not totally sure it's TRT. */ 2739 if (fixP->fx_subsy != (symbolS *) NULL) 2740 { 2741 if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section) 2742 val -= S_GET_VALUE (fixP->fx_subsy); 2743 else 2744 { 2745 /* We can't actually support subtracting a symbol. */ 2746 as_bad_where (fixP->fx_file, fixP->fx_line, 2747 _("expression too complex")); 2748 } 2749 } 2750 2751 cris_number_to_imm (buf, val, fixP->fx_size, fixP); 2752 } 2753 2754 return 1; 2755 } 2756 2757 /* All relocations are relative to the location just after the fixup; 2758 the address of the fixup plus its size. */ 2759 2760 long 2761 md_pcrel_from (fixP) 2762 fixS *fixP; 2763 { 2764 valueT addr = fixP->fx_where + fixP->fx_frag->fr_address; 2765 2766 /* FIXME: We get here only at the end of assembly, when X in ".-X" is 2767 still unknown. Since we don't have pc-relative relocations, this 2768 is invalid. What to do if anything for a.out, is to add 2769 pc-relative relocations everywhere including the elinux program 2770 loader. */ 2771 as_bad_where (fixP->fx_file, fixP->fx_line, 2772 _("Invalid pc-relative relocation")); 2773 return fixP->fx_size + addr; 2774 } 2775 2776 /* We have no need to give defaults for symbol-values. */ 2777 symbolS * 2778 md_undefined_symbol (name) 2779 char *name ATTRIBUTE_UNUSED; 2780 { 2781 return 0; 2782 } 2783 2784 /* Definition of TC_FORCE_RELOCATION. 2785 FIXME: Unsure of this. Can we omit it? Just copied from tc-i386.c 2786 when doing multi-object format with ELF, since it's the only other 2787 multi-object-format target with a.out and ELF. */ 2788 int 2789 md_cris_force_relocation (fixp) 2790 struct fix *fixp; 2791 { 2792 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT 2793 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) 2794 return 1; 2795 return 0; 2796 } 2797 2798 /* Check and emit error if broken-word handling has failed to fix up a 2799 case-table. This is called from write.c, after doing everything it 2800 knows about how to handle broken words. */ 2801 2802 void 2803 tc_cris_check_adjusted_broken_word (new_offset, brokwP) 2804 offsetT new_offset; 2805 struct broken_word *brokwP; 2806 { 2807 if (new_offset > 32767 || new_offset < -32768) 2808 /* We really want a genuine error, not a warning, so make it one. */ 2809 as_bad_where (brokwP->frag->fr_file, brokwP->frag->fr_line, 2810 _("Adjusted signed .word (%ld) overflows: `switch'-statement too large."), 2811 (long) new_offset); 2812 } 2813 2814 /* Make a leading REGISTER_PREFIX_CHAR mandatory for all registers. */ 2815 2816 static void cris_force_reg_prefix () 2817 { 2818 demand_register_prefix = true; 2819 } 2820 2821 /* Do not demand a leading REGISTER_PREFIX_CHAR for all registers. */ 2822 2823 static void cris_relax_reg_prefix () 2824 { 2825 demand_register_prefix = false; 2826 } 2827 2828 /* Adjust for having a leading '_' on all user symbols. */ 2829 2830 static void cris_sym_leading_underscore () 2831 { 2832 /* We can't really do anything more than assert that what the program 2833 thinks symbol starts with agrees with the command-line options, since 2834 the bfd is already created. */ 2835 2836 if (symbols_have_leading_underscore == false) 2837 as_bad (".syntax %s requires command-line option `--underscore'", 2838 SYNTAX_USER_SYM_LEADING_UNDERSCORE); 2839 } 2840 2841 /* Adjust for not having any particular prefix on user symbols. */ 2842 2843 static void cris_sym_no_leading_underscore () 2844 { 2845 if (symbols_have_leading_underscore == true) 2846 as_bad (".syntax %s requires command-line option `--no-underscore'", 2847 SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE); 2848 } 2849 2850 /* Handle the .syntax pseudo, which takes an argument that decides what 2851 syntax the assembly code has. */ 2852 2853 static void 2854 s_syntax (ignore) 2855 int ignore ATTRIBUTE_UNUSED; 2856 { 2857 static const struct syntaxes 2858 { 2859 const char *operand; 2860 void (*fn) PARAMS ((void)); 2861 } syntax_table[] = 2862 {{SYNTAX_ENFORCE_REG_PREFIX, cris_force_reg_prefix}, 2863 {SYNTAX_RELAX_REG_PREFIX, cris_relax_reg_prefix}, 2864 {SYNTAX_USER_SYM_LEADING_UNDERSCORE, cris_sym_leading_underscore}, 2865 {SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE, cris_sym_no_leading_underscore}}; 2866 2867 const struct syntaxes *sp; 2868 2869 for (sp = syntax_table; 2870 sp < syntax_table + sizeof (syntax_table) / sizeof (syntax_table[0]); 2871 sp++) 2872 { 2873 if (strncmp (input_line_pointer, sp->operand, 2874 strlen (sp->operand)) == 0) 2875 { 2876 (sp->fn) (); 2877 2878 input_line_pointer += strlen (sp->operand); 2879 demand_empty_rest_of_line (); 2880 return; 2881 } 2882 } 2883 2884 as_bad (_("Unknown .syntax operand")); 2885 } 2886 2887 /* Wrapper for dwarf2_directive_file to emit error if this is seen when 2888 not emitting ELF. */ 2889 2890 static void 2891 s_cris_file (dummy) 2892 int dummy; 2893 { 2894 if (OUTPUT_FLAVOR != bfd_target_elf_flavour) 2895 as_bad ("Pseudodirective .file is only valid when generating ELF"); 2896 else 2897 dwarf2_directive_file (dummy); 2898 } 2899 2900 /* Wrapper for dwarf2_directive_loc to emit error if this is seen when not 2901 emitting ELF. */ 2902 2903 static void 2904 s_cris_loc (dummy) 2905 int dummy; 2906 { 2907 if (OUTPUT_FLAVOR != bfd_target_elf_flavour) 2908 as_bad ("Pseudodirective .loc is only valid when generating ELF"); 2909 else 2910 dwarf2_directive_loc (dummy); 2911 } 2912 2913 /* 2914 * Local variables: 2915 * eval: (c-set-style "gnu") 2916 * indent-tabs-mode: t 2917 * End: 2918 */ 2919