1 /* Definitions to target GDB to GNU/Linux on an ia64 architecture. 2 Copyright 1992, 1993, 2000 Free Software Foundation, Inc. 3 4 This file is part of GDB. 5 6 This program is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 2 of the License, or 9 (at your option) any later version. 10 11 This program is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with this program; if not, write to the Free Software 18 Foundation, Inc., 59 Temple Place - Suite 330, 19 Boston, MA 02111-1307, USA. */ 20 21 #ifndef TM_IA64_H 22 #define TM_IA64_H 23 24 /* Register numbers of various important registers */ 25 26 /* General registers; there are 128 of these 64 bit wide registers. The 27 first 32 are static and the last 96 are stacked. */ 28 #define IA64_GR0_REGNUM 0 29 #define IA64_GR1_REGNUM (IA64_GR0_REGNUM+1) 30 #define IA64_GR2_REGNUM (IA64_GR0_REGNUM+2) 31 #define IA64_GR3_REGNUM (IA64_GR0_REGNUM+3) 32 #define IA64_GR4_REGNUM (IA64_GR0_REGNUM+4) 33 #define IA64_GR5_REGNUM (IA64_GR0_REGNUM+5) 34 #define IA64_GR6_REGNUM (IA64_GR0_REGNUM+6) 35 #define IA64_GR7_REGNUM (IA64_GR0_REGNUM+7) 36 #define IA64_GR8_REGNUM (IA64_GR0_REGNUM+8) 37 #define IA64_GR9_REGNUM (IA64_GR0_REGNUM+9) 38 #define IA64_GR10_REGNUM (IA64_GR0_REGNUM+10) 39 #define IA64_GR11_REGNUM (IA64_GR0_REGNUM+11) 40 #define IA64_GR12_REGNUM (IA64_GR0_REGNUM+12) 41 #define IA64_GR31_REGNUM (IA64_GR0_REGNUM+31) 42 #define IA64_GR32_REGNUM (IA64_GR0_REGNUM+32) 43 #define IA64_GR127_REGNUM (IA64_GR0_REGNUM+127) 44 45 /* Floating point registers; 128 82-bit wide registers */ 46 #define IA64_FR0_REGNUM 128 47 #define IA64_FR1_REGNUM (IA64_FR0_REGNUM+1) 48 #define IA64_FR2_REGNUM (IA64_FR0_REGNUM+2) 49 #define IA64_FR8_REGNUM (IA64_FR0_REGNUM+8) 50 #define IA64_FR9_REGNUM (IA64_FR0_REGNUM+9) 51 #define IA64_FR10_REGNUM (IA64_FR0_REGNUM+10) 52 #define IA64_FR11_REGNUM (IA64_FR0_REGNUM+11) 53 #define IA64_FR12_REGNUM (IA64_FR0_REGNUM+12) 54 #define IA64_FR13_REGNUM (IA64_FR0_REGNUM+13) 55 #define IA64_FR14_REGNUM (IA64_FR0_REGNUM+14) 56 #define IA64_FR15_REGNUM (IA64_FR0_REGNUM+15) 57 #define IA64_FR16_REGNUM (IA64_FR0_REGNUM+16) 58 #define IA64_FR31_REGNUM (IA64_FR0_REGNUM+31) 59 #define IA64_FR32_REGNUM (IA64_FR0_REGNUM+32) 60 #define IA64_FR127_REGNUM (IA64_FR0_REGNUM+127) 61 62 /* Predicate registers; There are 64 of these one bit registers. 63 It'd be more convenient (implementation-wise) to use a single 64 64 bit word with all of these register in them. Note that there's 65 also a IA64_PR_REGNUM below which contains all the bits and is used for 66 communicating the actual values to the target. */ 67 68 #define IA64_PR0_REGNUM 256 69 #define IA64_PR1_REGNUM (IA64_PR0_REGNUM+1) 70 #define IA64_PR2_REGNUM (IA64_PR0_REGNUM+2) 71 #define IA64_PR3_REGNUM (IA64_PR0_REGNUM+3) 72 #define IA64_PR4_REGNUM (IA64_PR0_REGNUM+4) 73 #define IA64_PR5_REGNUM (IA64_PR0_REGNUM+5) 74 #define IA64_PR6_REGNUM (IA64_PR0_REGNUM+6) 75 #define IA64_PR7_REGNUM (IA64_PR0_REGNUM+7) 76 #define IA64_PR8_REGNUM (IA64_PR0_REGNUM+8) 77 #define IA64_PR9_REGNUM (IA64_PR0_REGNUM+9) 78 #define IA64_PR10_REGNUM (IA64_PR0_REGNUM+10) 79 #define IA64_PR11_REGNUM (IA64_PR0_REGNUM+11) 80 #define IA64_PR12_REGNUM (IA64_PR0_REGNUM+12) 81 #define IA64_PR13_REGNUM (IA64_PR0_REGNUM+13) 82 #define IA64_PR14_REGNUM (IA64_PR0_REGNUM+14) 83 #define IA64_PR15_REGNUM (IA64_PR0_REGNUM+15) 84 #define IA64_PR16_REGNUM (IA64_PR0_REGNUM+16) 85 #define IA64_PR17_REGNUM (IA64_PR0_REGNUM+17) 86 #define IA64_PR18_REGNUM (IA64_PR0_REGNUM+18) 87 #define IA64_PR19_REGNUM (IA64_PR0_REGNUM+19) 88 #define IA64_PR20_REGNUM (IA64_PR0_REGNUM+20) 89 #define IA64_PR21_REGNUM (IA64_PR0_REGNUM+21) 90 #define IA64_PR22_REGNUM (IA64_PR0_REGNUM+22) 91 #define IA64_PR23_REGNUM (IA64_PR0_REGNUM+23) 92 #define IA64_PR24_REGNUM (IA64_PR0_REGNUM+24) 93 #define IA64_PR25_REGNUM (IA64_PR0_REGNUM+25) 94 #define IA64_PR26_REGNUM (IA64_PR0_REGNUM+26) 95 #define IA64_PR27_REGNUM (IA64_PR0_REGNUM+27) 96 #define IA64_PR28_REGNUM (IA64_PR0_REGNUM+28) 97 #define IA64_PR29_REGNUM (IA64_PR0_REGNUM+29) 98 #define IA64_PR30_REGNUM (IA64_PR0_REGNUM+30) 99 #define IA64_PR31_REGNUM (IA64_PR0_REGNUM+31) 100 #define IA64_PR32_REGNUM (IA64_PR0_REGNUM+32) 101 #define IA64_PR33_REGNUM (IA64_PR0_REGNUM+33) 102 #define IA64_PR34_REGNUM (IA64_PR0_REGNUM+34) 103 #define IA64_PR35_REGNUM (IA64_PR0_REGNUM+35) 104 #define IA64_PR36_REGNUM (IA64_PR0_REGNUM+36) 105 #define IA64_PR37_REGNUM (IA64_PR0_REGNUM+37) 106 #define IA64_PR38_REGNUM (IA64_PR0_REGNUM+38) 107 #define IA64_PR39_REGNUM (IA64_PR0_REGNUM+39) 108 #define IA64_PR40_REGNUM (IA64_PR0_REGNUM+40) 109 #define IA64_PR41_REGNUM (IA64_PR0_REGNUM+41) 110 #define IA64_PR42_REGNUM (IA64_PR0_REGNUM+42) 111 #define IA64_PR43_REGNUM (IA64_PR0_REGNUM+43) 112 #define IA64_PR44_REGNUM (IA64_PR0_REGNUM+44) 113 #define IA64_PR45_REGNUM (IA64_PR0_REGNUM+45) 114 #define IA64_PR46_REGNUM (IA64_PR0_REGNUM+46) 115 #define IA64_PR47_REGNUM (IA64_PR0_REGNUM+47) 116 #define IA64_PR48_REGNUM (IA64_PR0_REGNUM+48) 117 #define IA64_PR49_REGNUM (IA64_PR0_REGNUM+49) 118 #define IA64_PR50_REGNUM (IA64_PR0_REGNUM+50) 119 #define IA64_PR51_REGNUM (IA64_PR0_REGNUM+51) 120 #define IA64_PR52_REGNUM (IA64_PR0_REGNUM+52) 121 #define IA64_PR53_REGNUM (IA64_PR0_REGNUM+53) 122 #define IA64_PR54_REGNUM (IA64_PR0_REGNUM+54) 123 #define IA64_PR55_REGNUM (IA64_PR0_REGNUM+55) 124 #define IA64_PR56_REGNUM (IA64_PR0_REGNUM+56) 125 #define IA64_PR57_REGNUM (IA64_PR0_REGNUM+57) 126 #define IA64_PR58_REGNUM (IA64_PR0_REGNUM+58) 127 #define IA64_PR59_REGNUM (IA64_PR0_REGNUM+59) 128 #define IA64_PR60_REGNUM (IA64_PR0_REGNUM+60) 129 #define IA64_PR61_REGNUM (IA64_PR0_REGNUM+61) 130 #define IA64_PR62_REGNUM (IA64_PR0_REGNUM+62) 131 #define IA64_PR63_REGNUM (IA64_PR0_REGNUM+63) 132 133 134 /* Branch registers: 8 64-bit registers for holding branch targets */ 135 #define IA64_BR0_REGNUM 320 136 #define IA64_BR1_REGNUM (IA64_BR0_REGNUM+1) 137 #define IA64_BR2_REGNUM (IA64_BR0_REGNUM+2) 138 #define IA64_BR3_REGNUM (IA64_BR0_REGNUM+3) 139 #define IA64_BR4_REGNUM (IA64_BR0_REGNUM+4) 140 #define IA64_BR5_REGNUM (IA64_BR0_REGNUM+5) 141 #define IA64_BR6_REGNUM (IA64_BR0_REGNUM+6) 142 #define IA64_BR7_REGNUM (IA64_BR0_REGNUM+7) 143 144 /* Virtual frame pointer; this matches IA64_FRAME_POINTER_REGNUM in 145 gcc/config/ia64/ia64.h. */ 146 #define IA64_VFP_REGNUM 328 147 148 /* Virtual return address pointer; this matches IA64_RETURN_ADDRESS_POINTER_REGNUM 149 in gcc/config/ia64/ia64.h. */ 150 #define IA64_VRAP_REGNUM 329 151 152 /* Predicate registers: There are 64 of these 1-bit registers. We 153 define a single register which is used to communicate these values 154 to/from the target. We will somehow contrive to make it appear that 155 IA64_PR0_REGNUM thru IA64_PR63_REGNUM hold the actual values. */ 156 #define IA64_PR_REGNUM 330 157 158 /* Instruction pointer: 64 bits wide */ 159 #define IA64_IP_REGNUM 331 160 161 /* Process Status Register */ 162 #define IA64_PSR_REGNUM 332 163 164 /* Current Frame Marker (Raw form may be the cr.ifs) */ 165 #define IA64_CFM_REGNUM 333 166 167 /* Application registers; 128 64-bit wide registers possible, but some 168 of them are reserved */ 169 #define IA64_AR0_REGNUM 334 170 #define IA64_KR0_REGNUM (IA64_AR0_REGNUM+0) 171 #define IA64_KR7_REGNUM (IA64_KR0_REGNUM+7) 172 173 #define IA64_RSC_REGNUM (IA64_AR0_REGNUM+16) 174 #define IA64_BSP_REGNUM (IA64_AR0_REGNUM+17) 175 #define IA64_BSPSTORE_REGNUM (IA64_AR0_REGNUM+18) 176 #define IA64_RNAT_REGNUM (IA64_AR0_REGNUM+19) 177 #define IA64_FCR_REGNUM (IA64_AR0_REGNUM+21) 178 #define IA64_EFLAG_REGNUM (IA64_AR0_REGNUM+24) 179 #define IA64_CSD_REGNUM (IA64_AR0_REGNUM+25) 180 #define IA64_SSD_REGNUM (IA64_AR0_REGNUM+26) 181 #define IA64_CFLG_REGNUM (IA64_AR0_REGNUM+27) 182 #define IA64_FSR_REGNUM (IA64_AR0_REGNUM+28) 183 #define IA64_FIR_REGNUM (IA64_AR0_REGNUM+29) 184 #define IA64_FDR_REGNUM (IA64_AR0_REGNUM+30) 185 #define IA64_CCV_REGNUM (IA64_AR0_REGNUM+32) 186 #define IA64_UNAT_REGNUM (IA64_AR0_REGNUM+36) 187 #define IA64_FPSR_REGNUM (IA64_AR0_REGNUM+40) 188 #define IA64_ITC_REGNUM (IA64_AR0_REGNUM+44) 189 #define IA64_PFS_REGNUM (IA64_AR0_REGNUM+64) 190 #define IA64_LC_REGNUM (IA64_AR0_REGNUM+65) 191 #define IA64_EC_REGNUM (IA64_AR0_REGNUM+66) 192 193 /* NAT (Not A Thing) Bits for the general registers; there are 128 of these */ 194 #define IA64_NAT0_REGNUM 462 195 #define IA64_NAT31_REGNUM (IA64_NAT0_REGNUM+31) 196 #define IA64_NAT32_REGNUM (IA64_NAT0_REGNUM+32) 197 #define IA64_NAT127_REGNUM (IA64_NAT0_REGNUM+127) 198 199 #endif /* TM_IA64_H */ 200