xref: /openbsd/gnu/usr.bin/binutils/gdb/frv-tdep.h (revision 11efff7f)
1*11efff7fSkettenis /* Architecture-dependent code for the Fujitsu FR-V, for GDB, the GNU Debugger.
2*11efff7fSkettenis    Copyright 2004 Free Software Foundation, Inc.
3*11efff7fSkettenis 
4*11efff7fSkettenis    This file is part of GDB.
5*11efff7fSkettenis 
6*11efff7fSkettenis    This program is free software; you can redistribute it and/or modify
7*11efff7fSkettenis    it under the terms of the GNU General Public License as published by
8*11efff7fSkettenis    the Free Software Foundation; either version 2 of the License, or
9*11efff7fSkettenis    (at your option) any later version.
10*11efff7fSkettenis 
11*11efff7fSkettenis    This program is distributed in the hope that it will be useful,
12*11efff7fSkettenis    but WITHOUT ANY WARRANTY; without even the implied warranty of
13*11efff7fSkettenis    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14*11efff7fSkettenis    GNU General Public License for more details.
15*11efff7fSkettenis 
16*11efff7fSkettenis    You should have received a copy of the GNU General Public License
17*11efff7fSkettenis    along with this program; if not, write to the Free Software
18*11efff7fSkettenis    Foundation, Inc., 59 Temple Place - Suite 330,
19*11efff7fSkettenis    Boston, MA 02111-1307, USA.  */
20*11efff7fSkettenis 
21*11efff7fSkettenis /* Enumerate the possible ABIs for FR-V.  */
22*11efff7fSkettenis enum frv_abi
23*11efff7fSkettenis   {
24*11efff7fSkettenis     FRV_ABI_EABI,
25*11efff7fSkettenis     FRV_ABI_FDPIC
26*11efff7fSkettenis   };
27*11efff7fSkettenis 
28*11efff7fSkettenis /* Register numbers.  The order in which these appear define the
29*11efff7fSkettenis    remote protocol, so take care in changing them.  */
30*11efff7fSkettenis enum {
31*11efff7fSkettenis   /* Register numbers 0 -- 63 are always reserved for general-purpose
32*11efff7fSkettenis      registers.  The chip at hand may have less.  */
33*11efff7fSkettenis   first_gpr_regnum = 0,
34*11efff7fSkettenis   sp_regnum = 1,
35*11efff7fSkettenis   fp_regnum = 2,
36*11efff7fSkettenis   struct_return_regnum = 3,
37*11efff7fSkettenis   last_gpr_regnum = 63,
38*11efff7fSkettenis 
39*11efff7fSkettenis   /* Register numbers 64 -- 127 are always reserved for floating-point
40*11efff7fSkettenis      registers.  The chip at hand may have less.  */
41*11efff7fSkettenis   first_fpr_regnum = 64,
42*11efff7fSkettenis   last_fpr_regnum = 127,
43*11efff7fSkettenis 
44*11efff7fSkettenis   /* The PC register.  */
45*11efff7fSkettenis   pc_regnum = 128,
46*11efff7fSkettenis 
47*11efff7fSkettenis   /* Register numbers 129 on up are always reserved for special-purpose
48*11efff7fSkettenis      registers.  */
49*11efff7fSkettenis   first_spr_regnum = 129,
50*11efff7fSkettenis   psr_regnum = 129,
51*11efff7fSkettenis   ccr_regnum = 130,
52*11efff7fSkettenis   cccr_regnum = 131,
53*11efff7fSkettenis   fdpic_loadmap_exec_regnum = 132,
54*11efff7fSkettenis   fdpic_loadmap_interp_regnum = 133,
55*11efff7fSkettenis   tbr_regnum = 135,
56*11efff7fSkettenis   brr_regnum = 136,
57*11efff7fSkettenis   dbar0_regnum = 137,
58*11efff7fSkettenis   dbar1_regnum = 138,
59*11efff7fSkettenis   dbar2_regnum = 139,
60*11efff7fSkettenis   dbar3_regnum = 140,
61*11efff7fSkettenis   scr0_regnum = 141,
62*11efff7fSkettenis   scr1_regnum = 142,
63*11efff7fSkettenis   scr2_regnum = 143,
64*11efff7fSkettenis   scr3_regnum = 144,
65*11efff7fSkettenis   lr_regnum = 145,
66*11efff7fSkettenis   lcr_regnum = 146,
67*11efff7fSkettenis   iacc0h_regnum = 147,
68*11efff7fSkettenis   iacc0l_regnum = 148,
69*11efff7fSkettenis   fsr0_regnum = 149,
70*11efff7fSkettenis   acc0_regnum = 150,
71*11efff7fSkettenis   acc7_regnum = 157,
72*11efff7fSkettenis   accg0123_regnum = 158,
73*11efff7fSkettenis   accg4567_regnum = 159,
74*11efff7fSkettenis   msr0_regnum = 160,
75*11efff7fSkettenis   msr1_regnum = 161,
76*11efff7fSkettenis   gner0_regnum = 162,
77*11efff7fSkettenis   gner1_regnum = 163,
78*11efff7fSkettenis   fner0_regnum = 164,
79*11efff7fSkettenis   fner1_regnum = 165,
80*11efff7fSkettenis   last_spr_regnum = 165,
81*11efff7fSkettenis 
82*11efff7fSkettenis   /* The total number of registers we know exist.  */
83*11efff7fSkettenis   frv_num_regs = last_spr_regnum + 1,
84*11efff7fSkettenis 
85*11efff7fSkettenis   /* Pseudo registers */
86*11efff7fSkettenis   first_pseudo_regnum = frv_num_regs,
87*11efff7fSkettenis 
88*11efff7fSkettenis   /* iacc0 - the 64-bit concatenation of iacc0h and iacc0l.  */
89*11efff7fSkettenis   iacc0_regnum = first_pseudo_regnum + 0,
90*11efff7fSkettenis   accg0_regnum = first_pseudo_regnum + 1,
91*11efff7fSkettenis   accg7_regnum = accg0_regnum + 7,
92*11efff7fSkettenis 
93*11efff7fSkettenis   last_pseudo_regnum = accg7_regnum,
94*11efff7fSkettenis   frv_num_pseudo_regs = last_pseudo_regnum - first_pseudo_regnum + 1,
95*11efff7fSkettenis };
96*11efff7fSkettenis 
97*11efff7fSkettenis /* Return the FR-V ABI associated with GDBARCH.  */
98*11efff7fSkettenis enum frv_abi frv_abi (struct gdbarch *gdbarch);
99*11efff7fSkettenis 
100*11efff7fSkettenis /* Fetch the interpreter and executable loadmap addresses (for shared
101*11efff7fSkettenis    library support) for the FDPIC ABI.  Return 0 if successful, -1 if
102*11efff7fSkettenis    not.  (E.g, -1 will be returned if the ABI isn't the FDPIC ABI.)  */
103*11efff7fSkettenis int frv_fdpic_loadmap_addresses (struct gdbarch *gdbarch,
104*11efff7fSkettenis                                  CORE_ADDR *interp_addr, CORE_ADDR *exec_addr);
105*11efff7fSkettenis 
106*11efff7fSkettenis /* Given a function entry point, find and return the GOT address for the
107*11efff7fSkettenis    containing load module.  */
108*11efff7fSkettenis CORE_ADDR frv_fdpic_find_global_pointer (CORE_ADDR addr);
109*11efff7fSkettenis 
110*11efff7fSkettenis /* Given a function entry point, find and return the canonical descriptor
111*11efff7fSkettenis    for that function, if one exists.  If no canonical descriptor could
112*11efff7fSkettenis    be found, return 0.  */
113*11efff7fSkettenis CORE_ADDR frv_fdpic_find_canonical_descriptor (CORE_ADDR entry_point);
114