1b725ae77Skettenis /* Target-dependent header for the MIPS architecture, for GDB, the GNU Debugger. 2b725ae77Skettenis 3b725ae77Skettenis Copyright 2002, 2003 Free Software Foundation, Inc. 4b725ae77Skettenis 5b725ae77Skettenis This file is part of GDB. 6b725ae77Skettenis 7b725ae77Skettenis This program is free software; you can redistribute it and/or modify 8b725ae77Skettenis it under the terms of the GNU General Public License as published by 9b725ae77Skettenis the Free Software Foundation; either version 2 of the License, or 10b725ae77Skettenis (at your option) any later version. 11b725ae77Skettenis 12b725ae77Skettenis This program is distributed in the hope that it will be useful, 13b725ae77Skettenis but WITHOUT ANY WARRANTY; without even the implied warranty of 14b725ae77Skettenis MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15b725ae77Skettenis GNU General Public License for more details. 16b725ae77Skettenis 17b725ae77Skettenis You should have received a copy of the GNU General Public License 18b725ae77Skettenis along with this program; if not, write to the Free Software 19b725ae77Skettenis Foundation, Inc., 59 Temple Place - Suite 330, 20b725ae77Skettenis Boston, MA 02111-1307, USA. */ 21b725ae77Skettenis 22b725ae77Skettenis #ifndef MIPS_TDEP_H 23b725ae77Skettenis #define MIPS_TDEP_H 24b725ae77Skettenis 25b725ae77Skettenis struct gdbarch; 26b725ae77Skettenis 27b725ae77Skettenis /* All the possible MIPS ABIs. */ 28b725ae77Skettenis enum mips_abi 29b725ae77Skettenis { 30b725ae77Skettenis MIPS_ABI_UNKNOWN = 0, 31b725ae77Skettenis MIPS_ABI_N32, 32b725ae77Skettenis MIPS_ABI_O32, 33b725ae77Skettenis MIPS_ABI_N64, 34b725ae77Skettenis MIPS_ABI_O64, 35b725ae77Skettenis MIPS_ABI_EABI32, 36b725ae77Skettenis MIPS_ABI_EABI64, 37b725ae77Skettenis MIPS_ABI_LAST 38b725ae77Skettenis }; 39b725ae77Skettenis 40b725ae77Skettenis /* Return the MIPS ABI associated with GDBARCH. */ 41b725ae77Skettenis enum mips_abi mips_abi (struct gdbarch *gdbarch); 42b725ae77Skettenis 43b725ae77Skettenis /* For wince :-(. */ 44b725ae77Skettenis extern CORE_ADDR mips_next_pc (CORE_ADDR pc); 45b725ae77Skettenis 4611efff7fSkettenis /* Return the MIPS ISA's register size. Just a short cut to the BFD 47b725ae77Skettenis architecture's word size. */ 4811efff7fSkettenis extern int mips_isa_regsize (struct gdbarch *gdbarch); 49b725ae77Skettenis 50b725ae77Skettenis /* Return the current index for various MIPS registers. */ 51b725ae77Skettenis struct mips_regnum 52b725ae77Skettenis { 53b725ae77Skettenis int pc; 54b725ae77Skettenis int fp0; 55b725ae77Skettenis int fp_implementation_revision; 56b725ae77Skettenis int fp_control_status; 57b725ae77Skettenis int badvaddr; /* Bad vaddr for addressing exception. */ 58b725ae77Skettenis int cause; /* Describes last exception. */ 59b725ae77Skettenis int hi; /* Multiply/divide temp. */ 60b725ae77Skettenis int lo; /* ... */ 61b725ae77Skettenis }; 62b725ae77Skettenis extern const struct mips_regnum *mips_regnum (struct gdbarch *gdbarch); 63b725ae77Skettenis 64*c990cfb4Skettenis /* Register numbers of various important registers. Note that some of 65*c990cfb4Skettenis these values are "real" register numbers, and correspond to the 66*c990cfb4Skettenis general registers of the machine, and some are "phony" register 67*c990cfb4Skettenis numbers which are too large to be actual register numbers as far as 68*c990cfb4Skettenis the user is concerned but do serve to get the desired values when 69*c990cfb4Skettenis passed to read_register. */ 70*c990cfb4Skettenis 71*c990cfb4Skettenis enum 72*c990cfb4Skettenis { 73*c990cfb4Skettenis MIPS_ZERO_REGNUM = 0, /* Read-only register, always 0. */ 74*c990cfb4Skettenis MIPS_AT_REGNUM = 1, 75*c990cfb4Skettenis MIPS_V0_REGNUM = 2, /* Function integer return value. */ 76*c990cfb4Skettenis MIPS_A0_REGNUM = 4, /* Loc of first arg during a subr call */ 77*c990cfb4Skettenis MIPS_T9_REGNUM = 25, /* Contains address of callee in PIC. */ 7811efff7fSkettenis MIPS_SP_REGNUM = 29, 79*c990cfb4Skettenis MIPS_RA_REGNUM = 31, 80*c990cfb4Skettenis MIPS_PS_REGNUM = 32, /* Contains processor status. */ 81b725ae77Skettenis MIPS_EMBED_LO_REGNUM = 33, 82b725ae77Skettenis MIPS_EMBED_HI_REGNUM = 34, 83b725ae77Skettenis MIPS_EMBED_BADVADDR_REGNUM = 35, 84b725ae77Skettenis MIPS_EMBED_CAUSE_REGNUM = 36, 85b725ae77Skettenis MIPS_EMBED_PC_REGNUM = 37, 86*c990cfb4Skettenis MIPS_EMBED_FP0_REGNUM = 38, 87*c990cfb4Skettenis MIPS_UNUSED_REGNUM = 73, /* Never used, FIXME */ 88*c990cfb4Skettenis MIPS_FIRST_EMBED_REGNUM = 74, /* First CP0 register for embedded use. */ 89*c990cfb4Skettenis MIPS_PRID_REGNUM = 89, /* Processor ID. */ 90*c990cfb4Skettenis MIPS_LAST_EMBED_REGNUM = 89 /* Last one. */ 91b725ae77Skettenis }; 92b725ae77Skettenis 93b725ae77Skettenis /* Defined in mips-tdep.c and used in remote-mips.c */ 94b725ae77Skettenis extern void deprecated_mips_set_processor_regs_hack (void); 95b725ae77Skettenis 96*c990cfb4Skettenis /* Instruction sizes and other useful constants. */ 97*c990cfb4Skettenis enum 98*c990cfb4Skettenis { 99*c990cfb4Skettenis MIPS_INSN16_SIZE = 2, 100*c990cfb4Skettenis MIPS_INSN32_SIZE = 4, 101*c990cfb4Skettenis /* The number of floating-point or integer registers. */ 102*c990cfb4Skettenis MIPS_NUMREGS = 32 103*c990cfb4Skettenis }; 104*c990cfb4Skettenis 105*c990cfb4Skettenis /* Single step based on where the current instruction will take us. */ 106*c990cfb4Skettenis extern void mips_software_single_step (enum target_signal, int); 107*c990cfb4Skettenis 108*c990cfb4Skettenis /* Tell if the program counter value in MEMADDR is in a MIPS16 109*c990cfb4Skettenis function. */ 110*c990cfb4Skettenis extern int mips_pc_is_mips16 (bfd_vma memaddr); 111*c990cfb4Skettenis 112*c990cfb4Skettenis /* Return the currently configured (or set) saved register size. */ 113*c990cfb4Skettenis extern unsigned int mips_abi_regsize (struct gdbarch *gdbarch); 114b725ae77Skettenis 115b725ae77Skettenis #endif /* MIPS_TDEP_H */ 116