1# $OpenBSD: Makefile,v 1.7 2020/08/03 14:45:23 patrick Exp $ 2 3.include <bsd.own.mk> 4 5LLVM_SRCS= ${.CURDIR}/../../../../../llvm/llvm 6 7DEFS= Attributes.inc AttributesCompatFunc.inc \ 8 IntrinsicEnums.inc IntrinsicImpl.inc \ 9 IntrinsicsAArch64.h IntrinsicsAMDGPU.h \ 10 IntrinsicsARM.h IntrinsicsBPF.h \ 11 IntrinsicsHexagon.h IntrinsicsMips.h \ 12 IntrinsicsNVPTX.h IntrinsicsPowerPC.h \ 13 IntrinsicsR600.h IntrinsicsRISCV.h \ 14 IntrinsicsS390.h IntrinsicsWebAssembly.h \ 15 IntrinsicsX86.h IntrinsicsXCore.h 16 17INCDIR= /usr/include/llvm/IR 18 19all: ${DEFS} 20 21clean cleandir: 22 rm -f ${DEFS} 23 24Attributes.inc: ${LLVM_SRCS}/include/llvm/IR/Attributes.td 25 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-attrs \ 26 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 27 -I${LLVM_SRCS}/include \ 28 -o ${.TARGET} ${.ALLSRC} 29 30AttributesCompatFunc.inc: ${LLVM_SRCS}/lib/IR/AttributesCompatFunc.td 31 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-attrs \ 32 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 33 -I${LLVM_SRCS}/include \ 34 -o ${.TARGET} ${.ALLSRC} 35 36IntrinsicEnums.inc: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 37 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums \ 38 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 39 -I${LLVM_SRCS}/include \ 40 -o ${.TARGET} ${.ALLSRC} 41 42IntrinsicImpl.inc: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 43 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-impl \ 44 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 45 -I${LLVM_SRCS}/include \ 46 -o ${.TARGET} ${.ALLSRC} 47 48IntrinsicsAArch64.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 49 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=aarch64 \ 50 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 51 -I${LLVM_SRCS}/include \ 52 -o ${.TARGET} ${.ALLSRC} 53 54IntrinsicsAMDGPU.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 55 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=amdgcn \ 56 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 57 -I${LLVM_SRCS}/include \ 58 -o ${.TARGET} ${.ALLSRC} 59 60IntrinsicsARM.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 61 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=arm \ 62 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 63 -I${LLVM_SRCS}/include \ 64 -o ${.TARGET} ${.ALLSRC} 65 66IntrinsicsBPF.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 67 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=bpf \ 68 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 69 -I${LLVM_SRCS}/include \ 70 -o ${.TARGET} ${.ALLSRC} 71 72IntrinsicsHexagon.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 73 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=hexagon \ 74 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 75 -I${LLVM_SRCS}/include \ 76 -o ${.TARGET} ${.ALLSRC} 77 78IntrinsicsMips.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 79 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=mips \ 80 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 81 -I${LLVM_SRCS}/include \ 82 -o ${.TARGET} ${.ALLSRC} 83 84IntrinsicsNVPTX.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 85 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=nvvm \ 86 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 87 -I${LLVM_SRCS}/include \ 88 -o ${.TARGET} ${.ALLSRC} 89 90IntrinsicsPowerPC.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 91 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=ppc \ 92 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 93 -I${LLVM_SRCS}/include \ 94 -o ${.TARGET} ${.ALLSRC} 95 96IntrinsicsR600.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 97 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=r600 \ 98 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 99 -I${LLVM_SRCS}/include \ 100 -o ${.TARGET} ${.ALLSRC} 101 102IntrinsicsRISCV.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 103 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=riscv \ 104 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 105 -I${LLVM_SRCS}/include \ 106 -o ${.TARGET} ${.ALLSRC} 107 108IntrinsicsS390.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 109 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=s390 \ 110 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 111 -I${LLVM_SRCS}/include \ 112 -o ${.TARGET} ${.ALLSRC} 113 114IntrinsicsWebAssembly.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 115 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=wasm \ 116 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 117 -I${LLVM_SRCS}/include \ 118 -o ${.TARGET} ${.ALLSRC} 119 120IntrinsicsX86.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 121 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=x86 \ 122 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 123 -I${LLVM_SRCS}/include \ 124 -o ${.TARGET} ${.ALLSRC} 125 126IntrinsicsXCore.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 127 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=xcore \ 128 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 129 -I${LLVM_SRCS}/include \ 130 -o ${.TARGET} ${.ALLSRC} 131 132install includes: ${DEFS} 133 ${INSTALL} -d -m 755 ${DESTDIR}${INCDIR} 134 @cd ${.OBJDIR}; for i in $(DEFS); do \ 135 j="cmp -s $$i ${DESTDIR}${INCDIR}/$$i || \ 136 ${INSTALL} ${INSTALL_COPY} -o ${BINOWN} -g ${BINGRP} \ 137 -m 444 $$i ${DESTDIR}${INCDIR}"; \ 138 echo $$j; \ 139 eval "$$j"; \ 140 done 141 142.include <bsd.obj.mk> 143