1# $OpenBSD: Makefile,v 1.9 2021/12/17 14:55:44 patrick Exp $ 2 3.include <bsd.own.mk> 4 5LLVM_SRCS= ${.CURDIR}/../../../../../llvm/llvm 6 7DEFS= Attributes.inc \ 8 IntrinsicImpl.inc \ 9 IntrinsicEnums.inc \ 10 IntrinsicsAArch64.h \ 11 IntrinsicsAMDGPU.h \ 12 IntrinsicsARM.h \ 13 IntrinsicsBPF.h \ 14 IntrinsicsHexagon.h \ 15 IntrinsicsMips.h \ 16 IntrinsicsNVPTX.h \ 17 IntrinsicsPowerPC.h \ 18 IntrinsicsR600.h \ 19 IntrinsicsRISCV.h \ 20 IntrinsicsS390.h \ 21 IntrinsicsWebAssembly.h \ 22 IntrinsicsX86.h \ 23 IntrinsicsXCore.h \ 24 IntrinsicsVE.h 25 26INCDIR= /usr/include/llvm/IR 27 28all: ${DEFS} 29 30clean cleandir: 31 rm -f ${DEFS} 32 33Attributes.inc: ${LLVM_SRCS}/include/llvm/IR/Attributes.td 34 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-attrs \ 35 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 36 -I${LLVM_SRCS}/include \ 37 -o ${.TARGET} ${.ALLSRC} 38 39IntrinsicImpl.inc: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 40 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-impl \ 41 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 42 -I${LLVM_SRCS}/include \ 43 -o ${.TARGET} ${.ALLSRC} 44 45IntrinsicEnums.inc: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 46 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums \ 47 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 48 -I${LLVM_SRCS}/include \ 49 -o ${.TARGET} ${.ALLSRC} 50 51IntrinsicsAArch64.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 52 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=aarch64 \ 53 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 54 -I${LLVM_SRCS}/include \ 55 -o ${.TARGET} ${.ALLSRC} 56 57IntrinsicsAMDGPU.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 58 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=amdgcn \ 59 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 60 -I${LLVM_SRCS}/include \ 61 -o ${.TARGET} ${.ALLSRC} 62 63IntrinsicsARM.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 64 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=arm \ 65 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 66 -I${LLVM_SRCS}/include \ 67 -o ${.TARGET} ${.ALLSRC} 68 69IntrinsicsBPF.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 70 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=bpf \ 71 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 72 -I${LLVM_SRCS}/include \ 73 -o ${.TARGET} ${.ALLSRC} 74 75IntrinsicsHexagon.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 76 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=hexagon \ 77 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 78 -I${LLVM_SRCS}/include \ 79 -o ${.TARGET} ${.ALLSRC} 80 81IntrinsicsMips.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 82 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=mips \ 83 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 84 -I${LLVM_SRCS}/include \ 85 -o ${.TARGET} ${.ALLSRC} 86 87IntrinsicsNVPTX.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 88 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=nvvm \ 89 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 90 -I${LLVM_SRCS}/include \ 91 -o ${.TARGET} ${.ALLSRC} 92 93IntrinsicsPowerPC.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 94 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=ppc \ 95 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 96 -I${LLVM_SRCS}/include \ 97 -o ${.TARGET} ${.ALLSRC} 98 99IntrinsicsR600.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 100 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=r600 \ 101 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 102 -I${LLVM_SRCS}/include \ 103 -o ${.TARGET} ${.ALLSRC} 104 105IntrinsicsRISCV.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 106 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=riscv \ 107 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 108 -I${LLVM_SRCS}/include \ 109 -o ${.TARGET} ${.ALLSRC} 110 111IntrinsicsS390.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 112 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=s390 \ 113 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 114 -I${LLVM_SRCS}/include \ 115 -o ${.TARGET} ${.ALLSRC} 116 117IntrinsicsWebAssembly.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 118 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=wasm \ 119 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 120 -I${LLVM_SRCS}/include \ 121 -o ${.TARGET} ${.ALLSRC} 122 123IntrinsicsX86.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 124 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=x86 \ 125 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 126 -I${LLVM_SRCS}/include \ 127 -o ${.TARGET} ${.ALLSRC} 128 129IntrinsicsXCore.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 130 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=xcore \ 131 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 132 -I${LLVM_SRCS}/include \ 133 -o ${.TARGET} ${.ALLSRC} 134 135IntrinsicsVE.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td 136 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-intrinsic-enums -intrinsic-prefix=ve \ 137 -I${LLVM_SRCS}/include/llvm/IR -I${LLVM_SRCS}/lib/Target \ 138 -I${LLVM_SRCS}/include \ 139 -o ${.TARGET} ${.ALLSRC} 140 141install includes: ${DEFS} 142 ${INSTALL} -d -m 755 ${DESTDIR}${INCDIR} 143 @cd ${.OBJDIR}; for i in $(DEFS); do \ 144 j="cmp -s $$i ${DESTDIR}${INCDIR}/$$i || \ 145 ${INSTALL} ${INSTALL_COPY} -o ${BINOWN} -g ${BINGRP} \ 146 -m 444 $$i ${DESTDIR}${INCDIR}"; \ 147 echo $$j; \ 148 eval "$$j"; \ 149 done 150 151.include <bsd.obj.mk> 152