1# $OpenBSD: Makefile,v 1.6 2023/11/11 18:35:36 robert Exp $
2
3.include <bsd.own.mk>
4
5LLVM_SRCS=	${.CURDIR}/../../../../../llvm/llvm
6
7HDRS=	MipsGenAsmMatcher.inc \
8	MipsGenAsmWriter.inc \
9	MipsGenCallingConv.inc \
10	MipsGenDAGISel.inc \
11	MipsGenDisassemblerTables.inc \
12	MipsGenFastISel.inc \
13	MipsGenGlobalISel.inc \
14	MipsGenPostLegalizeGICombiner.inc \
15	MipsGenInstrInfo.inc \
16	MipsGenMCCodeEmitter.inc \
17	MipsGenMCPseudoLowering.inc \
18	MipsGenRegisterBank.inc \
19	MipsGenRegisterInfo.inc \
20	MipsGenSubtargetInfo.inc \
21	MipsGenExegesis.inc
22
23all: ${HDRS}
24
25install:
26	@# Nothing here so far ...
27
28clean cleandir:
29	rm -f ${HDRS}
30
31MipsGenAsmMatcher.inc: ${LLVM_SRCS}/lib/Target/Mips/Mips.td
32	${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-asm-matcher \
33		-I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/Mips \
34		-o ${.TARGET} ${.ALLSRC}
35
36MipsGenAsmWriter.inc: ${LLVM_SRCS}/lib/Target/Mips/Mips.td
37	${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-asm-writer \
38		-I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/Mips \
39		-o ${.TARGET} ${.ALLSRC}
40
41MipsGenCallingConv.inc: ${LLVM_SRCS}/lib/Target/Mips/Mips.td
42	${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-callingconv \
43		-I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/Mips \
44		-o ${.TARGET} ${.ALLSRC}
45
46MipsGenDAGISel.inc: ${LLVM_SRCS}/lib/Target/Mips/Mips.td
47	${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-dag-isel \
48		-I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/Mips \
49		-o ${.TARGET} ${.ALLSRC}
50
51MipsGenDisassemblerTables.inc: ${LLVM_SRCS}/lib/Target/Mips/Mips.td
52	${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-disassembler \
53		-I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/Mips \
54		-o ${.TARGET} ${.ALLSRC}
55
56MipsGenFastISel.inc: ${LLVM_SRCS}/lib/Target/Mips/Mips.td
57	${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-fast-isel \
58		-I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/Mips \
59		-o ${.TARGET} ${.ALLSRC}
60
61MipsGenGlobalISel.inc: ${LLVM_SRCS}/lib/Target/Mips/Mips.td
62	${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-global-isel \
63		-I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/Mips \
64		-o ${.TARGET} ${.ALLSRC}
65
66MipsGenPostLegalizeGICombiner.inc: ${LLVM_SRCS}/lib/Target/Mips/Mips.td
67	${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-global-isel-combiner \
68		-combiners="MipsPostLegalizerCombinerHelper" \
69		-I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/Mips \
70		-o ${.TARGET} ${.ALLSRC}
71
72MipsGenInstrInfo.inc: ${LLVM_SRCS}/lib/Target/Mips/Mips.td
73
74MipsGenInstrInfo.inc: ${LLVM_SRCS}/lib/Target/Mips/Mips.td
75	${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-instr-info \
76		-I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/Mips \
77		-o ${.TARGET} ${.ALLSRC}
78
79MipsGenMCCodeEmitter.inc: ${LLVM_SRCS}/lib/Target/Mips/Mips.td
80	${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-emitter \
81		-I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/Mips \
82		-o ${.TARGET} ${.ALLSRC}
83
84MipsGenMCPseudoLowering.inc: ${LLVM_SRCS}/lib/Target/Mips/Mips.td
85	${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-pseudo-lowering \
86		-I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/Mips \
87		-o ${.TARGET} ${.ALLSRC}
88
89MipsGenRegisterBank.inc: ${LLVM_SRCS}/lib/Target/Mips/Mips.td
90	${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-register-bank \
91		-I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/Mips \
92		-o ${.TARGET} ${.ALLSRC}
93
94MipsGenRegisterInfo.inc: ${LLVM_SRCS}/lib/Target/Mips/Mips.td
95	${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-register-info \
96		-I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/Mips \
97		-o ${.TARGET} ${.ALLSRC}
98
99MipsGenSubtargetInfo.inc: ${LLVM_SRCS}/lib/Target/Mips/Mips.td
100	${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-subtarget \
101		-I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/Mips \
102		-o ${.TARGET} ${.ALLSRC}
103
104MipsGenExegesis.inc: ${LLVM_SRCS}/lib/Target/Mips/Mips.td
105	${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-exegesis \
106		-I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/Mips \
107		-o ${.TARGET} ${.ALLSRC}
108
109.include <bsd.obj.mk>
110