1# $OpenBSD: Makefile,v 1.9 2023/11/11 18:35:36 robert Exp $ 2 3.include <bsd.own.mk> 4 5LLVM_SRCS= ${.CURDIR}/../../../../../llvm/llvm 6 7HDRS= X86GenAsmMatcher.inc \ 8 X86GenAsmWriter.inc \ 9 X86GenAsmWriter1.inc \ 10 X86GenCallingConv.inc \ 11 X86GenDAGISel.inc \ 12 X86GenDisassemblerTables.inc \ 13 X86GenEVEX2VEXTables.inc \ 14 X86GenExegesis.inc \ 15 X86GenFastISel.inc \ 16 X86GenGlobalISel.inc \ 17 X86GenInstrInfo.inc \ 18 X86GenMnemonicTables.inc \ 19 X86GenRegisterBank.inc \ 20 X86GenRegisterInfo.inc \ 21 X86GenSubtargetInfo.inc 22 23all: ${HDRS} 24 25install: 26 @# Nothing here so far ... 27 28clean cleandir: 29 rm -f ${HDRS} 30 31X86GenAsmMatcher.inc: ${LLVM_SRCS}/lib/Target/X86/X86.td 32 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-asm-matcher \ 33 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/X86 \ 34 -o ${.TARGET} ${.ALLSRC} 35 36X86GenAsmWriter.inc: ${LLVM_SRCS}/lib/Target/X86/X86.td 37 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-asm-writer \ 38 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/X86 \ 39 -o ${.TARGET} ${.ALLSRC} 40 41X86GenAsmWriter1.inc: ${LLVM_SRCS}/lib/Target/X86/X86.td 42 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-asm-writer -asmwriternum=1 \ 43 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/X86 \ 44 -o ${.TARGET} ${.ALLSRC} 45 46X86GenCallingConv.inc: ${LLVM_SRCS}/lib/Target/X86/X86.td 47 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-callingconv \ 48 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/X86 \ 49 -o ${.TARGET} ${.ALLSRC} 50 51X86GenDAGISel.inc: ${LLVM_SRCS}/lib/Target/X86/X86.td 52 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-dag-isel \ 53 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/X86 \ 54 -o ${.TARGET} ${.ALLSRC} 55 56X86GenDisassemblerTables.inc: ${LLVM_SRCS}/lib/Target/X86/X86.td 57 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-disassembler \ 58 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/X86 \ 59 -o ${.TARGET} ${.ALLSRC} 60 61X86GenEVEX2VEXTables.inc: ${LLVM_SRCS}/lib/Target/X86/X86.td 62 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-x86-EVEX2VEX-tables \ 63 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/X86 \ 64 -o ${.TARGET} ${.ALLSRC} 65 66X86GenExegesis.inc: ${LLVM_SRCS}/lib/Target/X86/X86.td 67 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-exegesis \ 68 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/X86 \ 69 -o ${.TARGET} ${.ALLSRC} 70 71X86GenFastISel.inc: ${LLVM_SRCS}/lib/Target/X86/X86.td 72 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-fast-isel \ 73 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/X86 \ 74 -o ${.TARGET} ${.ALLSRC} 75 76X86GenGlobalISel.inc: ${LLVM_SRCS}/lib/Target/X86/X86.td 77 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-global-isel \ 78 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/X86 \ 79 -o ${.TARGET} ${.ALLSRC} 80 81X86GenInstrInfo.inc: ${LLVM_SRCS}/lib/Target/X86/X86.td 82 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-instr-info \ 83 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/X86 \ 84 -o ${.TARGET} ${.ALLSRC} 85 86X86GenMnemonicTables.inc: ${LLVM_SRCS}/lib/Target/X86/X86.td 87 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-x86-mnemonic-tables -asmwriternum=1 \ 88 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/X86 \ 89 -o ${.TARGET} ${.ALLSRC} 90 91X86GenRegisterBank.inc: ${LLVM_SRCS}/lib/Target/X86/X86.td 92 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-register-bank \ 93 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/X86 \ 94 -o ${.TARGET} ${.ALLSRC} 95 96X86GenRegisterInfo.inc: ${LLVM_SRCS}/lib/Target/X86/X86.td 97 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-register-info \ 98 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/X86 \ 99 -o ${.TARGET} ${.ALLSRC} 100 101X86GenSubtargetInfo.inc: ${LLVM_SRCS}/lib/Target/X86/X86.td 102 ${.OBJDIR}/../../../llvm-tblgen/llvm-tblgen -gen-subtarget \ 103 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/X86 \ 104 -o ${.TARGET} ${.ALLSRC} 105 106.include <bsd.obj.mk> 107