xref: /openbsd/lib/libc/arch/sparc64/fpu/fpu_subr.c (revision 17df1aa7)
1 /*	$OpenBSD: fpu_subr.c,v 1.1 2003/07/21 18:41:30 jason Exp $	*/
2 
3 /*
4  * Copyright (c) 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This software was developed by the Computer Systems Engineering group
8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9  * contributed to Berkeley.
10  *
11  * All advertising materials mentioning features or use of this software
12  * must display the following acknowledgement:
13  *	This product includes software developed by the University of
14  *	California, Lawrence Berkeley Laboratory.
15  *
16  * Redistribution and use in source and binary forms, with or without
17  * modification, are permitted provided that the following conditions
18  * are met:
19  * 1. Redistributions of source code must retain the above copyright
20  *    notice, this list of conditions and the following disclaimer.
21  * 2. Redistributions in binary form must reproduce the above copyright
22  *    notice, this list of conditions and the following disclaimer in the
23  *    documentation and/or other materials provided with the distribution.
24  * 3. All advertising materials mentioning features or use of this software
25  *    must display the following acknowledgement:
26  *	This product includes software developed by the University of
27  *	California, Berkeley and its contributors.
28  * 4. Neither the name of the University nor the names of its contributors
29  *    may be used to endorse or promote products derived from this software
30  *    without specific prior written permission.
31  *
32  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42  * SUCH DAMAGE.
43  *
44  *	@(#)fpu_subr.c	8.1 (Berkeley) 6/11/93
45  *	$NetBSD: fpu_subr.c,v 1.3 1996/03/14 19:42:01 christos Exp $
46  */
47 
48 #include <sys/cdefs.h>
49 #if 0
50 __FBSDID("$FreeBSD: src/lib/libc/sparc64/fpu/fpu_subr.c,v 1.4 2002/04/27 21:56:28 jake Exp $");
51 #endif
52 
53 /*
54  * FPU subroutines.
55  */
56 
57 #include <sys/param.h>
58 
59 #include <machine/frame.h>
60 #include <machine/fsr.h>
61 #include <machine/instr.h>
62 
63 #include "fpu_arith.h"
64 #include "fpu_emu.h"
65 #include "fpu_extern.h"
66 
67 /*
68  * Shift the given number right rsh bits.  Any bits that `fall off' will get
69  * shoved into the sticky field; we return the resulting sticky.  Note that
70  * shifting NaNs is legal (this will never shift all bits out); a NaN's
71  * sticky field is ignored anyway.
72  */
73 int
74 __fpu_shr(struct fpn *fp, int rsh)
75 {
76 	u_int m0, m1, m2, m3, s;
77 	int lsh;
78 
79 #ifdef DIAGNOSTIC
80 	if (rsh <= 0 || (fp->fp_class != FPC_NUM && !ISNAN(fp)))
81 		__utrap_panic("fpu_rightshift 1");
82 #endif
83 
84 	m0 = fp->fp_mant[0];
85 	m1 = fp->fp_mant[1];
86 	m2 = fp->fp_mant[2];
87 	m3 = fp->fp_mant[3];
88 
89 	/* If shifting all the bits out, take a shortcut. */
90 	if (rsh >= FP_NMANT) {
91 #ifdef DIAGNOSTIC
92 		if ((m0 | m1 | m2 | m3) == 0)
93 			__utrap_panic("fpu_rightshift 2");
94 #endif
95 		fp->fp_mant[0] = 0;
96 		fp->fp_mant[1] = 0;
97 		fp->fp_mant[2] = 0;
98 		fp->fp_mant[3] = 0;
99 #ifdef notdef
100 		if ((m0 | m1 | m2 | m3) == 0)
101 			fp->fp_class = FPC_ZERO;
102 		else
103 #endif
104 			fp->fp_sticky = 1;
105 		return (1);
106 	}
107 
108 	/* Squish out full words. */
109 	s = fp->fp_sticky;
110 	if (rsh >= 32 * 3) {
111 		s |= m3 | m2 | m1;
112 		m3 = m0, m2 = 0, m1 = 0, m0 = 0;
113 	} else if (rsh >= 32 * 2) {
114 		s |= m3 | m2;
115 		m3 = m1, m2 = m0, m1 = 0, m0 = 0;
116 	} else if (rsh >= 32) {
117 		s |= m3;
118 		m3 = m2, m2 = m1, m1 = m0, m0 = 0;
119 	}
120 
121 	/* Handle any remaining partial word. */
122 	if ((rsh &= 31) != 0) {
123 		lsh = 32 - rsh;
124 		s |= m3 << lsh;
125 		m3 = (m3 >> rsh) | (m2 << lsh);
126 		m2 = (m2 >> rsh) | (m1 << lsh);
127 		m1 = (m1 >> rsh) | (m0 << lsh);
128 		m0 >>= rsh;
129 	}
130 	fp->fp_mant[0] = m0;
131 	fp->fp_mant[1] = m1;
132 	fp->fp_mant[2] = m2;
133 	fp->fp_mant[3] = m3;
134 	fp->fp_sticky = s;
135 	return (s);
136 }
137 
138 /*
139  * Force a number to be normal, i.e., make its fraction have all zero
140  * bits before FP_1, then FP_1, then all 1 bits.  This is used for denorms
141  * and (sometimes) for intermediate results.
142  *
143  * Internally, this may use a `supernormal' -- a number whose fp_mant
144  * is greater than or equal to 2.0 -- so as a side effect you can hand it
145  * a supernormal and it will fix it (provided fp->fp_mant[3] == 0).
146  */
147 void
148 __fpu_norm(struct fpn *fp)
149 {
150 	u_int m0, m1, m2, m3, top, sup, nrm;
151 	int lsh, rsh, exp;
152 
153 	exp = fp->fp_exp;
154 	m0 = fp->fp_mant[0];
155 	m1 = fp->fp_mant[1];
156 	m2 = fp->fp_mant[2];
157 	m3 = fp->fp_mant[3];
158 
159 	/* Handle severe subnormals with 32-bit moves. */
160 	if (m0 == 0) {
161 		if (m1)
162 			m0 = m1, m1 = m2, m2 = m3, m3 = 0, exp -= 32;
163 		else if (m2)
164 			m0 = m2, m1 = m3, m2 = 0, m3 = 0, exp -= 2 * 32;
165 		else if (m3)
166 			m0 = m3, m1 = 0, m2 = 0, m3 = 0, exp -= 3 * 32;
167 		else {
168 			fp->fp_class = FPC_ZERO;
169 			return;
170 		}
171 	}
172 
173 	/* Now fix any supernormal or remaining subnormal. */
174 	nrm = FP_1;
175 	sup = nrm << 1;
176 	if (m0 >= sup) {
177 		/*
178 		 * We have a supernormal number.  We need to shift it right.
179 		 * We may assume m3==0.
180 		 */
181 		for (rsh = 1, top = m0 >> 1; top >= sup; rsh++)	/* XXX slow */
182 			top >>= 1;
183 		exp += rsh;
184 		lsh = 32 - rsh;
185 		m3 = m2 << lsh;
186 		m2 = (m2 >> rsh) | (m1 << lsh);
187 		m1 = (m1 >> rsh) | (m0 << lsh);
188 		m0 = top;
189 	} else if (m0 < nrm) {
190 		/*
191 		 * We have a regular denorm (a subnormal number), and need
192 		 * to shift it left.
193 		 */
194 		for (lsh = 1, top = m0 << 1; top < nrm; lsh++)	/* XXX slow */
195 			top <<= 1;
196 		exp -= lsh;
197 		rsh = 32 - lsh;
198 		m0 = top | (m1 >> rsh);
199 		m1 = (m1 << lsh) | (m2 >> rsh);
200 		m2 = (m2 << lsh) | (m3 >> rsh);
201 		m3 <<= lsh;
202 	}
203 
204 	fp->fp_exp = exp;
205 	fp->fp_mant[0] = m0;
206 	fp->fp_mant[1] = m1;
207 	fp->fp_mant[2] = m2;
208 	fp->fp_mant[3] = m3;
209 }
210 
211 /*
212  * Concoct a `fresh' Quiet NaN per Appendix N.
213  * As a side effect, we set NV (invalid) for the current exceptions.
214  */
215 struct fpn *
216 __fpu_newnan(struct fpemu *fe)
217 {
218 	struct fpn *fp;
219 
220 	fe->fe_cx = FSR_NV;
221 	fp = &fe->fe_f3;
222 	fp->fp_class = FPC_QNAN;
223 	fp->fp_sign = 0;
224 	fp->fp_mant[0] = FP_1 - 1;
225 	fp->fp_mant[1] = fp->fp_mant[2] = fp->fp_mant[3] = ~0;
226 	return (fp);
227 }
228