1#!/usr/bin/env perl 2 3# ==================================================================== 4# [Re]written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL 5# project. The module is, however, dual licensed under OpenSSL and 6# CRYPTOGAMS licenses depending on where you obtain it. For further 7# details see http://www.openssl.org/~appro/cryptogams/. 8# ==================================================================== 9 10# "[Re]written" was achieved in two major overhauls. In 2004 BODY_* 11# functions were re-implemented to address P4 performance issue [see 12# commentary below], and in 2006 the rest was rewritten in order to 13# gain freedom to liberate licensing terms. 14 15# January, September 2004. 16# 17# It was noted that Intel IA-32 C compiler generates code which 18# performs ~30% *faster* on P4 CPU than original *hand-coded* 19# SHA1 assembler implementation. To address this problem (and 20# prove that humans are still better than machines:-), the 21# original code was overhauled, which resulted in following 22# performance changes: 23# 24# compared with original compared with Intel cc 25# assembler impl. generated code 26# Pentium -16% +48% 27# PIII/AMD +8% +16% 28# P4 +85%(!) +45% 29# 30# As you can see Pentium came out as looser:-( Yet I reckoned that 31# improvement on P4 outweighs the loss and incorporate this 32# re-tuned code to 0.9.7 and later. 33# ---------------------------------------------------------------- 34# <appro@fy.chalmers.se> 35 36# August 2009. 37# 38# George Spelvin has tipped that F_40_59(b,c,d) can be rewritten as 39# '(c&d) + (b&(c^d))', which allows to accumulate partial results 40# and lighten "pressure" on scratch registers. This resulted in 41# >12% performance improvement on contemporary AMD cores (with no 42# degradation on other CPUs:-). Also, the code was revised to maximize 43# "distance" between instructions producing input to 'lea' instruction 44# and the 'lea' instruction itself, which is essential for Intel Atom 45# core and resulted in ~15% improvement. 46 47# October 2010. 48# 49# Add SSSE3, Supplemental[!] SSE3, implementation. The idea behind it 50# is to offload message schedule denoted by Wt in NIST specification, 51# or Xupdate in OpenSSL source, to SIMD unit. The idea is not novel, 52# and in SSE2 context was first explored by Dean Gaudet in 2004, see 53# http://arctic.org/~dean/crypto/sha1.html. Since then several things 54# have changed that made it interesting again: 55# 56# a) XMM units became faster and wider; 57# b) instruction set became more versatile; 58# c) an important observation was made by Max Locktykhin, which made 59# it possible to reduce amount of instructions required to perform 60# the operation in question, for further details see 61# http://software.intel.com/en-us/articles/improving-the-performance-of-the-secure-hash-algorithm-1/. 62 63# April 2011. 64# 65# Add AVX code path, probably most controversial... The thing is that 66# switch to AVX alone improves performance by as little as 4% in 67# comparison to SSSE3 code path. But below result doesn't look like 68# 4% improvement... Trouble is that Sandy Bridge decodes 'ro[rl]' as 69# pair of �-ops, and it's the additional �-ops, two per round, that 70# make it run slower than Core2 and Westmere. But 'sh[rl]d' is decoded 71# as single �-op by Sandy Bridge and it's replacing 'ro[rl]' with 72# equivalent 'sh[rl]d' that is responsible for the impressive 5.1 73# cycles per processed byte. But 'sh[rl]d' is not something that used 74# to be fast, nor does it appear to be fast in upcoming Bulldozer 75# [according to its optimization manual]. Which is why AVX code path 76# is guarded by *both* AVX and synthetic bit denoting Intel CPUs. 77# One can argue that it's unfair to AMD, but without 'sh[rl]d' it 78# makes no sense to keep the AVX code path. If somebody feels that 79# strongly, it's probably more appropriate to discuss possibility of 80# using vector rotate XOP on AMD... 81 82###################################################################### 83# Current performance is summarized in following table. Numbers are 84# CPU clock cycles spent to process single byte (less is better). 85# 86# x86 SSSE3 AVX 87# Pentium 15.7 - 88# PIII 11.5 - 89# P4 10.6 - 90# AMD K8 7.1 - 91# Core2 7.3 6.1/+20% - 92# Atom 12.5 9.5(*)/+32% - 93# Westmere 7.3 5.6/+30% - 94# Sandy Bridge 8.8 6.2/+40% 5.1(**)/+70% 95# 96# (*) Loop is 1056 instructions long and expected result is ~8.25. 97# It remains mystery [to me] why ILP is limited to 1.7. 98# 99# (**) As per above comment, the result is for AVX *plus* sh[rl]d. 100 101$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1; 102push(@INC,"${dir}","${dir}../../perlasm"); 103require "x86asm.pl"; 104 105&asm_init($ARGV[0],"sha1-586.pl",$ARGV[$#ARGV] eq "386"); 106 107$xmm=$ymm=0; 108for (@ARGV) { $xmm=1 if (/-DOPENSSL_IA32_SSE2/); } 109 110$ymm=1 if ($xmm && 111 `$ENV{CC} -Wa,-v -c -o /dev/null -x assembler /dev/null 2>&1` 112 =~ /GNU assembler version ([2-9]\.[0-9]+)/ && 113 $1>=2.19); # first version supporting AVX 114 115&external_label("OPENSSL_ia32cap_P") if ($xmm); 116 117 118$A="eax"; 119$B="ebx"; 120$C="ecx"; 121$D="edx"; 122$E="edi"; 123$T="esi"; 124$tmp1="ebp"; 125 126@V=($A,$B,$C,$D,$E,$T); 127 128$alt=0; # 1 denotes alternative IALU implementation, which performs 129 # 8% *worse* on P4, same on Westmere and Atom, 2% better on 130 # Sandy Bridge... 131 132sub BODY_00_15 133 { 134 local($n,$a,$b,$c,$d,$e,$f)=@_; 135 136 &comment("00_15 $n"); 137 138 &mov($f,$c); # f to hold F_00_19(b,c,d) 139 if ($n==0) { &mov($tmp1,$a); } 140 else { &mov($a,$tmp1); } 141 &rotl($tmp1,5); # tmp1=ROTATE(a,5) 142 &xor($f,$d); 143 &add($tmp1,$e); # tmp1+=e; 144 &mov($e,&swtmp($n%16)); # e becomes volatile and is loaded 145 # with xi, also note that e becomes 146 # f in next round... 147 &and($f,$b); 148 &rotr($b,2); # b=ROTATE(b,30) 149 &xor($f,$d); # f holds F_00_19(b,c,d) 150 &lea($tmp1,&DWP(0x5a827999,$tmp1,$e)); # tmp1+=K_00_19+xi 151 152 if ($n==15) { &mov($e,&swtmp(($n+1)%16));# pre-fetch f for next round 153 &add($f,$tmp1); } # f+=tmp1 154 else { &add($tmp1,$f); } # f becomes a in next round 155 &mov($tmp1,$a) if ($alt && $n==15); 156 } 157 158sub BODY_16_19 159 { 160 local($n,$a,$b,$c,$d,$e,$f)=@_; 161 162 &comment("16_19 $n"); 163 164if ($alt) { 165 &xor($c,$d); 166 &xor($f,&swtmp(($n+2)%16)); # f to hold Xupdate(xi,xa,xb,xc,xd) 167 &and($tmp1,$c); # tmp1 to hold F_00_19(b,c,d), b&=c^d 168 &xor($f,&swtmp(($n+8)%16)); 169 &xor($tmp1,$d); # tmp1=F_00_19(b,c,d) 170 &xor($f,&swtmp(($n+13)%16)); # f holds xa^xb^xc^xd 171 &rotl($f,1); # f=ROTATE(f,1) 172 &add($e,$tmp1); # e+=F_00_19(b,c,d) 173 &xor($c,$d); # restore $c 174 &mov($tmp1,$a); # b in next round 175 &rotr($b,$n==16?2:7); # b=ROTATE(b,30) 176 &mov(&swtmp($n%16),$f); # xi=f 177 &rotl($a,5); # ROTATE(a,5) 178 &lea($f,&DWP(0x5a827999,$f,$e));# f+=F_00_19(b,c,d)+e 179 &mov($e,&swtmp(($n+1)%16)); # pre-fetch f for next round 180 &add($f,$a); # f+=ROTATE(a,5) 181} else { 182 &mov($tmp1,$c); # tmp1 to hold F_00_19(b,c,d) 183 &xor($f,&swtmp(($n+2)%16)); # f to hold Xupdate(xi,xa,xb,xc,xd) 184 &xor($tmp1,$d); 185 &xor($f,&swtmp(($n+8)%16)); 186 &and($tmp1,$b); 187 &xor($f,&swtmp(($n+13)%16)); # f holds xa^xb^xc^xd 188 &rotl($f,1); # f=ROTATE(f,1) 189 &xor($tmp1,$d); # tmp1=F_00_19(b,c,d) 190 &add($e,$tmp1); # e+=F_00_19(b,c,d) 191 &mov($tmp1,$a); 192 &rotr($b,2); # b=ROTATE(b,30) 193 &mov(&swtmp($n%16),$f); # xi=f 194 &rotl($tmp1,5); # ROTATE(a,5) 195 &lea($f,&DWP(0x5a827999,$f,$e));# f+=F_00_19(b,c,d)+e 196 &mov($e,&swtmp(($n+1)%16)); # pre-fetch f for next round 197 &add($f,$tmp1); # f+=ROTATE(a,5) 198} 199 } 200 201sub BODY_20_39 202 { 203 local($n,$a,$b,$c,$d,$e,$f)=@_; 204 local $K=($n<40)?0x6ed9eba1:0xca62c1d6; 205 206 &comment("20_39 $n"); 207 208if ($alt) { 209 &xor($tmp1,$c); # tmp1 to hold F_20_39(b,c,d), b^=c 210 &xor($f,&swtmp(($n+2)%16)); # f to hold Xupdate(xi,xa,xb,xc,xd) 211 &xor($tmp1,$d); # tmp1 holds F_20_39(b,c,d) 212 &xor($f,&swtmp(($n+8)%16)); 213 &add($e,$tmp1); # e+=F_20_39(b,c,d) 214 &xor($f,&swtmp(($n+13)%16)); # f holds xa^xb^xc^xd 215 &rotl($f,1); # f=ROTATE(f,1) 216 &mov($tmp1,$a); # b in next round 217 &rotr($b,7); # b=ROTATE(b,30) 218 &mov(&swtmp($n%16),$f) if($n<77);# xi=f 219 &rotl($a,5); # ROTATE(a,5) 220 &xor($b,$c) if($n==39);# warm up for BODY_40_59 221 &and($tmp1,$b) if($n==39); 222 &lea($f,&DWP($K,$f,$e)); # f+=e+K_XX_YY 223 &mov($e,&swtmp(($n+1)%16)) if($n<79);# pre-fetch f for next round 224 &add($f,$a); # f+=ROTATE(a,5) 225 &rotr($a,5) if ($n==79); 226} else { 227 &mov($tmp1,$b); # tmp1 to hold F_20_39(b,c,d) 228 &xor($f,&swtmp(($n+2)%16)); # f to hold Xupdate(xi,xa,xb,xc,xd) 229 &xor($tmp1,$c); 230 &xor($f,&swtmp(($n+8)%16)); 231 &xor($tmp1,$d); # tmp1 holds F_20_39(b,c,d) 232 &xor($f,&swtmp(($n+13)%16)); # f holds xa^xb^xc^xd 233 &rotl($f,1); # f=ROTATE(f,1) 234 &add($e,$tmp1); # e+=F_20_39(b,c,d) 235 &rotr($b,2); # b=ROTATE(b,30) 236 &mov($tmp1,$a); 237 &rotl($tmp1,5); # ROTATE(a,5) 238 &mov(&swtmp($n%16),$f) if($n<77);# xi=f 239 &lea($f,&DWP($K,$f,$e)); # f+=e+K_XX_YY 240 &mov($e,&swtmp(($n+1)%16)) if($n<79);# pre-fetch f for next round 241 &add($f,$tmp1); # f+=ROTATE(a,5) 242} 243 } 244 245sub BODY_40_59 246 { 247 local($n,$a,$b,$c,$d,$e,$f)=@_; 248 249 &comment("40_59 $n"); 250 251if ($alt) { 252 &add($e,$tmp1); # e+=b&(c^d) 253 &xor($f,&swtmp(($n+2)%16)); # f to hold Xupdate(xi,xa,xb,xc,xd) 254 &mov($tmp1,$d); 255 &xor($f,&swtmp(($n+8)%16)); 256 &xor($c,$d); # restore $c 257 &xor($f,&swtmp(($n+13)%16)); # f holds xa^xb^xc^xd 258 &rotl($f,1); # f=ROTATE(f,1) 259 &and($tmp1,$c); 260 &rotr($b,7); # b=ROTATE(b,30) 261 &add($e,$tmp1); # e+=c&d 262 &mov($tmp1,$a); # b in next round 263 &mov(&swtmp($n%16),$f); # xi=f 264 &rotl($a,5); # ROTATE(a,5) 265 &xor($b,$c) if ($n<59); 266 &and($tmp1,$b) if ($n<59);# tmp1 to hold F_40_59(b,c,d) 267 &lea($f,&DWP(0x8f1bbcdc,$f,$e));# f+=K_40_59+e+(b&(c^d)) 268 &mov($e,&swtmp(($n+1)%16)); # pre-fetch f for next round 269 &add($f,$a); # f+=ROTATE(a,5) 270} else { 271 &mov($tmp1,$c); # tmp1 to hold F_40_59(b,c,d) 272 &xor($f,&swtmp(($n+2)%16)); # f to hold Xupdate(xi,xa,xb,xc,xd) 273 &xor($tmp1,$d); 274 &xor($f,&swtmp(($n+8)%16)); 275 &and($tmp1,$b); 276 &xor($f,&swtmp(($n+13)%16)); # f holds xa^xb^xc^xd 277 &rotl($f,1); # f=ROTATE(f,1) 278 &add($tmp1,$e); # b&(c^d)+=e 279 &rotr($b,2); # b=ROTATE(b,30) 280 &mov($e,$a); # e becomes volatile 281 &rotl($e,5); # ROTATE(a,5) 282 &mov(&swtmp($n%16),$f); # xi=f 283 &lea($f,&DWP(0x8f1bbcdc,$f,$tmp1));# f+=K_40_59+e+(b&(c^d)) 284 &mov($tmp1,$c); 285 &add($f,$e); # f+=ROTATE(a,5) 286 &and($tmp1,$d); 287 &mov($e,&swtmp(($n+1)%16)); # pre-fetch f for next round 288 &add($f,$tmp1); # f+=c&d 289} 290 } 291 292&function_begin("sha1_block_data_order"); 293if ($xmm) { 294 &static_label("ssse3_shortcut"); 295 &static_label("avx_shortcut") if ($ymm); 296 &static_label("K_XX_XX"); 297 298 &picsetup($tmp1); 299 &picsymbol($T, "OPENSSL_ia32cap_P", $tmp1); 300 &picsymbol($tmp1, &label("K_XX_XX"), $tmp1); 301 302 &mov ($A,&DWP(0,$T)); 303 &mov ($D,&DWP(4,$T)); 304 &test ($D,"\$IA32CAP_MASK1_SSSE3"); # check SSSE3 bit 305 &jz (&label("x86")); 306 &test ($A,"\$IA32CAP_MASK0_FXSR"); # check FXSR bit 307 &jz (&label("x86")); 308 if ($ymm) { 309 &and ($D,"\$IA32CAP_MASK1_AVX"); # mask AVX bit 310 &and ($A,"\$IA32CAP_MASK0_INTEL"); # mask "Intel CPU" bit 311 &or ($A,$D); 312 &cmp ($A,"\$(IA32CAP_MASK1_AVX | IA32CAP_MASK0_INTEL)"); 313 &je (&label("avx_shortcut")); 314 } 315 &jmp (&label("ssse3_shortcut")); 316 &set_label("x86",16); 317} 318 &mov($tmp1,&wparam(0)); # SHA_CTX *c 319 &mov($T,&wparam(1)); # const void *input 320 &mov($A,&wparam(2)); # size_t num 321 &stack_push(16+3); # allocate X[16] 322 &shl($A,6); 323 &add($A,$T); 324 &mov(&wparam(2),$A); # pointer beyond the end of input 325 &mov($E,&DWP(16,$tmp1));# pre-load E 326 &jmp(&label("loop")); 327 328&set_label("loop",16); 329 330 # copy input chunk to X, but reversing byte order! 331 for ($i=0; $i<16; $i+=4) 332 { 333 &mov($A,&DWP(4*($i+0),$T)); 334 &mov($B,&DWP(4*($i+1),$T)); 335 &mov($C,&DWP(4*($i+2),$T)); 336 &mov($D,&DWP(4*($i+3),$T)); 337 &bswap($A); 338 &bswap($B); 339 &bswap($C); 340 &bswap($D); 341 &mov(&swtmp($i+0),$A); 342 &mov(&swtmp($i+1),$B); 343 &mov(&swtmp($i+2),$C); 344 &mov(&swtmp($i+3),$D); 345 } 346 &mov(&wparam(1),$T); # redundant in 1st spin 347 348 &mov($A,&DWP(0,$tmp1)); # load SHA_CTX 349 &mov($B,&DWP(4,$tmp1)); 350 &mov($C,&DWP(8,$tmp1)); 351 &mov($D,&DWP(12,$tmp1)); 352 # E is pre-loaded 353 354 for($i=0;$i<16;$i++) { &BODY_00_15($i,@V); unshift(@V,pop(@V)); } 355 for(;$i<20;$i++) { &BODY_16_19($i,@V); unshift(@V,pop(@V)); } 356 for(;$i<40;$i++) { &BODY_20_39($i,@V); unshift(@V,pop(@V)); } 357 for(;$i<60;$i++) { &BODY_40_59($i,@V); unshift(@V,pop(@V)); } 358 for(;$i<80;$i++) { &BODY_20_39($i,@V); unshift(@V,pop(@V)); } 359 360 (($V[5] eq $D) and ($V[0] eq $E)) or die; # double-check 361 362 &mov($tmp1,&wparam(0)); # re-load SHA_CTX* 363 &mov($D,&wparam(1)); # D is last "T" and is discarded 364 365 &add($E,&DWP(0,$tmp1)); # E is last "A"... 366 &add($T,&DWP(4,$tmp1)); 367 &add($A,&DWP(8,$tmp1)); 368 &add($B,&DWP(12,$tmp1)); 369 &add($C,&DWP(16,$tmp1)); 370 371 &mov(&DWP(0,$tmp1),$E); # update SHA_CTX 372 &add($D,64); # advance input pointer 373 &mov(&DWP(4,$tmp1),$T); 374 &cmp($D,&wparam(2)); # have we reached the end yet? 375 &mov(&DWP(8,$tmp1),$A); 376 &mov($E,$C); # C is last "E" which needs to be "pre-loaded" 377 &mov(&DWP(12,$tmp1),$B); 378 &mov($T,$D); # input pointer 379 &mov(&DWP(16,$tmp1),$C); 380 &jb(&label("loop")); 381 382 &stack_pop(16+3); 383&function_end("sha1_block_data_order"); 384 385if ($xmm) { 386###################################################################### 387# The SSSE3 implementation. 388# 389# %xmm[0-7] are used as ring @X[] buffer containing quadruples of last 390# 32 elements of the message schedule or Xupdate outputs. First 4 391# quadruples are simply byte-swapped input, next 4 are calculated 392# according to method originally suggested by Dean Gaudet (modulo 393# being implemented in SSSE3). Once 8 quadruples or 32 elements are 394# collected, it switches to routine proposed by Max Locktyukhin. 395# 396# Calculations inevitably require temporary reqisters, and there are 397# no %xmm registers left to spare. For this reason part of the ring 398# buffer, X[2..4] to be specific, is offloaded to 3 quadriples ring 399# buffer on the stack. Keep in mind that X[2] is alias X[-6], X[3] - 400# X[-5], and X[4] - X[-4]... 401# 402# Another notable optimization is aggressive stack frame compression 403# aiming to minimize amount of 9-byte instructions... 404# 405# Yet another notable optimization is "jumping" $B variable. It means 406# that there is no register permanently allocated for $B value. This 407# allowed to eliminate one instruction from body_20_39... 408# 409my $Xi=4; # 4xSIMD Xupdate round, start pre-seeded 410my @X=map("xmm$_",(4..7,0..3)); # pre-seeded for $Xi=4 411my @V=($A,$B,$C,$D,$E); 412my $j=0; # hash round 413my @T=($T,$tmp1); 414my $inp; 415 416my $_rol=sub { &rol(@_) }; 417my $_ror=sub { &ror(@_) }; 418 419&function_begin("_sha1_block_data_order_ssse3"); 420 &picsetup($tmp1); 421 &picsymbol($tmp1, &label("K_XX_XX"), $tmp1); 422 423&set_label("ssse3_shortcut"); 424 425 &movdqa (@X[3],&QWP(0,$tmp1)); # K_00_19 426 &movdqa (@X[4],&QWP(16,$tmp1)); # K_20_39 427 &movdqa (@X[5],&QWP(32,$tmp1)); # K_40_59 428 &movdqa (@X[6],&QWP(48,$tmp1)); # K_60_79 429 &movdqa (@X[2],&QWP(64,$tmp1)); # pbswap mask 430 431 &mov ($E,&wparam(0)); # load argument block 432 &mov ($inp=@T[1],&wparam(1)); 433 &mov ($D,&wparam(2)); 434 &mov (@T[0],"esp"); 435 436 # stack frame layout 437 # 438 # +0 X[0]+K X[1]+K X[2]+K X[3]+K # XMM->IALU xfer area 439 # X[4]+K X[5]+K X[6]+K X[7]+K 440 # X[8]+K X[9]+K X[10]+K X[11]+K 441 # X[12]+K X[13]+K X[14]+K X[15]+K 442 # 443 # +64 X[0] X[1] X[2] X[3] # XMM->XMM backtrace area 444 # X[4] X[5] X[6] X[7] 445 # X[8] X[9] X[10] X[11] # even borrowed for K_00_19 446 # 447 # +112 K_20_39 K_20_39 K_20_39 K_20_39 # constants 448 # K_40_59 K_40_59 K_40_59 K_40_59 449 # K_60_79 K_60_79 K_60_79 K_60_79 450 # K_00_19 K_00_19 K_00_19 K_00_19 451 # pbswap mask 452 # 453 # +192 ctx # argument block 454 # +196 inp 455 # +200 end 456 # +204 esp 457 &sub ("esp",208); 458 &and ("esp",-64); 459 460 &movdqa (&QWP(112+0,"esp"),@X[4]); # copy constants 461 &movdqa (&QWP(112+16,"esp"),@X[5]); 462 &movdqa (&QWP(112+32,"esp"),@X[6]); 463 &shl ($D,6); # len*64 464 &movdqa (&QWP(112+48,"esp"),@X[3]); 465 &add ($D,$inp); # end of input 466 &movdqa (&QWP(112+64,"esp"),@X[2]); 467 &add ($inp,64); 468 &mov (&DWP(192+0,"esp"),$E); # save argument block 469 &mov (&DWP(192+4,"esp"),$inp); 470 &mov (&DWP(192+8,"esp"),$D); 471 &mov (&DWP(192+12,"esp"),@T[0]); # save original %esp 472 473 &mov ($A,&DWP(0,$E)); # load context 474 &mov ($B,&DWP(4,$E)); 475 &mov ($C,&DWP(8,$E)); 476 &mov ($D,&DWP(12,$E)); 477 &mov ($E,&DWP(16,$E)); 478 &mov (@T[0],$B); # magic seed 479 480 &movdqu (@X[-4&7],&QWP(-64,$inp)); # load input to %xmm[0-3] 481 &movdqu (@X[-3&7],&QWP(-48,$inp)); 482 &movdqu (@X[-2&7],&QWP(-32,$inp)); 483 &movdqu (@X[-1&7],&QWP(-16,$inp)); 484 &pshufb (@X[-4&7],@X[2]); # byte swap 485 &pshufb (@X[-3&7],@X[2]); 486 &pshufb (@X[-2&7],@X[2]); 487 &movdqa (&QWP(112-16,"esp"),@X[3]); # borrow last backtrace slot 488 &pshufb (@X[-1&7],@X[2]); 489 &paddd (@X[-4&7],@X[3]); # add K_00_19 490 &paddd (@X[-3&7],@X[3]); 491 &paddd (@X[-2&7],@X[3]); 492 &movdqa (&QWP(0,"esp"),@X[-4&7]); # X[]+K xfer to IALU 493 &psubd (@X[-4&7],@X[3]); # restore X[] 494 &movdqa (&QWP(0+16,"esp"),@X[-3&7]); 495 &psubd (@X[-3&7],@X[3]); 496 &movdqa (&QWP(0+32,"esp"),@X[-2&7]); 497 &psubd (@X[-2&7],@X[3]); 498 &movdqa (@X[0],@X[-3&7]); 499 &jmp (&label("loop")); 500 501###################################################################### 502# SSE instruction sequence is first broken to groups of independent 503# instructions, independent in respect to their inputs and shifter 504# (not all architectures have more than one). Then IALU instructions 505# are "knitted in" between the SSE groups. Distance is maintained for 506# SSE latency of 2 in hope that it fits better upcoming AMD Bulldozer 507# [which allegedly also implements SSSE3]... 508# 509# Temporary registers usage. X[2] is volatile at the entry and at the 510# end is restored from backtrace ring buffer. X[3] is expected to 511# contain current K_XX_XX constant and is used to calculate X[-1]+K 512# from previous round, it becomes volatile the moment the value is 513# saved to stack for transfer to IALU. X[4] becomes volatile whenever 514# X[-4] is accumulated and offloaded to backtrace ring buffer, at the 515# end it is loaded with next K_XX_XX [which becomes X[3] in next 516# round]... 517# 518sub Xupdate_ssse3_16_31() # recall that $Xi starts with 4 519{ use integer; 520 my $body = shift; 521 my @insns = (&$body,&$body,&$body,&$body); # 40 instructions 522 my ($a,$b,$c,$d,$e); 523 524 eval(shift(@insns)); 525 eval(shift(@insns)); 526 &palignr(@X[0],@X[-4&7],8); # compose "X[-14]" in "X[0]" 527 &movdqa (@X[2],@X[-1&7]); 528 eval(shift(@insns)); 529 eval(shift(@insns)); 530 531 &paddd (@X[3],@X[-1&7]); 532 &movdqa (&QWP(64+16*(($Xi-4)%3),"esp"),@X[-4&7]);# save X[] to backtrace buffer 533 eval(shift(@insns)); 534 eval(shift(@insns)); 535 &psrldq (@X[2],4); # "X[-3]", 3 dwords 536 eval(shift(@insns)); 537 eval(shift(@insns)); 538 &pxor (@X[0],@X[-4&7]); # "X[0]"^="X[-16]" 539 eval(shift(@insns)); 540 eval(shift(@insns)); 541 542 &pxor (@X[2],@X[-2&7]); # "X[-3]"^"X[-8]" 543 eval(shift(@insns)); 544 eval(shift(@insns)); 545 eval(shift(@insns)); 546 eval(shift(@insns)); 547 548 &pxor (@X[0],@X[2]); # "X[0]"^="X[-3]"^"X[-8]" 549 eval(shift(@insns)); 550 eval(shift(@insns)); 551 &movdqa (&QWP(0+16*(($Xi-1)&3),"esp"),@X[3]); # X[]+K xfer to IALU 552 eval(shift(@insns)); 553 eval(shift(@insns)); 554 555 &movdqa (@X[4],@X[0]); 556 &movdqa (@X[2],@X[0]); 557 eval(shift(@insns)); 558 eval(shift(@insns)); 559 eval(shift(@insns)); 560 eval(shift(@insns)); 561 562 &pslldq (@X[4],12); # "X[0]"<<96, extract one dword 563 &paddd (@X[0],@X[0]); 564 eval(shift(@insns)); 565 eval(shift(@insns)); 566 eval(shift(@insns)); 567 eval(shift(@insns)); 568 569 &psrld (@X[2],31); 570 eval(shift(@insns)); 571 eval(shift(@insns)); 572 &movdqa (@X[3],@X[4]); 573 eval(shift(@insns)); 574 eval(shift(@insns)); 575 576 &psrld (@X[4],30); 577 &por (@X[0],@X[2]); # "X[0]"<<<=1 578 eval(shift(@insns)); 579 eval(shift(@insns)); 580 &movdqa (@X[2],&QWP(64+16*(($Xi-6)%3),"esp")) if ($Xi>5); # restore X[] from backtrace buffer 581 eval(shift(@insns)); 582 eval(shift(@insns)); 583 584 &pslld (@X[3],2); 585 &pxor (@X[0],@X[4]); 586 eval(shift(@insns)); 587 eval(shift(@insns)); 588 &movdqa (@X[4],&QWP(112-16+16*(($Xi)/5),"esp")); # K_XX_XX 589 eval(shift(@insns)); 590 eval(shift(@insns)); 591 592 &pxor (@X[0],@X[3]); # "X[0]"^=("X[0]"<<96)<<<2 593 &movdqa (@X[1],@X[-2&7]) if ($Xi<7); 594 eval(shift(@insns)); 595 eval(shift(@insns)); 596 597 foreach (@insns) { eval; } # remaining instructions [if any] 598 599 $Xi++; push(@X,shift(@X)); # "rotate" X[] 600} 601 602sub Xupdate_ssse3_32_79() 603{ use integer; 604 my $body = shift; 605 my @insns = (&$body,&$body,&$body,&$body); # 32 to 48 instructions 606 my ($a,$b,$c,$d,$e); 607 608 &movdqa (@X[2],@X[-1&7]) if ($Xi==8); 609 eval(shift(@insns)); # body_20_39 610 &pxor (@X[0],@X[-4&7]); # "X[0]"="X[-32]"^"X[-16]" 611 &palignr(@X[2],@X[-2&7],8); # compose "X[-6]" 612 eval(shift(@insns)); 613 eval(shift(@insns)); 614 eval(shift(@insns)); # rol 615 616 &pxor (@X[0],@X[-7&7]); # "X[0]"^="X[-28]" 617 &movdqa (&QWP(64+16*(($Xi-4)%3),"esp"),@X[-4&7]); # save X[] to backtrace buffer 618 eval(shift(@insns)); 619 eval(shift(@insns)); 620 if ($Xi%5) { 621 &movdqa (@X[4],@X[3]); # "perpetuate" K_XX_XX... 622 } else { # ... or load next one 623 &movdqa (@X[4],&QWP(112-16+16*($Xi/5),"esp")); 624 } 625 &paddd (@X[3],@X[-1&7]); 626 eval(shift(@insns)); # ror 627 eval(shift(@insns)); 628 629 &pxor (@X[0],@X[2]); # "X[0]"^="X[-6]" 630 eval(shift(@insns)); # body_20_39 631 eval(shift(@insns)); 632 eval(shift(@insns)); 633 eval(shift(@insns)); # rol 634 635 &movdqa (@X[2],@X[0]); 636 &movdqa (&QWP(0+16*(($Xi-1)&3),"esp"),@X[3]); # X[]+K xfer to IALU 637 eval(shift(@insns)); 638 eval(shift(@insns)); 639 eval(shift(@insns)); # ror 640 eval(shift(@insns)); 641 642 &pslld (@X[0],2); 643 eval(shift(@insns)); # body_20_39 644 eval(shift(@insns)); 645 &psrld (@X[2],30); 646 eval(shift(@insns)); 647 eval(shift(@insns)); # rol 648 eval(shift(@insns)); 649 eval(shift(@insns)); 650 eval(shift(@insns)); # ror 651 eval(shift(@insns)); 652 653 &por (@X[0],@X[2]); # "X[0]"<<<=2 654 eval(shift(@insns)); # body_20_39 655 eval(shift(@insns)); 656 &movdqa (@X[2],&QWP(64+16*(($Xi-6)%3),"esp")) if($Xi<19); # restore X[] from backtrace buffer 657 eval(shift(@insns)); 658 eval(shift(@insns)); # rol 659 eval(shift(@insns)); 660 eval(shift(@insns)); 661 eval(shift(@insns)); # ror 662 &movdqa (@X[3],@X[0]) if ($Xi<19); 663 eval(shift(@insns)); 664 665 foreach (@insns) { eval; } # remaining instructions 666 667 $Xi++; push(@X,shift(@X)); # "rotate" X[] 668} 669 670sub Xuplast_ssse3_80() 671{ use integer; 672 my $body = shift; 673 my @insns = (&$body,&$body,&$body,&$body); # 32 instructions 674 my ($a,$b,$c,$d,$e); 675 676 eval(shift(@insns)); 677 &paddd (@X[3],@X[-1&7]); 678 eval(shift(@insns)); 679 eval(shift(@insns)); 680 eval(shift(@insns)); 681 eval(shift(@insns)); 682 683 &movdqa (&QWP(0+16*(($Xi-1)&3),"esp"),@X[3]); # X[]+K xfer IALU 684 685 foreach (@insns) { eval; } # remaining instructions 686 687 &mov ($inp=@T[1],&DWP(192+4,"esp")); 688 &cmp ($inp,&DWP(192+8,"esp")); 689 &je (&label("done")); 690 691 &movdqa (@X[3],&QWP(112+48,"esp")); # K_00_19 692 &movdqa (@X[2],&QWP(112+64,"esp")); # pbswap mask 693 &movdqu (@X[-4&7],&QWP(0,$inp)); # load input 694 &movdqu (@X[-3&7],&QWP(16,$inp)); 695 &movdqu (@X[-2&7],&QWP(32,$inp)); 696 &movdqu (@X[-1&7],&QWP(48,$inp)); 697 &add ($inp,64); 698 &pshufb (@X[-4&7],@X[2]); # byte swap 699 &mov (&DWP(192+4,"esp"),$inp); 700 &movdqa (&QWP(112-16,"esp"),@X[3]); # borrow last backtrace slot 701 702 $Xi=0; 703} 704 705sub Xloop_ssse3() 706{ use integer; 707 my $body = shift; 708 my @insns = (&$body,&$body,&$body,&$body); # 32 instructions 709 my ($a,$b,$c,$d,$e); 710 711 eval(shift(@insns)); 712 eval(shift(@insns)); 713 &pshufb (@X[($Xi-3)&7],@X[2]); 714 eval(shift(@insns)); 715 eval(shift(@insns)); 716 &paddd (@X[($Xi-4)&7],@X[3]); 717 eval(shift(@insns)); 718 eval(shift(@insns)); 719 eval(shift(@insns)); 720 eval(shift(@insns)); 721 &movdqa (&QWP(0+16*$Xi,"esp"),@X[($Xi-4)&7]); # X[]+K xfer to IALU 722 eval(shift(@insns)); 723 eval(shift(@insns)); 724 &psubd (@X[($Xi-4)&7],@X[3]); 725 726 foreach (@insns) { eval; } 727 $Xi++; 728} 729 730sub Xtail_ssse3() 731{ use integer; 732 my $body = shift; 733 my @insns = (&$body,&$body,&$body,&$body); # 32 instructions 734 my ($a,$b,$c,$d,$e); 735 736 foreach (@insns) { eval; } 737} 738 739sub body_00_19 () { 740 ( 741 '($a,$b,$c,$d,$e)=@V;'. 742 '&add ($e,&DWP(4*($j&15),"esp"));', # X[]+K xfer 743 '&xor ($c,$d);', 744 '&mov (@T[1],$a);', # $b in next round 745 '&$_rol ($a,5);', 746 '&and (@T[0],$c);', # ($b&($c^$d)) 747 '&xor ($c,$d);', # restore $c 748 '&xor (@T[0],$d);', 749 '&add ($e,$a);', 750 '&$_ror ($b,$j?7:2);', # $b>>>2 751 '&add ($e,@T[0]);' .'$j++; unshift(@V,pop(@V)); unshift(@T,pop(@T));' 752 ); 753} 754 755sub body_20_39 () { 756 ( 757 '($a,$b,$c,$d,$e)=@V;'. 758 '&add ($e,&DWP(4*($j++&15),"esp"));', # X[]+K xfer 759 '&xor (@T[0],$d);', # ($b^$d) 760 '&mov (@T[1],$a);', # $b in next round 761 '&$_rol ($a,5);', 762 '&xor (@T[0],$c);', # ($b^$d^$c) 763 '&add ($e,$a);', 764 '&$_ror ($b,7);', # $b>>>2 765 '&add ($e,@T[0]);' .'unshift(@V,pop(@V)); unshift(@T,pop(@T));' 766 ); 767} 768 769sub body_40_59 () { 770 ( 771 '($a,$b,$c,$d,$e)=@V;'. 772 '&mov (@T[1],$c);', 773 '&xor ($c,$d);', 774 '&add ($e,&DWP(4*($j++&15),"esp"));', # X[]+K xfer 775 '&and (@T[1],$d);', 776 '&and (@T[0],$c);', # ($b&($c^$d)) 777 '&$_ror ($b,7);', # $b>>>2 778 '&add ($e,@T[1]);', 779 '&mov (@T[1],$a);', # $b in next round 780 '&$_rol ($a,5);', 781 '&add ($e,@T[0]);', 782 '&xor ($c,$d);', # restore $c 783 '&add ($e,$a);' .'unshift(@V,pop(@V)); unshift(@T,pop(@T));' 784 ); 785} 786 787&set_label("loop",16); 788 &Xupdate_ssse3_16_31(\&body_00_19); 789 &Xupdate_ssse3_16_31(\&body_00_19); 790 &Xupdate_ssse3_16_31(\&body_00_19); 791 &Xupdate_ssse3_16_31(\&body_00_19); 792 &Xupdate_ssse3_32_79(\&body_00_19); 793 &Xupdate_ssse3_32_79(\&body_20_39); 794 &Xupdate_ssse3_32_79(\&body_20_39); 795 &Xupdate_ssse3_32_79(\&body_20_39); 796 &Xupdate_ssse3_32_79(\&body_20_39); 797 &Xupdate_ssse3_32_79(\&body_20_39); 798 &Xupdate_ssse3_32_79(\&body_40_59); 799 &Xupdate_ssse3_32_79(\&body_40_59); 800 &Xupdate_ssse3_32_79(\&body_40_59); 801 &Xupdate_ssse3_32_79(\&body_40_59); 802 &Xupdate_ssse3_32_79(\&body_40_59); 803 &Xupdate_ssse3_32_79(\&body_20_39); 804 &Xuplast_ssse3_80(\&body_20_39); # can jump to "done" 805 806 $saved_j=$j; @saved_V=@V; 807 808 &Xloop_ssse3(\&body_20_39); 809 &Xloop_ssse3(\&body_20_39); 810 &Xloop_ssse3(\&body_20_39); 811 812 &mov (@T[1],&DWP(192,"esp")); # update context 813 &add ($A,&DWP(0,@T[1])); 814 &add (@T[0],&DWP(4,@T[1])); # $b 815 &add ($C,&DWP(8,@T[1])); 816 &mov (&DWP(0,@T[1]),$A); 817 &add ($D,&DWP(12,@T[1])); 818 &mov (&DWP(4,@T[1]),@T[0]); 819 &add ($E,&DWP(16,@T[1])); 820 &mov (&DWP(8,@T[1]),$C); 821 &mov ($B,@T[0]); 822 &mov (&DWP(12,@T[1]),$D); 823 &mov (&DWP(16,@T[1]),$E); 824 &movdqa (@X[0],@X[-3&7]); 825 826 &jmp (&label("loop")); 827 828&set_label("done",16); $j=$saved_j; @V=@saved_V; 829 830 &Xtail_ssse3(\&body_20_39); 831 &Xtail_ssse3(\&body_20_39); 832 &Xtail_ssse3(\&body_20_39); 833 834 &mov (@T[1],&DWP(192,"esp")); # update context 835 &add ($A,&DWP(0,@T[1])); 836 &mov ("esp",&DWP(192+12,"esp")); # restore %esp 837 &add (@T[0],&DWP(4,@T[1])); # $b 838 &add ($C,&DWP(8,@T[1])); 839 &mov (&DWP(0,@T[1]),$A); 840 &add ($D,&DWP(12,@T[1])); 841 &mov (&DWP(4,@T[1]),@T[0]); 842 &add ($E,&DWP(16,@T[1])); 843 &mov (&DWP(8,@T[1]),$C); 844 &mov (&DWP(12,@T[1]),$D); 845 &mov (&DWP(16,@T[1]),$E); 846 847&function_end("_sha1_block_data_order_ssse3"); 848 849if ($ymm) { 850my $Xi=4; # 4xSIMD Xupdate round, start pre-seeded 851my @X=map("xmm$_",(4..7,0..3)); # pre-seeded for $Xi=4 852my @V=($A,$B,$C,$D,$E); 853my $j=0; # hash round 854my @T=($T,$tmp1); 855my $inp; 856 857my $_rol=sub { &shld(@_[0],@_) }; 858my $_ror=sub { &shrd(@_[0],@_) }; 859 860&function_begin("_sha1_block_data_order_avx"); 861 &picsetup($tmp1); 862 &picsymbol($tmp1, &label("K_XX_XX"), $tmp1); 863 864&set_label("avx_shortcut"); 865 &vzeroall(); 866 867 &vmovdqa(@X[3],&QWP(0,$tmp1)); # K_00_19 868 &vmovdqa(@X[4],&QWP(16,$tmp1)); # K_20_39 869 &vmovdqa(@X[5],&QWP(32,$tmp1)); # K_40_59 870 &vmovdqa(@X[6],&QWP(48,$tmp1)); # K_60_79 871 &vmovdqa(@X[2],&QWP(64,$tmp1)); # pbswap mask 872 873 &mov ($E,&wparam(0)); # load argument block 874 &mov ($inp=@T[1],&wparam(1)); 875 &mov ($D,&wparam(2)); 876 &mov (@T[0],"esp"); 877 878 # stack frame layout 879 # 880 # +0 X[0]+K X[1]+K X[2]+K X[3]+K # XMM->IALU xfer area 881 # X[4]+K X[5]+K X[6]+K X[7]+K 882 # X[8]+K X[9]+K X[10]+K X[11]+K 883 # X[12]+K X[13]+K X[14]+K X[15]+K 884 # 885 # +64 X[0] X[1] X[2] X[3] # XMM->XMM backtrace area 886 # X[4] X[5] X[6] X[7] 887 # X[8] X[9] X[10] X[11] # even borrowed for K_00_19 888 # 889 # +112 K_20_39 K_20_39 K_20_39 K_20_39 # constants 890 # K_40_59 K_40_59 K_40_59 K_40_59 891 # K_60_79 K_60_79 K_60_79 K_60_79 892 # K_00_19 K_00_19 K_00_19 K_00_19 893 # pbswap mask 894 # 895 # +192 ctx # argument block 896 # +196 inp 897 # +200 end 898 # +204 esp 899 &sub ("esp",208); 900 &and ("esp",-64); 901 902 &vmovdqa(&QWP(112+0,"esp"),@X[4]); # copy constants 903 &vmovdqa(&QWP(112+16,"esp"),@X[5]); 904 &vmovdqa(&QWP(112+32,"esp"),@X[6]); 905 &shl ($D,6); # len*64 906 &vmovdqa(&QWP(112+48,"esp"),@X[3]); 907 &add ($D,$inp); # end of input 908 &vmovdqa(&QWP(112+64,"esp"),@X[2]); 909 &add ($inp,64); 910 &mov (&DWP(192+0,"esp"),$E); # save argument block 911 &mov (&DWP(192+4,"esp"),$inp); 912 &mov (&DWP(192+8,"esp"),$D); 913 &mov (&DWP(192+12,"esp"),@T[0]); # save original %esp 914 915 &mov ($A,&DWP(0,$E)); # load context 916 &mov ($B,&DWP(4,$E)); 917 &mov ($C,&DWP(8,$E)); 918 &mov ($D,&DWP(12,$E)); 919 &mov ($E,&DWP(16,$E)); 920 &mov (@T[0],$B); # magic seed 921 922 &vmovdqu(@X[-4&7],&QWP(-64,$inp)); # load input to %xmm[0-3] 923 &vmovdqu(@X[-3&7],&QWP(-48,$inp)); 924 &vmovdqu(@X[-2&7],&QWP(-32,$inp)); 925 &vmovdqu(@X[-1&7],&QWP(-16,$inp)); 926 &vpshufb(@X[-4&7],@X[-4&7],@X[2]); # byte swap 927 &vpshufb(@X[-3&7],@X[-3&7],@X[2]); 928 &vpshufb(@X[-2&7],@X[-2&7],@X[2]); 929 &vmovdqa(&QWP(112-16,"esp"),@X[3]); # borrow last backtrace slot 930 &vpshufb(@X[-1&7],@X[-1&7],@X[2]); 931 &vpaddd (@X[0],@X[-4&7],@X[3]); # add K_00_19 932 &vpaddd (@X[1],@X[-3&7],@X[3]); 933 &vpaddd (@X[2],@X[-2&7],@X[3]); 934 &vmovdqa(&QWP(0,"esp"),@X[0]); # X[]+K xfer to IALU 935 &vmovdqa(&QWP(0+16,"esp"),@X[1]); 936 &vmovdqa(&QWP(0+32,"esp"),@X[2]); 937 &jmp (&label("loop")); 938 939sub Xupdate_avx_16_31() # recall that $Xi starts with 4 940{ use integer; 941 my $body = shift; 942 my @insns = (&$body,&$body,&$body,&$body); # 40 instructions 943 my ($a,$b,$c,$d,$e); 944 945 eval(shift(@insns)); 946 eval(shift(@insns)); 947 &vpalignr(@X[0],@X[-3&7],@X[-4&7],8); # compose "X[-14]" in "X[0]" 948 eval(shift(@insns)); 949 eval(shift(@insns)); 950 951 &vpaddd (@X[3],@X[3],@X[-1&7]); 952 &vmovdqa (&QWP(64+16*(($Xi-4)%3),"esp"),@X[-4&7]);# save X[] to backtrace buffer 953 eval(shift(@insns)); 954 eval(shift(@insns)); 955 &vpsrldq(@X[2],@X[-1&7],4); # "X[-3]", 3 dwords 956 eval(shift(@insns)); 957 eval(shift(@insns)); 958 &vpxor (@X[0],@X[0],@X[-4&7]); # "X[0]"^="X[-16]" 959 eval(shift(@insns)); 960 eval(shift(@insns)); 961 962 &vpxor (@X[2],@X[2],@X[-2&7]); # "X[-3]"^"X[-8]" 963 eval(shift(@insns)); 964 eval(shift(@insns)); 965 &vmovdqa (&QWP(0+16*(($Xi-1)&3),"esp"),@X[3]); # X[]+K xfer to IALU 966 eval(shift(@insns)); 967 eval(shift(@insns)); 968 969 &vpxor (@X[0],@X[0],@X[2]); # "X[0]"^="X[-3]"^"X[-8]" 970 eval(shift(@insns)); 971 eval(shift(@insns)); 972 eval(shift(@insns)); 973 eval(shift(@insns)); 974 975 &vpsrld (@X[2],@X[0],31); 976 eval(shift(@insns)); 977 eval(shift(@insns)); 978 eval(shift(@insns)); 979 eval(shift(@insns)); 980 981 &vpslldq(@X[4],@X[0],12); # "X[0]"<<96, extract one dword 982 &vpaddd (@X[0],@X[0],@X[0]); 983 eval(shift(@insns)); 984 eval(shift(@insns)); 985 eval(shift(@insns)); 986 eval(shift(@insns)); 987 988 &vpsrld (@X[3],@X[4],30); 989 &vpor (@X[0],@X[0],@X[2]); # "X[0]"<<<=1 990 eval(shift(@insns)); 991 eval(shift(@insns)); 992 eval(shift(@insns)); 993 eval(shift(@insns)); 994 995 &vpslld (@X[4],@X[4],2); 996 &vmovdqa (@X[2],&QWP(64+16*(($Xi-6)%3),"esp")) if ($Xi>5); # restore X[] from backtrace buffer 997 eval(shift(@insns)); 998 eval(shift(@insns)); 999 &vpxor (@X[0],@X[0],@X[3]); 1000 eval(shift(@insns)); 1001 eval(shift(@insns)); 1002 eval(shift(@insns)); 1003 eval(shift(@insns)); 1004 1005 &vpxor (@X[0],@X[0],@X[4]); # "X[0]"^=("X[0]"<<96)<<<2 1006 eval(shift(@insns)); 1007 eval(shift(@insns)); 1008 &vmovdqa (@X[4],&QWP(112-16+16*(($Xi)/5),"esp")); # K_XX_XX 1009 eval(shift(@insns)); 1010 eval(shift(@insns)); 1011 1012 foreach (@insns) { eval; } # remaining instructions [if any] 1013 1014 $Xi++; push(@X,shift(@X)); # "rotate" X[] 1015} 1016 1017sub Xupdate_avx_32_79() 1018{ use integer; 1019 my $body = shift; 1020 my @insns = (&$body,&$body,&$body,&$body); # 32 to 48 instructions 1021 my ($a,$b,$c,$d,$e); 1022 1023 &vpalignr(@X[2],@X[-1&7],@X[-2&7],8); # compose "X[-6]" 1024 &vpxor (@X[0],@X[0],@X[-4&7]); # "X[0]"="X[-32]"^"X[-16]" 1025 eval(shift(@insns)); # body_20_39 1026 eval(shift(@insns)); 1027 eval(shift(@insns)); 1028 eval(shift(@insns)); # rol 1029 1030 &vpxor (@X[0],@X[0],@X[-7&7]); # "X[0]"^="X[-28]" 1031 &vmovdqa (&QWP(64+16*(($Xi-4)%3),"esp"),@X[-4&7]); # save X[] to backtrace buffer 1032 eval(shift(@insns)); 1033 eval(shift(@insns)); 1034 if ($Xi%5) { 1035 &vmovdqa (@X[4],@X[3]); # "perpetuate" K_XX_XX... 1036 } else { # ... or load next one 1037 &vmovdqa (@X[4],&QWP(112-16+16*($Xi/5),"esp")); 1038 } 1039 &vpaddd (@X[3],@X[3],@X[-1&7]); 1040 eval(shift(@insns)); # ror 1041 eval(shift(@insns)); 1042 1043 &vpxor (@X[0],@X[0],@X[2]); # "X[0]"^="X[-6]" 1044 eval(shift(@insns)); # body_20_39 1045 eval(shift(@insns)); 1046 eval(shift(@insns)); 1047 eval(shift(@insns)); # rol 1048 1049 &vpsrld (@X[2],@X[0],30); 1050 &vmovdqa (&QWP(0+16*(($Xi-1)&3),"esp"),@X[3]); # X[]+K xfer to IALU 1051 eval(shift(@insns)); 1052 eval(shift(@insns)); 1053 eval(shift(@insns)); # ror 1054 eval(shift(@insns)); 1055 1056 &vpslld (@X[0],@X[0],2); 1057 eval(shift(@insns)); # body_20_39 1058 eval(shift(@insns)); 1059 eval(shift(@insns)); 1060 eval(shift(@insns)); # rol 1061 eval(shift(@insns)); 1062 eval(shift(@insns)); 1063 eval(shift(@insns)); # ror 1064 eval(shift(@insns)); 1065 1066 &vpor (@X[0],@X[0],@X[2]); # "X[0]"<<<=2 1067 eval(shift(@insns)); # body_20_39 1068 eval(shift(@insns)); 1069 &vmovdqa (@X[2],&QWP(64+16*(($Xi-6)%3),"esp")) if($Xi<19); # restore X[] from backtrace buffer 1070 eval(shift(@insns)); 1071 eval(shift(@insns)); # rol 1072 eval(shift(@insns)); 1073 eval(shift(@insns)); 1074 eval(shift(@insns)); # ror 1075 eval(shift(@insns)); 1076 1077 foreach (@insns) { eval; } # remaining instructions 1078 1079 $Xi++; push(@X,shift(@X)); # "rotate" X[] 1080} 1081 1082sub Xuplast_avx_80() 1083{ use integer; 1084 my $body = shift; 1085 my @insns = (&$body,&$body,&$body,&$body); # 32 instructions 1086 my ($a,$b,$c,$d,$e); 1087 1088 eval(shift(@insns)); 1089 &vpaddd (@X[3],@X[3],@X[-1&7]); 1090 eval(shift(@insns)); 1091 eval(shift(@insns)); 1092 eval(shift(@insns)); 1093 eval(shift(@insns)); 1094 1095 &vmovdqa (&QWP(0+16*(($Xi-1)&3),"esp"),@X[3]); # X[]+K xfer IALU 1096 1097 foreach (@insns) { eval; } # remaining instructions 1098 1099 &mov ($inp=@T[1],&DWP(192+4,"esp")); 1100 &cmp ($inp,&DWP(192+8,"esp")); 1101 &je (&label("done")); 1102 1103 &vmovdqa(@X[3],&QWP(112+48,"esp")); # K_00_19 1104 &vmovdqa(@X[2],&QWP(112+64,"esp")); # pbswap mask 1105 &vmovdqu(@X[-4&7],&QWP(0,$inp)); # load input 1106 &vmovdqu(@X[-3&7],&QWP(16,$inp)); 1107 &vmovdqu(@X[-2&7],&QWP(32,$inp)); 1108 &vmovdqu(@X[-1&7],&QWP(48,$inp)); 1109 &add ($inp,64); 1110 &vpshufb(@X[-4&7],@X[-4&7],@X[2]); # byte swap 1111 &mov (&DWP(192+4,"esp"),$inp); 1112 &vmovdqa(&QWP(112-16,"esp"),@X[3]); # borrow last backtrace slot 1113 1114 $Xi=0; 1115} 1116 1117sub Xloop_avx() 1118{ use integer; 1119 my $body = shift; 1120 my @insns = (&$body,&$body,&$body,&$body); # 32 instructions 1121 my ($a,$b,$c,$d,$e); 1122 1123 eval(shift(@insns)); 1124 eval(shift(@insns)); 1125 &vpshufb (@X[($Xi-3)&7],@X[($Xi-3)&7],@X[2]); 1126 eval(shift(@insns)); 1127 eval(shift(@insns)); 1128 &vpaddd (@X[$Xi&7],@X[($Xi-4)&7],@X[3]); 1129 eval(shift(@insns)); 1130 eval(shift(@insns)); 1131 eval(shift(@insns)); 1132 eval(shift(@insns)); 1133 &vmovdqa (&QWP(0+16*$Xi,"esp"),@X[$Xi&7]); # X[]+K xfer to IALU 1134 eval(shift(@insns)); 1135 eval(shift(@insns)); 1136 1137 foreach (@insns) { eval; } 1138 $Xi++; 1139} 1140 1141sub Xtail_avx() 1142{ use integer; 1143 my $body = shift; 1144 my @insns = (&$body,&$body,&$body,&$body); # 32 instructions 1145 my ($a,$b,$c,$d,$e); 1146 1147 foreach (@insns) { eval; } 1148} 1149 1150&set_label("loop",16); 1151 &Xupdate_avx_16_31(\&body_00_19); 1152 &Xupdate_avx_16_31(\&body_00_19); 1153 &Xupdate_avx_16_31(\&body_00_19); 1154 &Xupdate_avx_16_31(\&body_00_19); 1155 &Xupdate_avx_32_79(\&body_00_19); 1156 &Xupdate_avx_32_79(\&body_20_39); 1157 &Xupdate_avx_32_79(\&body_20_39); 1158 &Xupdate_avx_32_79(\&body_20_39); 1159 &Xupdate_avx_32_79(\&body_20_39); 1160 &Xupdate_avx_32_79(\&body_20_39); 1161 &Xupdate_avx_32_79(\&body_40_59); 1162 &Xupdate_avx_32_79(\&body_40_59); 1163 &Xupdate_avx_32_79(\&body_40_59); 1164 &Xupdate_avx_32_79(\&body_40_59); 1165 &Xupdate_avx_32_79(\&body_40_59); 1166 &Xupdate_avx_32_79(\&body_20_39); 1167 &Xuplast_avx_80(\&body_20_39); # can jump to "done" 1168 1169 $saved_j=$j; @saved_V=@V; 1170 1171 &Xloop_avx(\&body_20_39); 1172 &Xloop_avx(\&body_20_39); 1173 &Xloop_avx(\&body_20_39); 1174 1175 &mov (@T[1],&DWP(192,"esp")); # update context 1176 &add ($A,&DWP(0,@T[1])); 1177 &add (@T[0],&DWP(4,@T[1])); # $b 1178 &add ($C,&DWP(8,@T[1])); 1179 &mov (&DWP(0,@T[1]),$A); 1180 &add ($D,&DWP(12,@T[1])); 1181 &mov (&DWP(4,@T[1]),@T[0]); 1182 &add ($E,&DWP(16,@T[1])); 1183 &mov (&DWP(8,@T[1]),$C); 1184 &mov ($B,@T[0]); 1185 &mov (&DWP(12,@T[1]),$D); 1186 &mov (&DWP(16,@T[1]),$E); 1187 1188 &jmp (&label("loop")); 1189 1190&set_label("done",16); $j=$saved_j; @V=@saved_V; 1191 1192 &Xtail_avx(\&body_20_39); 1193 &Xtail_avx(\&body_20_39); 1194 &Xtail_avx(\&body_20_39); 1195 1196 &vzeroall(); 1197 1198 &mov (@T[1],&DWP(192,"esp")); # update context 1199 &add ($A,&DWP(0,@T[1])); 1200 &mov ("esp",&DWP(192+12,"esp")); # restore %esp 1201 &add (@T[0],&DWP(4,@T[1])); # $b 1202 &add ($C,&DWP(8,@T[1])); 1203 &mov (&DWP(0,@T[1]),$A); 1204 &add ($D,&DWP(12,@T[1])); 1205 &mov (&DWP(4,@T[1]),@T[0]); 1206 &add ($E,&DWP(16,@T[1])); 1207 &mov (&DWP(8,@T[1]),$C); 1208 &mov (&DWP(12,@T[1]),$D); 1209 &mov (&DWP(16,@T[1]),$E); 1210&function_end("_sha1_block_data_order_avx"); 1211} 1212 1213 &rodataseg(); 1214&set_label("K_XX_XX",64); 1215&data_word(0x5a827999,0x5a827999,0x5a827999,0x5a827999); # K_00_19 1216&data_word(0x6ed9eba1,0x6ed9eba1,0x6ed9eba1,0x6ed9eba1); # K_20_39 1217&data_word(0x8f1bbcdc,0x8f1bbcdc,0x8f1bbcdc,0x8f1bbcdc); # K_40_59 1218&data_word(0xca62c1d6,0xca62c1d6,0xca62c1d6,0xca62c1d6); # K_60_79 1219&data_word(0x00010203,0x04050607,0x08090a0b,0x0c0d0e0f); # pbswap mask 1220 &previous(); 1221} 1222 1223&asm_finish(); 1224