1 /* $OpenBSD: archdep.h,v 1.16 2014/11/03 17:50:56 guenther Exp $ */ 2 3 /* 4 * Copyright (c) 1998 Per Fogelstrom, Opsycon AB 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS 16 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 19 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 29 #ifndef _POWERPC_ARCHDEP_H_ 30 #define _POWERPC_ARCHDEP_H_ 31 32 #define DL_MALLOC_ALIGN 4 /* Arch constraint or otherwise */ 33 34 #define MACHID EM_PPC /* ELF e_machine ID value checked */ 35 36 #define RELTYPE Elf32_Rela 37 #define RELSIZE sizeof(Elf32_Rela) 38 39 #include <elf_abi.h> 40 #include <machine/reloc.h> 41 #include "syscall.h" 42 #include "util.h" 43 44 /* 45 * The following functions are declared inline so they can 46 * be used before bootstrap linking has been finished. 47 */ 48 49 static inline void 50 _dl_dcbf(Elf32_Addr *addr) 51 { 52 __asm__ volatile ("dcbst 0, %0\n\t" 53 "sync\n\t" 54 "icbi 0, %0\n\t" 55 "sync\n\t" 56 "isync" 57 : : "r" (addr) : "0"); 58 } 59 60 static inline void 61 RELOC_REL(Elf_Rel *r, const Elf_Sym *s, Elf_Addr *p, unsigned long v) 62 { 63 /* PowerPC does not use REL type relocations */ 64 _dl_exit(20); 65 } 66 67 static inline void 68 RELOC_RELA(Elf32_Rela *r, const Elf32_Sym *s, Elf32_Addr *p, unsigned long v, 69 Elf_Addr *pltgot) 70 { 71 if (ELF32_R_TYPE(r->r_info) == RELOC_RELATIVE) { 72 *p = v + r->r_addend; 73 } else if (ELF32_R_TYPE(r->r_info) == RELOC_JMP_SLOT) { 74 Elf32_Addr val = v + s->st_value + r->r_addend - 75 (Elf32_Addr)(p); 76 if (((val & 0xfe000000) != 0) && 77 ((val & 0xfe000000) != 0xfe000000)) { 78 /* invalid offset */ 79 _dl_exit(20); 80 } 81 val &= ~0xfc000000; 82 val |= 0x48000000; 83 *p = val; 84 _dl_dcbf(p); 85 } else if (ELF32_R_TYPE((r)->r_info) == RELOC_GLOB_DAT) { 86 *p = v + s->st_value + r->r_addend; 87 } else { 88 /* XXX - printf might not work here, but we give it a shot. */ 89 _dl_printf("Unknown bootstrap relocation.\n"); 90 _dl_exit(6); 91 } 92 } 93 94 #define RELOC_GOT(obj, offs) 95 96 #define GOT_PERMS (PROT_READ|PROT_EXEC) 97 98 #endif /* _POWERPC_ARCHDEP_H_ */ 99