1.\" $OpenBSD: amas.4,v 1.2 2011/06/06 23:18:28 sthen Exp $ 2.\" 3.\" Copyright (c) 2009 Ariane van der Steldt <ariane@stack.nl> 4.\" 5.\" Permission to use, copy, modify, and distribute this software for any 6.\" purpose with or without fee is hereby granted, provided that the above 7.\" copyright notice and this permission notice appear in all copies. 8.\" 9.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16.\" 17.Dd $Mdocdate: June 6 2011 $ 18.Dt AMAS 4 19.Os 20.Sh NAME 21.Nm amas 22.Nd AMD memory address map 23.Sh SYNOPSIS 24.Cd "amas* at pci?" 25.Sh DESCRIPTION 26The 27.Nm 28driver provides read access to the AMD memory map, which describes 29the location of physical memory. 30.Pp 31One instance of this device is shared between all cores on a chip. 32This device is present on AMD processors of the 0Fh, 10h and 11h family. 33.Pp 34The 35.Nm 36device can run in either interleaved mode or in non-interleaved mode. 37In interleaved mode, the physical memory addresses are rotated across 38each chip. 39.Nm 40sits between the CPU cores, the DRAM controller and the HyperTransport bus. 41When a CPU requests a memory page, 42.Nm 43decides if the request is serviced from memory local to the chip, 44in which case it normalizes the address and passes it on to the dram 45controller. 46If the request refers to memory present on a different chip, 47the request is forwarded to the correct chip using the hypertransport bus. 48.Pp 49The 50.Nm 51device is configured by the BIOS and kernel startup routines. 52If multiple instances of this device are available, 53all should contain the same information. 54.Sh SEE ALSO 55.Xr pci 4 56.Rs 57.%T "BIOS and Kernel Developer's Guide for AMD Athlon 64 and AMD Opteron Processors" 58.%D February 2006 59.%R Publication # 26094 60.%P pp. 66\(en80 61.\" .%O http://support.amd.com/us/Processor_TechDocs/26094.PDF 62.Re 63.Rs 64.%T "BIOS and Kernel Developer's Guide (BKDG) For AMD Family 10h Processors" 65.%D March 2008 66.%R Publication # 31116 67.%P pp. 158\(en167 68.\" .%O http://support.amd.com/us/Processor_TechDocs/31116.pdf 69.Re 70.Rs 71.%T "BIOS and Kernel Developer's Guide (BKDG) For AMD Family 11h Processors" 72.%D July 2008 73.%R Publication # 41256 74.%P pp. 109\(en114 75.\" .%O http://support.amd.com/us/Processor_TechDocs/41256.pdf 76.Re 77.Sh HISTORY 78The 79.Nm 80driver first appeared in 81.Ox 4.6 . 82.Sh AUTHORS 83The 84.Nm 85driver was written by 86.An Ariane van der Steldt Aq ariane@stack.nl . 87