1.\" $OpenBSD: auich.4,v 1.25 2010/02/25 00:18:01 sthen Exp $ 2.\" 3.\" Copyright (c) 2000-2001 Michael Shalayeff 4.\" All rights reserved 5.\" 6.\" Redistribution and use in source and binary forms, with or without 7.\" modification, are permitted provided that the following conditions 8.\" are met: 9.\" 1. Redistributions of source code must retain the above copyright 10.\" notice, this list of conditions and the following disclaimer. 11.\" 2. Redistributions in binary form must reproduce the above copyright 12.\" notice, this list of conditions and the following disclaimer in the 13.\" documentation and/or other materials provided with the distribution. 14.\" 15.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR(S) AND CONTRIBUTORS 16.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 17.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 18.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS 19.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR 22.\" BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 23.\" WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 24.\" OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 25.\" ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26.\" 27.Dd $Mdocdate: February 25 2010 $ 28.Dt AUICH 4 29.Os 30.Sh NAME 31.Nm auich 32.Nd Intel ICH integrated AC'97 audio device 33.Sh SYNOPSIS 34.Cd "auich* at pci? flags 0x0000" 35.Cd "audio* at auich?" 36.Sh DESCRIPTION 37The 38.Nm 39driver provides support for the integrated AC'97 audio controller present 40on the Intel ICH I/O controller hub and compatible chipsets. 41.Pp 42Supported chipsets: 43.Pp 44.Bl -bullet -compact -offset indent 45.It 46AMD 768, 8111 47.It 48Intel 6300ESB/6321ESB 49.It 50Intel 82440MX 51.It 52Intel 82801 (ICH, ICH0, ICH2, ICH3, ICH4, ICH5, ICH6, ICH7) 53.It 54NVIDIA nForce, nForce2, nForce3, nForce4 55.It 56SiS 7012 57.El 58.Pp 59The 60.Nm 61DMA engine supports full-duplex operation and has separate channels 62for line input and microphone. 63Unfortunately, simultaneous recording from both line and microphone inputs 64is not supported due to the current 65.Xr ac97 4 66design. 67Setting 68.Ar flags 69to 0x0001 will compensate for machines that have reversed stereo. 70.Sh SEE ALSO 71.Xr ac97 4 , 72.Xr audio 4 , 73.Xr intro 4 , 74.Xr pci 4 75.Sh HISTORY 76The 77.Nm 78device driver appeared in 79.Ox 2.8 . 80.Sh CAVEATS 81Some hardware implementations only support 48kHz sampling rates. 82