1.\" $OpenBSD: asp.4,v 1.5 2001/08/03 15:21:16 mpech Exp $ 2.\" 3.\" 4.\" Copyright (c) 1999 Michael Shalayeff 5.\" All rights reserved. 6.\" 7.\" Redistribution and use in source and binary forms, with or without 8.\" modification, are permitted provided that the following conditions 9.\" are met: 10.\" 1. Redistributions of source code must retain the above copyright 11.\" notice, this list of conditions and the following disclaimer. 12.\" 2. Redistributions in binary form must reproduce the above copyright 13.\" notice, this list of conditions and the following disclaimer in the 14.\" documentation and/or other materials provided with the distribution. 15.\" 3. All advertising materials mentioning features or use of this software 16.\" must display the following acknowledgement: 17.\" This product includes software developed by Michael Shalayeff. 18.\" 4. The name of the author may not be used to endorse or promote products 19.\" derived from this software without specific prior written permission. 20.\" 21.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31.\" 32.Dd April 1, 1999 33.Dt ASP 4 34.Os 35.Sh NAME 36.Nm asp 37.Nd "Core" bus controller as present on HP9000 38715/33, 715/50, 725/50 39workstations 40.Sh SYNOPSIS 41.Cd "asp0 at mainbus? irq 28" 42.Cd "gscbus* at asp?" 43.Sh INTRODUCTION 44The supported Core bus controllers are those present on older PA-RISC(tm) 45workstations, and include: 46.Bl -bullet -compact 47.It 48Core bus controller 49.It 50System Clock 51.It 52Interrupt Controller 53.It 54Real Time Clock Interface 55.It 56RAM and EEPROM controllers 57.El 58.Pp 59The irq level supplied is hardwired to the cpu pin, so changing the value 60would not produce any noticeable results (except lost interrupts for the whole 61I/O subsystem). 62.Sh SEE ALSO 63.Xr gsc 4 , 64.Xr intro 4 , 65.Xr lasi 4 66.Sh HISTORY 67The 68.Nm 69driver 70appeared in 71.Ox 2.4 . 72