xref: /openbsd/share/man/man9/pci_conf_read.9 (revision 274d7c50)
1.\"	$OpenBSD: pci_conf_read.9,v 1.12 2015/02/15 22:26:45 bentley Exp $
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3.\" Copyright (c) 2005 Michael Shalayeff
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18.Dd $Mdocdate: February 15 2015 $
19.Dt PCI_CONF_READ 9
20.Os
21.Sh NAME
22.Nm pci_make_tag ,
23.Nm pci_decompose_tag ,
24.Nm pci_conf_read ,
25.Nm pci_conf_write
26.Nd PCI config space manipulation functions
27.Sh SYNOPSIS
28.In alpha/pci/pci_machdep.h
29.In i386/pci/pci_machdep.h
30.In powerpc/pci/pci_machdep.h
31.In sgi/pci/pci_machdep.h
32.In machine/pci_machdep.h
33.Ft pcitag_t
34.Fn pci_make_tag "pci_chipset_tag_t pc" "int bus" "int dev" "int func"
35.Ft void
36.Fn pci_decompose_tag "pci_chipset_tag_t pc" "pcitag_t tag" "int *busp" \
37"int *devp" "int *funcp"
38.Ft pcireg_t
39.Fn pci_conf_read "pci_chipset_tag_t pc" "pcitag_t tag" "int reg"
40.Ft void
41.Fn pci_conf_write "pci_chipset_tag_t pc" "pcitag_t tag" "int reg" \
42"pcireg_t val"
43.Sh DESCRIPTION
44These functions provide a way to access PCI configuration space.
45.Pp
46The following types are defined in the machine dependent include file
47.In pci_machdep.h .
48.Pp
49.Bl -tag -width pci_chipset_tag_t -offset indent -compact
50.It pci_chipset_tag_t
51a PCI chipset descriptor;
52.It pcitag_t
53a PCI device tag;
54.It pcireg_t
55a PCI register datum.
56.El
57.Pp
58In order to access PCI configuration space, a device tag shall be made using
59.Nm pci_make_tag
60given the PCI chipset tag
61.Ar pc
62and the device specification in a tuple of
63.Ar bus ,
64.Ar device ,
65.Ar function .
66The PCI tag composition is a PCI chipset dependent operation
67although often as simple as a shift and logical OR combination.
68.Pp
69The
70.Nm pci_decompose_tag
71provides a reverse operation.
72Once a tag is composed, it is possible to perform configuration
73space read and write with
74.Nm pci_conf_read
75and
76.Nm pci_conf_write ,
77respectively.
78Access to PCI configuration space is only provided for whole
79.Nm pcireg_t
80items, which is usually a 32-bit integer.
81Access to non-existent PCI devices do not (or should not) generate
82any kinds of faults or interruptions and thus allow for an easy device
83scanning by cycling through all possible device and function numbers
84for a given bus.
85.Pp
86Below is an overview of defined PCI configuration space registers for
87devices:
88.Bl -tag -width 0xff -offset indent
89.It 0x00
90Vendor (lower word) and Product (higher word) identification
91(see
92.Pa /sys/dev/pci/pcidevs
93for a comprehensive list).
94.It 0x04
95Commands and Status register.
96.It 0x08
97PCI device's class and subclass IDs.
98See
99.Pa /sys/dev/pci/pcireg.h
100for PCI_CLASS_* and PCI_SUBCLASS_* definitions.
101.It 0x0c
102Specify (low byte to high): cache line size, PCI latency timer, header type,
103and BIST.
104.It 0x10 - 0x28
105Base address registers for I/O and memory space mapped registers.
106.It 0x28
107CardBus CIS register.
108.It 0x2c
109Similar to 0x00 register's definitions for a subsystem identification.
110.It 0x34
111A pointer to the capabilities list.
112Each item is an offset in the configuration space itself.
113.It 0x3c
114Interrupt line and pin numbers.
115.El
116.Sh SEE ALSO
117.Xr cardbus 4 ,
118.Xr pci 4 ,
119.Xr pci_intr_map 9
120.Sh HISTORY
121These functions first appeared in
122.Ox 1.2 .
123.\" .Sh AUTHORS
124