1 /* $OpenBSD: eisa_machdep.c,v 1.6 2015/09/02 14:07:43 deraadt Exp $ */ 2 /* $NetBSD: eisa_machdep.c,v 1.1 2000/07/29 23:18:47 thorpej Exp $ */ 3 4 /*- 5 * Copyright (c) 2000 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jason R. Thorpe. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/device.h> 36 #include <sys/malloc.h> 37 #include <sys/queue.h> 38 39 #include <machine/intr.h> 40 #include <machine/rpb.h> 41 42 #include <dev/eisa/eisareg.h> 43 #include <dev/eisa/eisavar.h> 44 45 int eisa_compute_maxslots(const char *); 46 47 #define EISA_SLOT_HEADER_SIZE 31 48 #define EISA_SLOT_INFO_OFFSET 20 49 50 #define EISA_FUNC_INFO_OFFSET 34 51 #define EISA_CONFIG_BLOCK_SIZE 320 52 53 #define ECUF_TYPE_STRING 0x01 54 #define ECUF_MEM_ENTRY 0x02 55 #define ECUF_IRQ_ENTRY 0x04 56 #define ECUF_DMA_ENTRY 0x08 57 #define ECUF_IO_ENTRY 0x10 58 #define ECUF_INIT_ENTRY 0x20 59 #define ECUF_DISABLED 0x80 60 61 #define ECUF_SELECTIONS_SIZE 26 62 #define ECUF_TYPE_STRING_SIZE 80 63 #define ECUF_MEM_ENTRY_SIZE 7 64 #define ECUF_IRQ_ENTRY_SIZE 2 65 #define ECUF_DMA_ENTRY_SIZE 2 66 #define ECUF_IO_ENTRY_SIZE 3 67 #define ECUF_INIT_ENTRY_SIZE 60 68 69 #define ECUF_MEM_ENTRY_CNT 9 70 #define ECUF_IRQ_ENTRY_CNT 7 71 #define ECUF_DMA_ENTRY_CNT 4 72 #define ECUF_IO_ENTRY_CNT 20 73 74 #define CBUFSIZE 512 75 76 /* 77 * EISA configuration space, as set up by the ECU, may be sparse. 78 */ 79 bus_size_t eisa_config_stride; 80 paddr_t eisa_config_addr; /* defaults to 0 */ 81 paddr_t eisa_config_header_addr; 82 83 struct ecu_mem { 84 SIMPLEQ_ENTRY(ecu_mem) ecum_list; 85 bus_addr_t ecum_addr; 86 bus_size_t ecum_size; 87 int ecum_isram; 88 int ecum_decode; 89 int ecum_unitsize; 90 }; 91 92 struct ecu_irq { 93 SIMPLEQ_ENTRY(ecu_irq) ecui_list; 94 int ecui_irq; 95 int ecui_ist; 96 int ecui_shared; 97 }; 98 99 struct ecu_dma { 100 SIMPLEQ_ENTRY(ecu_dma) ecud_list; 101 int ecud_drq; 102 int ecud_shared; 103 int ecud_size; 104 #define ECUD_SIZE_8BIT 0 105 #define ECUD_SIZE_16BIT 1 106 #define ECUD_SIZE_32BIT 2 107 #define ECUD_SIZE_RESERVED 3 108 int ecud_timing; 109 #define ECUD_TIMING_ISA 0 110 #define ECUD_TIMING_TYPEA 1 111 #define ECUD_TIMING_TYPEB 2 112 #define ECUD_TIMING_TYPEC 3 113 }; 114 115 struct ecu_io { 116 SIMPLEQ_ENTRY(ecu_io) ecuio_list; 117 bus_addr_t ecuio_addr; 118 bus_size_t ecuio_size; 119 int ecuio_shared; 120 }; 121 122 struct ecu_func { 123 SIMPLEQ_ENTRY(ecu_func) ecuf_list; 124 int ecuf_funcno; 125 u_int32_t ecuf_id; 126 u_int16_t ecuf_slot_info; 127 u_int16_t ecuf_cfg_ext; 128 u_int8_t ecuf_selections[ECUF_SELECTIONS_SIZE]; 129 u_int8_t ecuf_func_info; 130 u_int8_t ecuf_type_string[ECUF_TYPE_STRING_SIZE]; 131 u_int8_t ecuf_init[ECUF_INIT_ENTRY_SIZE]; 132 SIMPLEQ_HEAD(, ecu_mem) ecuf_mem; 133 SIMPLEQ_HEAD(, ecu_irq) ecuf_irq; 134 SIMPLEQ_HEAD(, ecu_dma) ecuf_dma; 135 SIMPLEQ_HEAD(, ecu_io) ecuf_io; 136 }; 137 138 struct ecu_data { 139 SIMPLEQ_ENTRY(ecu_data) ecud_list; 140 int ecud_slot; 141 u_int8_t ecud_eisaid[EISA_IDSTRINGLEN]; 142 u_int32_t ecud_offset; 143 144 /* General slot info. */ 145 u_int8_t ecud_slot_info; 146 u_int16_t ecud_ecu_major_rev; 147 u_int16_t ecud_ecu_minor_rev; 148 u_int16_t ecud_cksum; 149 u_int16_t ecud_ndevfuncs; 150 u_int8_t ecud_funcinfo; 151 u_int32_t ecud_comp_id; 152 153 /* The functions */ 154 SIMPLEQ_HEAD(, ecu_func) ecud_funcs; 155 }; 156 157 SIMPLEQ_HEAD(, ecu_data) ecu_data_list = 158 SIMPLEQ_HEAD_INITIALIZER(ecu_data_list); 159 160 static void 161 ecuf_init(struct ecu_func *ecuf) 162 { 163 164 memset(ecuf, 0, sizeof(*ecuf)); 165 SIMPLEQ_INIT(&ecuf->ecuf_mem); 166 SIMPLEQ_INIT(&ecuf->ecuf_irq); 167 SIMPLEQ_INIT(&ecuf->ecuf_dma); 168 SIMPLEQ_INIT(&ecuf->ecuf_io); 169 } 170 171 static void 172 eisa_parse_mem(struct ecu_func *ecuf, u_int8_t *dp) 173 { 174 struct ecu_mem *ecum; 175 int i; 176 177 for (i = 0; i < ECUF_MEM_ENTRY_CNT; i++) { 178 ecum = malloc(sizeof(*ecum), M_DEVBUF, M_ZERO|M_WAITOK); 179 180 ecum->ecum_isram = dp[0] & 0x1; 181 ecum->ecum_unitsize = dp[1] & 0x3; 182 ecum->ecum_decode = (dp[1] >> 2) & 0x3; 183 ecum->ecum_addr = (dp[2] | (dp[3] << 8) | (dp[4] << 16)) << 8; 184 ecum->ecum_size = (dp[5] | (dp[6] << 8)) << 10; 185 if (ecum->ecum_size == 0) 186 ecum->ecum_size = (1 << 26); 187 SIMPLEQ_INSERT_TAIL(&ecuf->ecuf_mem, ecum, ecum_list); 188 189 #ifdef EISA_DEBUG 190 printf("MEM 0x%lx 0x%lx %d %d %d\n", 191 ecum->ecum_addr, ecum->ecum_size, 192 ecum->ecum_isram, ecum->ecum_unitsize, 193 ecum->ecum_decode); 194 #endif 195 196 if ((dp[0] & 0x80) == 0) 197 break; 198 dp += ECUF_MEM_ENTRY_SIZE; 199 } 200 } 201 202 static void 203 eisa_parse_irq(struct ecu_func *ecuf, u_int8_t *dp) 204 { 205 struct ecu_irq *ecui; 206 int i; 207 208 for (i = 0; i < ECUF_IRQ_ENTRY_CNT; i++) { 209 ecui = malloc(sizeof(*ecui), M_DEVBUF, M_ZERO|M_WAITOK); 210 211 ecui->ecui_irq = dp[0] & 0xf; 212 ecui->ecui_ist = (dp[0] & 0x20) ? IST_LEVEL : IST_EDGE; 213 ecui->ecui_shared = (dp[0] & 0x40) ? 1 : 0; 214 SIMPLEQ_INSERT_TAIL(&ecuf->ecuf_irq, ecui, ecui_list); 215 216 #ifdef EISA_DEBUG 217 printf("IRQ %d %s%s\n", ecui->ecui_irq, 218 ecui->ecui_ist == IST_LEVEL ? "level" : "edge", 219 ecui->ecui_shared ? " shared" : ""); 220 #endif 221 222 if ((dp[0] & 0x80) == 0) 223 break; 224 dp += ECUF_IRQ_ENTRY_SIZE; 225 } 226 } 227 228 static void 229 eisa_parse_dma(struct ecu_func *ecuf, u_int8_t *dp) 230 { 231 struct ecu_dma *ecud; 232 int i; 233 234 for (i = 0; i < ECUF_DMA_ENTRY_CNT; i++) { 235 ecud = malloc(sizeof(*ecud), M_DEVBUF, M_ZERO|M_WAITOK); 236 237 ecud->ecud_drq = dp[0] & 0x7; 238 ecud->ecud_shared = dp[0] & 0x40; 239 ecud->ecud_size = (dp[1] >> 2) & 0x3; 240 ecud->ecud_timing = (dp[1] >> 4) & 0x3; 241 SIMPLEQ_INSERT_TAIL(&ecuf->ecuf_dma, ecud, ecud_list); 242 243 #ifdef EISA_DEBUG 244 printf("DRQ %d%s %d %d\n", ecud->ecud_drq, 245 ecud->ecud_shared ? " shared" : "", 246 ecud->ecud_size, ecud->ecud_timing); 247 #endif 248 249 if ((dp[0] & 0x80) == 0) 250 break; 251 dp += ECUF_DMA_ENTRY_SIZE; 252 } 253 } 254 255 static void 256 eisa_parse_io(struct ecu_func *ecuf, u_int8_t *dp) 257 { 258 struct ecu_io *ecuio; 259 int i; 260 261 for (i = 0; i < ECUF_IO_ENTRY_CNT; i++) { 262 ecuio = malloc(sizeof(*ecuio), M_DEVBUF, M_ZERO|M_WAITOK); 263 264 ecuio->ecuio_addr = dp[1] | (dp[2] << 8); 265 ecuio->ecuio_size = (dp[0] & 0x1f) + 1; 266 ecuio->ecuio_shared = (dp[0] & 0x40) ? 1 : 0; 267 SIMPLEQ_INSERT_TAIL(&ecuf->ecuf_io, ecuio, ecuio_list); 268 269 #ifdef EISA_DEBUG 270 printf("IO 0x%lx 0x%lx%s\n", ecuio->ecuio_addr, 271 ecuio->ecuio_size, 272 ecuio->ecuio_shared ? " shared" : ""); 273 #endif 274 275 if ((dp[0] & 0x80) == 0) 276 break; 277 dp += ECUF_IO_ENTRY_SIZE; 278 } 279 } 280 281 static void 282 eisa_read_config_bytes(paddr_t addr, void *buf, size_t count) 283 { 284 const u_int8_t *src = (const u_int8_t *)ALPHA_PHYS_TO_K0SEG(addr); 285 u_int8_t *dst = buf; 286 287 for (; count != 0; count--) { 288 *dst++ = *src; 289 src += eisa_config_stride; 290 } 291 } 292 293 static void 294 eisa_read_config_word(paddr_t addr, u_int32_t *valp) 295 { 296 const u_int8_t *src = (const u_int8_t *)ALPHA_PHYS_TO_K0SEG(addr); 297 u_int32_t val = 0; 298 int i; 299 300 for (i = 0; i < sizeof(val); i++) { 301 val |= (u_int32_t)*src << (i * 8); 302 src += eisa_config_stride; 303 } 304 305 *valp = val; 306 } 307 308 static size_t 309 eisa_uncompress(void *cbufp, void *ucbufp, size_t count) 310 { 311 const u_int8_t *cbuf = cbufp; 312 u_int8_t *ucbuf = ucbufp; 313 u_int zeros = 0; 314 315 while (count--) { 316 if (zeros) { 317 zeros--; 318 *ucbuf++ = '\0'; 319 } else if (*cbuf == '\0') { 320 *ucbuf++ = *cbuf++; 321 zeros = *cbuf++ - 1; 322 } else 323 *ucbuf++ = *cbuf++; 324 } 325 326 return ((size_t)cbuf - (size_t)cbufp); 327 } 328 329 void 330 eisa_init(eisa_chipset_tag_t ec) 331 { 332 struct ecu_data *ecud; 333 paddr_t cfgaddr; 334 u_int32_t offset; 335 u_int8_t eisaid[EISA_IDSTRINGLEN]; 336 u_int8_t *cdata, *data; 337 u_int8_t *cdp, *dp; 338 struct ecu_func *ecuf; 339 int i, func; 340 341 /* 342 * Locate EISA configuration space. 343 */ 344 if (hwrpb->rpb_condat_off == 0UL || 345 (hwrpb->rpb_condat_off >> 63) != 0) { 346 printf(": WARNING: no EISA configuration space"); 347 return; 348 } 349 350 if (eisa_config_header_addr) { 351 printf("\n"); 352 panic("eisa_init: EISA config space already initialized"); 353 } 354 355 eisa_config_header_addr = hwrpb->rpb_condat_off; 356 if (eisa_config_stride == 0) 357 eisa_config_stride = 1; 358 359 #ifdef EISA_DEBUG 360 printf("\nEISA config header at 0x%lx\n", eisa_config_header_addr); 361 printf("EISA config at %p\n", eisa_config_addr); 362 printf("EISA config stride: %ld\n", eisa_config_stride); 363 #endif 364 365 /* 366 * Read SLOT 0 (motherboard) id, and decide how many (logical) 367 * slots there are. 368 */ 369 eisa_read_config_bytes(eisa_config_header_addr, eisaid, sizeof(eisaid)); 370 eisaid[EISA_IDSTRINGLEN - 1] = '\0'; /* sanity */ 371 ec->ec_maxslots = eisa_compute_maxslots((const char *)eisaid); 372 printf(": %s, %d slots", (const char *)eisaid, ec->ec_maxslots - 1); 373 374 /* 375 * Read the slot headers, and allocate config structures for 376 * valid slots. 377 */ 378 for (cfgaddr = eisa_config_header_addr, i = 0; 379 i < eisa_maxslots(ec); i++) { 380 eisa_read_config_bytes(cfgaddr, eisaid, sizeof(eisaid)); 381 eisaid[EISA_IDSTRINGLEN - 1] = '\0'; /* sanity */ 382 cfgaddr += sizeof(eisaid) * eisa_config_stride; 383 eisa_read_config_word(cfgaddr, &offset); 384 cfgaddr += sizeof(offset) * eisa_config_stride; 385 386 if (offset != 0 && offset != 0xffffffff) { 387 #ifdef EISA_DEBUG 388 printf("SLOT %d: offset 0x%08x eisaid %s\n", 389 i, offset, eisaid); 390 #endif 391 ecud = malloc(sizeof(*ecud), M_DEVBUF, M_ZERO|M_WAITOK); 392 393 SIMPLEQ_INIT(&ecud->ecud_funcs); 394 395 ecud->ecud_slot = i; 396 memcpy(ecud->ecud_eisaid, eisaid, sizeof(eisaid)); 397 ecud->ecud_offset = offset; 398 SIMPLEQ_INSERT_TAIL(&ecu_data_list, ecud, ecud_list); 399 } 400 } 401 402 /* 403 * Now traverse the valid slots and read the info. 404 */ 405 406 cdata = malloc(CBUFSIZE, M_TEMP, M_ZERO|M_WAITOK); 407 408 data = malloc(CBUFSIZE, M_TEMP, M_ZERO|M_WAITOK); 409 410 SIMPLEQ_FOREACH(ecud, &ecu_data_list, ecud_list) { 411 cfgaddr = eisa_config_addr + ecud->ecud_offset; 412 #ifdef EISA_DEBUG 413 printf("Checking SLOT %d\n", ecud->ecud_slot); 414 printf("Reading config bytes at %p to cdata[0]\n", cfgaddr); 415 #endif 416 eisa_read_config_bytes(cfgaddr, &cdata[0], 1); 417 cfgaddr += eisa_config_stride; 418 419 for (i = 1; i < CBUFSIZE; cfgaddr += eisa_config_stride, i++) { 420 #ifdef EISA_DEBUG 421 printf("Reading config bytes at %p to cdata[%d]\n", 422 cfgaddr, i); 423 #endif 424 eisa_read_config_bytes(cfgaddr, &cdata[i], 1); 425 if (cdata[i - 1] == 0 && cdata[i] == 0) 426 break; 427 } 428 if (i == CBUFSIZE) { 429 /* assume this compressed data invalid */ 430 #ifdef EISA_DEBUG 431 printf("SLOT %d has invalid config\n", ecud->ecud_slot); 432 #endif 433 continue; 434 } 435 436 i++; /* index -> length */ 437 438 #ifdef EISA_DEBUG 439 printf("SLOT %d compressed data length %d:", 440 ecud->ecud_slot, i); 441 { 442 int j; 443 444 for (j = 0; j < i; j++) { 445 if ((j % 16) == 0) 446 printf("\n"); 447 printf("0x%02x ", cdata[j]); 448 } 449 printf("\n"); 450 } 451 #endif 452 453 cdp = cdata; 454 dp = data; 455 456 /* Uncompress the slot header. */ 457 cdp += eisa_uncompress(cdp, dp, EISA_SLOT_HEADER_SIZE); 458 #ifdef EISA_DEBUG 459 printf("SLOT %d uncompressed header data:", 460 ecud->ecud_slot); 461 { 462 int j; 463 464 for (j = 0; j < EISA_SLOT_HEADER_SIZE; j++) { 465 if ((j % 16) == 0) 466 printf("\n"); 467 printf("0x%02x ", dp[j]); 468 } 469 printf("\n"); 470 } 471 #endif 472 473 dp = &data[EISA_SLOT_INFO_OFFSET]; 474 ecud->ecud_slot_info = *dp++; 475 ecud->ecud_ecu_major_rev = *dp++; 476 ecud->ecud_ecu_minor_rev = *dp++; 477 memcpy(&ecud->ecud_cksum, dp, sizeof(ecud->ecud_cksum)); 478 dp += sizeof(ecud->ecud_cksum); 479 ecud->ecud_ndevfuncs = *dp++; 480 ecud->ecud_funcinfo = *dp++; 481 memcpy(&ecud->ecud_comp_id, dp, sizeof(ecud->ecud_comp_id)); 482 dp += sizeof(ecud->ecud_comp_id); 483 484 #ifdef EISA_DEBUG 485 printf("SLOT %d: ndevfuncs %d\n", ecud->ecud_slot, 486 ecud->ecud_ndevfuncs); 487 #endif 488 489 for (func = 0; func < ecud->ecud_ndevfuncs; func++) { 490 dp = data; 491 cdp += eisa_uncompress(cdp, dp, EISA_CONFIG_BLOCK_SIZE); 492 #ifdef EISA_DEBUG 493 printf("SLOT %d:%d uncompressed data:", 494 ecud->ecud_slot, func); 495 { 496 int j; 497 498 for (j = 0; i < EISA_CONFIG_BLOCK_SIZE; j++) { 499 if ((j % 16) == 0) 500 printf("\n"); 501 printf("0x%02x ", dp[j]); 502 } 503 printf("\n"); 504 } 505 #endif 506 507 /* Skip disabled functions. */ 508 if (dp[EISA_FUNC_INFO_OFFSET] & ECUF_DISABLED) { 509 #ifdef EISA_DEBUG 510 printf("SLOT %d:%d disabled\n", 511 ecud->ecud_slot, func); 512 #endif 513 continue; 514 } 515 #ifdef EISA_DEBUG 516 else 517 printf("SLOT %d:%d settings\n", 518 ecud->ecud_slot, func); 519 #endif 520 521 ecuf = malloc(sizeof(*ecuf), M_DEVBUF, M_WAITOK); 522 523 ecuf_init(ecuf); 524 ecuf->ecuf_funcno = func; 525 SIMPLEQ_INSERT_TAIL(&ecud->ecud_funcs, ecuf, 526 ecuf_list); 527 528 memcpy(&ecuf->ecuf_id, dp, sizeof(ecuf->ecuf_id)); 529 dp += sizeof(ecuf->ecuf_id); 530 531 memcpy(&ecuf->ecuf_slot_info, dp, 532 sizeof(ecuf->ecuf_slot_info)); 533 dp += sizeof(ecuf->ecuf_slot_info); 534 535 memcpy(&ecuf->ecuf_cfg_ext, dp, 536 sizeof(ecuf->ecuf_cfg_ext)); 537 dp += sizeof(ecuf->ecuf_cfg_ext); 538 539 memcpy(&ecuf->ecuf_selections, dp, 540 sizeof(ecuf->ecuf_selections)); 541 dp += sizeof(ecuf->ecuf_selections); 542 543 memcpy(&ecuf->ecuf_func_info, dp, 544 sizeof(ecuf->ecuf_func_info)); 545 dp += sizeof(ecuf->ecuf_func_info); 546 547 if (ecuf->ecuf_func_info & ECUF_TYPE_STRING) 548 memcpy(ecuf->ecuf_type_string, dp, 549 sizeof(ecuf->ecuf_type_string)); 550 dp += sizeof(ecuf->ecuf_type_string); 551 552 if (ecuf->ecuf_func_info & ECUF_MEM_ENTRY) 553 eisa_parse_mem(ecuf, dp); 554 dp += ECUF_MEM_ENTRY_SIZE * ECUF_MEM_ENTRY_CNT; 555 556 if (ecuf->ecuf_func_info & ECUF_IRQ_ENTRY) 557 eisa_parse_irq(ecuf, dp); 558 dp += ECUF_IRQ_ENTRY_SIZE * ECUF_IRQ_ENTRY_CNT; 559 560 if (ecuf->ecuf_func_info & ECUF_DMA_ENTRY) 561 eisa_parse_dma(ecuf, dp); 562 dp += ECUF_DMA_ENTRY_SIZE * ECUF_DMA_ENTRY_CNT; 563 564 if (ecuf->ecuf_func_info & ECUF_IO_ENTRY) 565 eisa_parse_io(ecuf, dp); 566 dp += ECUF_IO_ENTRY_SIZE * ECUF_IO_ENTRY_CNT; 567 568 if (ecuf->ecuf_func_info & ECUF_INIT_ENTRY) 569 memcpy(ecuf->ecuf_init, dp, 570 sizeof(ecuf->ecuf_init)); 571 dp += sizeof(ecuf->ecuf_init); 572 } 573 } 574 575 free(cdata, M_TEMP, CBUFSIZE); 576 free(data, M_TEMP, CBUFSIZE); 577 } 578 579 /* 580 * Return the number of logical slots a motherboard supports, 581 * from its signature. 582 */ 583 int 584 eisa_compute_maxslots(const char *idstring) 585 { 586 int nslots; 587 588 if (strcmp(idstring, "DEC2400") == 0) /* Jensen */ 589 nslots = 1 + 6; 590 else if (strcmp(idstring, "DEC2A01") == 0) /* AS 2000/2100 */ 591 nslots = 1 + 8; 592 else if (strcmp(idstring, "DEC5000") == 0) /* AS 1000/600A */ 593 nslots = 1 + 8; 594 else if (strcmp(idstring, "DEC5100") == 0) /* AS 600 */ 595 nslots = 1 + 4; 596 else if (strcmp(idstring, "DEC5301") == 0) /* AS 800 */ 597 nslots = 1 + 3; 598 else if (strcmp(idstring, "DEC6000") == 0) /* AS 8200/8400 */ 599 nslots = 1 + 8; 600 else if (strcmp(idstring, "DEC6400") == 0) /* AS 4x00/1200 */ 601 nslots = 1 + 3; 602 else { 603 /* 604 * Unrecognized design. Not likely to happen, since 605 * Digital ECU will not recognize it either. 606 * But just in case the EISA configuration data badly 607 * fooled us, return the largest possible value. 608 */ 609 nslots = 1 + 8; 610 } 611 612 return nslots; 613 } 614