xref: /openbsd/sys/arch/alpha/include/cpu.h (revision 274d7c50)
1 /* $OpenBSD: cpu.h,v 1.61 2019/03/24 06:19:26 visa Exp $ */
2 /* $NetBSD: cpu.h,v 1.45 2000/08/21 02:03:12 thorpej Exp $ */
3 
4 /*-
5  * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
6  * All rights reserved.
7  *
8  * This code is derived from software contributed to The NetBSD Foundation
9  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10  * NASA Ames Research Center.
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions
14  * are met:
15  * 1. Redistributions of source code must retain the above copyright
16  *    notice, this list of conditions and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31  * POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 /*
35  * Copyright (c) 1988 University of Utah.
36  * Copyright (c) 1982, 1990, 1993
37  *	The Regents of the University of California.  All rights reserved.
38  *
39  * This code is derived from software contributed to Berkeley by
40  * the Systems Programming Group of the University of Utah Computer
41  * Science Department.
42  *
43  * Redistribution and use in source and binary forms, with or without
44  * modification, are permitted provided that the following conditions
45  * are met:
46  * 1. Redistributions of source code must retain the above copyright
47  *    notice, this list of conditions and the following disclaimer.
48  * 2. Redistributions in binary form must reproduce the above copyright
49  *    notice, this list of conditions and the following disclaimer in the
50  *    documentation and/or other materials provided with the distribution.
51  * 3. Neither the name of the University nor the names of its contributors
52  *    may be used to endorse or promote products derived from this software
53  *    without specific prior written permission.
54  *
55  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
56  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
57  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
58  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
59  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
60  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
61  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
62  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
63  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
64  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
65  * SUCH DAMAGE.
66  *
67  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
68  *
69  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
70  */
71 
72 #ifndef _MACHINE_CPU_H_
73 #define _MACHINE_CPU_H_
74 
75 #ifndef NO_IEEE
76 typedef union alpha_s_float {
77 	u_int32_t i;
78 	u_int32_t frac: 23,
79 		exp:   8,
80 		sign:  1;
81 } s_float;
82 
83 typedef union alpha_t_float {
84 	u_int64_t i;
85 	u_int64_t frac: 52,
86 		exp:  11,
87 		sign:  1;
88 } t_float;
89 #endif
90 
91 /*
92  * Exported definitions unique to Alpha cpu support.
93  */
94 
95 #ifdef _KERNEL
96 
97 #include <machine/alpha_cpu.h>
98 #include <machine/frame.h>
99 #include <machine/bus.h>
100 #include <machine/intr.h>
101 #include <sys/cdefs.h>
102 #include <sys/device.h>
103 #include <sys/sched.h>
104 #include <sys/srp.h>
105 
106 struct pcb;
107 struct proc;
108 struct reg;
109 struct rpb;
110 struct trapframe;
111 
112 extern u_long cpu_implver;		/* from IMPLVER instruction */
113 extern u_long cpu_amask;		/* from AMASK instruction */
114 extern int bootdev_debug;
115 extern int alpha_fp_sync_complete;
116 extern int alpha_unaligned_print, alpha_unaligned_fix, alpha_unaligned_sigbus;
117 
118 void	XentArith(u_int64_t, u_int64_t, u_int64_t);		/* MAGIC */
119 void	XentIF(u_int64_t, u_int64_t, u_int64_t);		/* MAGIC */
120 void	XentInt(u_int64_t, u_int64_t, u_int64_t);		/* MAGIC */
121 void	XentMM(u_int64_t, u_int64_t, u_int64_t);		/* MAGIC */
122 void	XentRestart(void);					/* MAGIC */
123 void	XentSys(u_int64_t, u_int64_t, u_int64_t);		/* MAGIC */
124 void	XentUna(u_int64_t, u_int64_t, u_int64_t);		/* MAGIC */
125 void	alpha_init(u_long, u_long, u_long, u_long, u_long);
126 int	alpha_pa_access(u_long);
127 void	ast(struct trapframe *);
128 int	badaddr(void *, size_t);
129 int	badaddr_read(void *, size_t, void *);
130 u_int64_t console_restart(struct trapframe *);
131 void	do_sir(void);
132 void	dumpconf(void);
133 void	exception_return(void);					/* MAGIC */
134 void	frametoreg(struct trapframe *, struct reg *);
135 long	fswintrberr(void);					/* MAGIC */
136 void	init_bootstrap_console(void);
137 void	init_prom_interface(struct rpb *);
138 void	interrupt(unsigned long, unsigned long, unsigned long,
139 	    struct trapframe *);
140 void	machine_check(unsigned long, struct trapframe *, unsigned long,
141 	    unsigned long);
142 u_int64_t hwrpb_checksum(void);
143 void	hwrpb_restart_setup(void);
144 void	regdump(struct trapframe *);
145 void	regtoframe(struct reg *, struct trapframe *);
146 void	savectx(struct pcb *);
147 void    switch_exit(struct proc *);				/* MAGIC */
148 void	switch_trampoline(void);				/* MAGIC */
149 void	syscall(u_int64_t, struct trapframe *);
150 void	trap(unsigned long, unsigned long, unsigned long, unsigned long,
151 	    struct trapframe *);
152 void	trap_init(void);
153 void	enable_nsio_ide(bus_space_tag_t);
154 
155 /* Multiprocessor glue; cpu.c */
156 struct cpu_info;
157 int	cpu_iccb_send(cpuid_t, const char *);
158 void	cpu_iccb_receive(void);
159 void	cpu_hatch(struct cpu_info *);
160 __dead
161 void	cpu_halt(void);
162 void	cpu_halt_secondary(unsigned long);
163 void	cpu_spinup_trampoline(void);				/* MAGIC */
164 void	cpu_pause(unsigned long);
165 void	cpu_resume(unsigned long);
166 
167 /*
168  * Machine check information.
169  */
170 struct mchkinfo {
171 	volatile int mc_expected;	/* machine check is expected */
172 	volatile int mc_received;	/* machine check was received */
173 };
174 
175 struct cpu_info {
176 	/*
177 	 * Private members accessed in assembly with 8 bit offsets.
178 	 */
179 	struct proc *ci_curproc;	/* current owner of the processor */
180 	paddr_t ci_curpcb;		/* PA of current HW PCB */
181 
182 	/*
183 	 * Public members.
184 	 */
185 	struct schedstate_percpu ci_schedstate;	/* scheduler state */
186 #ifdef DIAGNOSTIC
187 	int	ci_mutex_level;
188 #endif
189 	cpuid_t ci_cpuid;		/* our CPU ID */
190 	struct cpu_info *ci_next;
191 	u_int32_t ci_randseed;
192 
193 #if defined(MULTIPROCESSOR)
194 	struct srp_hazard ci_srp_hazards[SRP_HAZARD_NUM];
195 #endif
196 
197 	/*
198 	 * Private members.
199 	 */
200 	struct mchkinfo ci_mcinfo;	/* machine check info */
201 	struct proc *ci_fpcurproc;	/* current owner of the FPU */
202 	struct pcb *ci_idle_pcb;	/* our idle PCB */
203 	paddr_t ci_idle_pcb_paddr;	/* PA of idle PCB */
204 	struct device *ci_dev;		/* pointer to our device */
205 	u_long ci_want_resched;		/* preempt current process */
206 	u_long ci_intrdepth;		/* interrupt trap depth */
207 	struct trapframe *ci_db_regs;	/* registers for debuggers */
208 
209 #if defined(MULTIPROCESSOR)
210 	volatile u_long ci_flags;	/* flags; see below */
211 	volatile u_long ci_ipis;	/* interprocessor interrupts pending */
212 #endif
213 #ifdef GPROF
214 	struct gmonparam *ci_gmon;
215 #endif
216 };
217 
218 #define	CPUF_PRIMARY	0x01		/* CPU is primary CPU */
219 #define	CPUF_RUNNING	0x02		/* CPU is running */
220 #define	CPUF_PAUSED	0x04		/* CPU is paused */
221 #define	CPUF_FPUSAVE	0x08		/* CPU is currently in fpusave_cpu() */
222 
223 void	fpusave_cpu(struct cpu_info *, int);
224 void	fpusave_proc(struct proc *, int);
225 
226 extern	struct cpu_info cpu_info_primary;
227 extern	struct cpu_info *cpu_info_list;
228 
229 #define	CPU_INFO_UNIT(ci)	((ci)->ci_dev ? (ci)->ci_dev->dv_unit : 0)
230 #define	CPU_INFO_ITERATOR		int
231 #define	CPU_INFO_FOREACH(cii, ci)	for (cii = 0, ci = cpu_info_list; \
232 					    ci != NULL; ci = ci->ci_next)
233 
234 #define MAXCPUS	ALPHA_MAXPROCS
235 
236 #if defined(MULTIPROCESSOR)
237 extern	volatile u_long cpus_running;
238 extern	volatile u_long cpus_paused;
239 extern	struct cpu_info *cpu_info[];
240 
241 #define	curcpu()			((struct cpu_info *)alpha_pal_rdval())
242 #define	CPU_IS_PRIMARY(ci)		((ci)->ci_flags & CPUF_PRIMARY)
243 
244 void	cpu_boot_secondary_processors(void);
245 
246 void	cpu_pause_resume(unsigned long, int);
247 void	cpu_pause_resume_all(int);
248 void	cpu_unidle(struct cpu_info *);
249 
250 /*
251  * On the Alpha, interprocessor interrupts come in at device priority
252  * level.  This can cause some problems while waiting for r/w spinlocks
253  * from a high'ish priority level: IPIs that come in will not be processed.
254  * This can lead to deadlock.
255  *
256  * This hook allows IPIs to be processed while a spinlock's interlock
257  * is released.
258  */
259 #define	CPU_BUSY_CYCLE()						\
260 do {									\
261 	struct cpu_info *__ci = curcpu();				\
262 	int __s;							\
263 									\
264 	if (__ci->ci_ipis != 0) {					\
265 		__s = splipi();						\
266 		alpha_ipi_process_with_frame(__ci);			\
267 		splx(__s);						\
268 	}								\
269 } while (0)
270 
271 #else /* ! MULTIPROCESSOR */
272 
273 #define	curcpu()			(&cpu_info_primary)
274 #define	CPU_IS_PRIMARY(ci)		1
275 #define cpu_unidle(ci)			do { /* nothing */ } while (0)
276 #define CPU_BUSY_CYCLE()		do {} while (0)
277 
278 #endif /* MULTIPROCESSOR */
279 
280 
281 #define	curproc		curcpu()->ci_curproc
282 #define	fpcurproc	curcpu()->ci_fpcurproc
283 #define	curpcb		curcpu()->ci_curpcb
284 
285 /*
286  * definitions of cpu-dependent requirements
287  * referenced in generic code
288  */
289 #define	cpu_number()		alpha_pal_whami()
290 
291 /*
292  * Arguments to hardclock and gatherstats encapsulate the previous
293  * machine state in an opaque clockframe.  On the Alpha, we use
294  * what we push on an interrupt (a trapframe).
295  */
296 struct clockframe {
297 	struct trapframe	cf_tf;
298 };
299 #define	CLKF_USERMODE(framep)						\
300 	(((framep)->cf_tf.tf_regs[FRAME_PS] & ALPHA_PSL_USERMODE) != 0)
301 #define	CLKF_PC(framep)		((framep)->cf_tf.tf_regs[FRAME_PC])
302 
303 /*
304  * This isn't perfect; if the clock interrupt comes in before the
305  * r/m/w cycle is complete, we won't be counted... but it's not
306  * like this statistic has to be extremely accurate.
307  */
308 #define	CLKF_INTR(framep)	(curcpu()->ci_intrdepth)
309 
310 /*
311  * This is used during profiling to integrate system time.
312  */
313 #define	PROC_PC(p)	((p)->p_md.md_tf->tf_regs[FRAME_PC])
314 #define	PROC_STACK(p)	((p)->p_md.md_tf->tf_regs[FRAME_SP])
315 
316 /*
317  * Preempt the current process if in interrupt from user mode,
318  * or after the current trap/syscall if in system mode.
319  */
320 #define	need_resched(ci)						\
321 do {									\
322 	(ci)->ci_want_resched = 1;					\
323 	if ((ci)->ci_curproc != NULL)					\
324 		aston((ci)->ci_curproc);				\
325 } while (/*CONSTCOND*/0)
326 #define clear_resched(ci) (ci)->ci_want_resched = 0
327 
328 /*
329  * Give a profiling tick to the current process when the user profiling
330  * buffer pages are invalid.  On the Alpha, request an AST to send us
331  * through trap, marking the proc as needing a profiling tick.
332  */
333 #define	need_proftick(p)	aston(p)
334 
335 /*
336  * Notify the current process (p) that it has a signal pending,
337  * process as soon as possible.
338  */
339 #ifdef MULTIPROCESSOR
340 #define	signotify(p)	do { aston(p); cpu_unidle((p)->p_cpu); } while (0)
341 #else
342 #define signotify(p)	aston(p)
343 #endif
344 
345 #define	aston(p)	((p)->p_md.md_astpending = 1)
346 #endif /* _KERNEL */
347 
348 /*
349  * CTL_MACHDEP definitions.
350  */
351 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
352 #define	CPU_UNALIGNED_PRINT	3	/* int: print unaligned accesses */
353 #define	CPU_UNALIGNED_FIX	4	/* int: fix unaligned accesses */
354 #define	CPU_UNALIGNED_SIGBUS	5	/* int: SIGBUS unaligned accesses */
355 #define	CPU_BOOTED_KERNEL	6	/* string: booted kernel name */
356 #define	CPU_FP_SYNC_COMPLETE	7	/* int: always fixup sync fp traps */
357 #define CPU_CHIPSET		8	/* chipset information */
358 #define CPU_ALLOWAPERTURE	9
359 #define	CPU_LED_BLINK		10	/* int: blink leds on DEC 3000 */
360 
361 #define	CPU_MAXID		11	/* valid machdep IDs */
362 
363 #define CPU_CHIPSET_MEM		1	/* PCI memory address */
364 #define CPU_CHIPSET_BWX		2	/* PCI supports BWX */
365 #define CPU_CHIPSET_TYPE	3	/* PCI chipset name */
366 #define CPU_CHIPSET_DENSE	4	/* PCI chipset dense memory addr */
367 #define CPU_CHIPSET_PORTS	5	/* PCI port address */
368 #define CPU_CHIPSET_HAE_MASK	6	/* PCI chipset mask for HAE register */
369 #define CPU_CHIPSET_MAXID	7
370 
371 #define	CTL_MACHDEP_NAMES { \
372 	{ 0, 0 }, \
373 	{ "console_device", CTLTYPE_STRUCT }, \
374 	{ 0, 0 }, \
375 	{ "unaligned_print", CTLTYPE_INT }, \
376 	{ "unaligned_fix", CTLTYPE_INT }, \
377 	{ "unaligned_sigbus", CTLTYPE_INT }, \
378 	{ "booted_kernel", CTLTYPE_STRING }, \
379 	{ "fp_sync_complete", CTLTYPE_INT }, \
380 	{ "chipset", CTLTYPE_NODE }, \
381 	{ "allowaperture", CTLTYPE_INT }, \
382 	{ "led_blink", CTLTYPE_INT } \
383 }
384 
385 #define CTL_CHIPSET_NAMES { \
386 	{ 0, 0 }, \
387 	{ "memory", CTLTYPE_QUAD }, \
388 	{ "bwx", CTLTYPE_INT }, \
389 	{ "type", CTLTYPE_STRING }, \
390 	{ "dense_base", CTLTYPE_QUAD }, \
391 	{ "ports_base", CTLTYPE_QUAD }, \
392 	{ "hae_mask", CTLTYPE_QUAD }, \
393 }
394 
395 #ifdef _KERNEL
396 
397 struct pcb;
398 struct proc;
399 struct reg;
400 struct rpb;
401 struct trapframe;
402 
403 /* IEEE and VAX FP completion */
404 
405 #ifndef NO_IEEE
406 void alpha_sts(int, s_float *);					/* MAGIC */
407 void alpha_stt(int, t_float *);					/* MAGIC */
408 void alpha_lds(int, s_float *);					/* MAGIC */
409 void alpha_ldt(int, t_float *);					/* MAGIC */
410 
411 uint64_t alpha_read_fpcr(void);					/* MAGIC */
412 void alpha_write_fpcr(u_int64_t);				/* MAGIC */
413 
414 u_int64_t alpha_read_fp_c(struct proc *);
415 void alpha_write_fp_c(struct proc *, u_int64_t);
416 
417 int alpha_fp_complete(u_long, u_long, struct proc *, u_int64_t *);
418 int alpha_fp_complete_at(u_long, struct proc *, u_int64_t *);
419 #endif
420 
421 void alpha_enable_fp(struct proc *, int);
422 
423 #ifdef MULTIPROCESSOR
424 #include <sys/mplock.h>
425 #endif
426 
427 static inline u_long
428 intr_disable(void)
429 {
430 	return (u_long)splhigh();
431 }
432 
433 static inline void
434 intr_restore(u_long s)
435 {
436 	splx((int)s);
437 }
438 
439 #endif /* _KERNEL */
440 #endif /* _MACHINE_CPU_H_ */
441