xref: /openbsd/sys/arch/alpha/include/pte.h (revision 21c23d01)
1*21c23d01Smiod /* $OpenBSD: pte.h,v 1.12 2014/01/26 17:40:11 miod Exp $ */
2aed035abSart /* $NetBSD: pte.h,v 1.26 1999/04/09 00:38:11 thorpej Exp $ */
3aed035abSart 
4aed035abSart /*-
5aed035abSart  * Copyright (c) 1998 The NetBSD Foundation, Inc.
6aed035abSart  * All rights reserved.
7aed035abSart  *
8aed035abSart  * This code is derived from software contributed to The NetBSD Foundation
9aed035abSart  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10aed035abSart  * NASA Ames Research Center.
11aed035abSart  *
12aed035abSart  * Redistribution and use in source and binary forms, with or without
13aed035abSart  * modification, are permitted provided that the following conditions
14aed035abSart  * are met:
15aed035abSart  * 1. Redistributions of source code must retain the above copyright
16aed035abSart  *    notice, this list of conditions and the following disclaimer.
17aed035abSart  * 2. Redistributions in binary form must reproduce the above copyright
18aed035abSart  *    notice, this list of conditions and the following disclaimer in the
19aed035abSart  *    documentation and/or other materials provided with the distribution.
20aed035abSart  *
21aed035abSart  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22aed035abSart  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23aed035abSart  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24aed035abSart  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25aed035abSart  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26aed035abSart  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27aed035abSart  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28aed035abSart  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29aed035abSart  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30aed035abSart  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31aed035abSart  * POSSIBILITY OF SUCH DAMAGE.
32aed035abSart  */
33df930be7Sderaadt 
34df930be7Sderaadt /*
353a630e3fSniklas  * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
36df930be7Sderaadt  * All rights reserved.
37df930be7Sderaadt  *
38df930be7Sderaadt  * Author: Chris G. Demetriou
39df930be7Sderaadt  *
40df930be7Sderaadt  * Permission to use, copy, modify and distribute this software and
41df930be7Sderaadt  * its documentation is hereby granted, provided that both the copyright
42df930be7Sderaadt  * notice and this permission notice appear in all copies of the
43df930be7Sderaadt  * software, derivative works or modified versions, and any portions
44df930be7Sderaadt  * thereof, and that both notices appear in supporting documentation.
45df930be7Sderaadt  *
46df930be7Sderaadt  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
47df930be7Sderaadt  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
48df930be7Sderaadt  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
49df930be7Sderaadt  *
50df930be7Sderaadt  * Carnegie Mellon requests users of this software to return to
51df930be7Sderaadt  *
52df930be7Sderaadt  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
53df930be7Sderaadt  *  School of Computer Science
54df930be7Sderaadt  *  Carnegie Mellon University
55df930be7Sderaadt  *  Pittsburgh PA 15213-3890
56df930be7Sderaadt  *
57df930be7Sderaadt  * any improvements or extensions that they make and grant Carnegie the
58df930be7Sderaadt  * rights to redistribute these changes.
59df930be7Sderaadt  */
60df930be7Sderaadt 
612fa72412Spirofti #ifndef _MACHINE_PTE_H_
622fa72412Spirofti #define	_MACHINE_PTE_H_
63aed035abSart 
64df930be7Sderaadt /*
65df930be7Sderaadt  * Alpha page table entry.
66df930be7Sderaadt  * Things which are in the VMS PALcode but not in the OSF PALcode
67df930be7Sderaadt  * are marked with "(VMS)".
68df930be7Sderaadt  *
69df930be7Sderaadt  * This information derived from pp. (II) 3-3 - (II) 3-6 and
70df930be7Sderaadt  * (III) 3-3 - (III) 3-5 of the "Alpha Architecture Reference Manual" by
71df930be7Sderaadt  * Richard L. Sites.
72df930be7Sderaadt  */
73df930be7Sderaadt 
74df930be7Sderaadt /*
75df930be7Sderaadt  * Alpha Page Table Entry
76df930be7Sderaadt  */
7750ce9ee0Sniklas 
7850ce9ee0Sniklas #include <machine/alpha_cpu.h>
7950ce9ee0Sniklas 
8050ce9ee0Sniklas typedef	alpha_pt_entry_t	pt_entry_t;
8150ce9ee0Sniklas 
82df930be7Sderaadt #define	PT_ENTRY_NULL	((pt_entry_t *) 0)
83df930be7Sderaadt #define	PTESHIFT	3			/* pte size == 1 << PTESHIFT */
84df930be7Sderaadt 
8550ce9ee0Sniklas #define	PG_V		ALPHA_PTE_VALID
8650ce9ee0Sniklas #define	PG_NV		0
8750ce9ee0Sniklas #define	PG_FOR		ALPHA_PTE_FAULT_ON_READ
8850ce9ee0Sniklas #define	PG_FOW		ALPHA_PTE_FAULT_ON_WRITE
8950ce9ee0Sniklas #define	PG_FOE		ALPHA_PTE_FAULT_ON_EXECUTE
9050ce9ee0Sniklas #define	PG_ASM		ALPHA_PTE_ASM
9150ce9ee0Sniklas #define	PG_GH		ALPHA_PTE_GRANULARITY
9250ce9ee0Sniklas #define	PG_KRE		ALPHA_PTE_KR
9350ce9ee0Sniklas #define	PG_URE		ALPHA_PTE_UR
9450ce9ee0Sniklas #define	PG_KWE		ALPHA_PTE_KW
9550ce9ee0Sniklas #define	PG_UWE		ALPHA_PTE_UW
96438fd324Smiod #define	PG_PROT		(ALPHA_PTE_PROT | PG_EXEC | PG_FOE)
97aed035abSart #define	PG_RSVD		0x000000000000cc80	/* Reserved for hardware */
98df930be7Sderaadt #define	PG_WIRED	0x0000000000010000	/* Wired. [SOFTWARE] */
99aed035abSart #define	PG_PVLIST	0x0000000000020000	/* on pv list [SOFTWARE] */
100aed035abSart #define	PG_EXEC		0x0000000000040000	/* execute perms [SOFTWARE] */
101*21c23d01Smiod #define	PG_FRAME	ALPHA_PTE_PFN
102df930be7Sderaadt #define	PG_SHIFT	32
10350ce9ee0Sniklas #define	PG_PFNUM(x)	ALPHA_PTE_TO_PFN(x)
104df930be7Sderaadt 
105aed035abSart /*
106aed035abSart  * These are the PALcode PTE bits that we care about when checking to see
107aed035abSart  * if a PTE has changed in such a way as to require a TBI.
108aed035abSart  */
109aed035abSart #define	PG_PALCODE(x)	((x) & ALPHA_PTE_PALCODE)
110df930be7Sderaadt 
111aed035abSart #if defined(_KERNEL) || defined(__KVM_ALPHA_PRIVATE)
112aed035abSart #define	NPTEPG_SHIFT	(PAGE_SHIFT - PTESHIFT)
113aed035abSart #define	NPTEPG		(1L << NPTEPG_SHIFT)
114df930be7Sderaadt 
115df930be7Sderaadt #define	PTEMASK		(NPTEPG - 1)
11650ce9ee0Sniklas 
117aed035abSart #define	l3pte_index(va)	\
118aed035abSart 	(((vaddr_t)(va) >> PAGE_SHIFT) & PTEMASK)
119df930be7Sderaadt 
120aed035abSart #define	l2pte_index(va)	\
121aed035abSart 	(((vaddr_t)(va) >> (PAGE_SHIFT + NPTEPG_SHIFT)) & PTEMASK)
122aed035abSart 
123aed035abSart #define	l1pte_index(va) \
124aed035abSart 	(((vaddr_t)(va) >> (PAGE_SHIFT + 2 * NPTEPG_SHIFT)) & PTEMASK)
125aed035abSart 
126aed035abSart #define	VPT_INDEX(va)	\
127aed035abSart 	(((vaddr_t)(va) >> PAGE_SHIFT) & ((1 << 3 * NPTEPG_SHIFT) - 1))
128aed035abSart 
129aed035abSart /* Space mapped by one level 1 PTE */
130aed035abSart #define	ALPHA_L1SEG_SIZE	(1L << ((2 * NPTEPG_SHIFT) + PAGE_SHIFT))
131aed035abSart 
132aed035abSart /* Space mapped by one level 2 PTE */
133aed035abSart #define	ALPHA_L2SEG_SIZE	(1L << (NPTEPG_SHIFT + PAGE_SHIFT))
134aed035abSart 
135aed035abSart #define	alpha_trunc_l1seg(x)	(((u_long)(x)) & ~(ALPHA_L1SEG_SIZE-1))
136aed035abSart #define	alpha_trunc_l2seg(x)	(((u_long)(x)) & ~(ALPHA_L2SEG_SIZE-1))
137aed035abSart #endif /* _KERNEL || __KVM_ALPHA_PRIVATE */
138df930be7Sderaadt 
13934fbf6deSderaadt #ifdef _KERNEL
140aed035abSart extern	pt_entry_t *kernel_lev1map;	/* kernel level 1 page table */
141aed035abSart #endif /* _KERNEL */
142df930be7Sderaadt 
1432fa72412Spirofti #endif /* ! _MACHINE_PTE_H_ */
144