xref: /openbsd/sys/arch/alpha/pci/cia_bus_io.c (revision 3d8817e4)
1 /*	$OpenBSD: cia_bus_io.c,v 1.8 2001/11/06 19:53:13 miod Exp $	*/
2 /*	$NetBSD: cia_bus_io.c,v 1.6 1996/11/25 03:46:07 cgd Exp $	*/
3 
4 /*
5  * Copyright (c) 1996 Carnegie-Mellon University.
6  * All rights reserved.
7  *
8  * Author: Chris G. Demetriou
9  *
10  * Permission to use, copy, modify and distribute this software and
11  * its documentation is hereby granted, provided that both the copyright
12  * notice and this permission notice appear in all copies of the
13  * software, derivative works or modified versions, and any portions
14  * thereof, and that both notices appear in supporting documentation.
15  *
16  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
17  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
18  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
19  *
20  * Carnegie Mellon requests users of this software to return to
21  *
22  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
23  *  School of Computer Science
24  *  Carnegie Mellon University
25  *  Pittsburgh PA 15213-3890
26  *
27  * any improvements or extensions that they make and grant Carnegie the
28  * rights to redistribute these changes.
29  */
30 
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/malloc.h>
34 #include <sys/syslog.h>
35 #include <sys/device.h>
36 #include <uvm/uvm_extern.h>
37 
38 #include <machine/bus.h>
39 
40 #include <alpha/pci/ciareg.h>
41 #include <alpha/pci/ciavar.h>
42 
43 #define	CHIP		cia
44 
45 #define	CHIP_EX_MALLOC_SAFE(v)	(((struct cia_config *)(v))->cc_mallocsafe)
46 #define	CHIP_IO_EXTENT(v)	(((struct cia_config *)(v))->cc_io_ex)
47 
48 /* IO region 1 */
49 #define CHIP_IO_W1_BUS_START(v)						\
50 	    HAE_IO_REG1_START(((struct cia_config *)(v))->cc_hae_io)
51 #define CHIP_IO_W1_BUS_END(v)						\
52 	    (CHIP_IO_W1_BUS_START(v) + HAE_IO_REG1_MASK)
53 #define CHIP_IO_W1_SYS_START(v)						\
54 	    CIA_PCI_SIO1
55 #define CHIP_IO_W1_SYS_END(v)						\
56 	    (CIA_PCI_SIO1 + ((HAE_IO_REG1_MASK + 1) << 5) - 1)
57 
58 /* IO region 2 */
59 #define CHIP_IO_W2_BUS_START(v)						\
60 	    HAE_IO_REG2_START(((struct cia_config *)(v))->cc_hae_io)
61 #define CHIP_IO_W2_BUS_END(v)						\
62 	    (CHIP_IO_W2_BUS_START(v) + HAE_IO_REG2_MASK)
63 #define CHIP_IO_W2_SYS_START(v)						\
64 	    CIA_PCI_SIO2
65 #define CHIP_IO_W2_SYS_END(v)						\
66 	    (CIA_PCI_SIO2 + ((HAE_IO_REG2_MASK + 1) << 5) - 1)
67 
68 #include "pci_swiz_bus_io_chipdep.c"
69