1 /* $OpenBSD: mcpcia_pci.c,v 1.1 2007/03/16 21:22:27 robert Exp $ */ 2 /* $NetBSD: mcpcia_pci.c,v 1.5 2007/03/04 05:59:11 christos Exp $ */ 3 4 /* 5 * Copyright (c) 1998 by Matthew Jacob 6 * NASA AMES Research Center. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice immediately at the beginning of the file, without modification, 14 * this list of conditions, and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 25 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 */ 33 34 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/device.h> 39 40 #include <uvm/uvm_extern.h> 41 42 #include <dev/pci/pcireg.h> 43 #include <dev/pci/pcivar.h> 44 #include <alpha/pci/mcpciareg.h> 45 #include <alpha/pci/mcpciavar.h> 46 47 #define KV(_addr) ((void *)ALPHA_PHYS_TO_K0SEG((_addr))) 48 49 static void mcpcia_attach_hook (struct device *, struct device *, 50 struct pcibus_attach_args *); 51 static int 52 mcpcia_bus_maxdevs (void *, int); 53 static pcitag_t 54 mcpcia_make_tag (void *, int, int, int); 55 static void 56 mcpcia_decompose_tag (void *, pcitag_t, int *, int *, int *); 57 static pcireg_t 58 mcpcia_conf_read (void *, pcitag_t, int); 59 static void 60 mcpcia_conf_write (void *, pcitag_t, int, pcireg_t); 61 62 void 63 mcpcia_pci_init(pc, v) 64 pci_chipset_tag_t pc; 65 void *v; 66 { 67 pc->pc_conf_v = v; 68 pc->pc_attach_hook = mcpcia_attach_hook; 69 pc->pc_bus_maxdevs = mcpcia_bus_maxdevs; 70 pc->pc_make_tag = mcpcia_make_tag; 71 pc->pc_decompose_tag = mcpcia_decompose_tag; 72 pc->pc_conf_read = mcpcia_conf_read; 73 pc->pc_conf_write = mcpcia_conf_write; 74 } 75 76 static void 77 mcpcia_attach_hook(parent, self, pba) 78 struct device *parent, *self; 79 struct pcibus_attach_args *pba; 80 { 81 } 82 83 static int 84 mcpcia_bus_maxdevs(cpv, busno) 85 void *cpv; 86 int busno; 87 { 88 return (MCPCIA_MAXDEV); 89 } 90 91 static pcitag_t 92 mcpcia_make_tag(cpv, b, d, f) 93 void *cpv; 94 int b, d, f; 95 { 96 pcitag_t tag; 97 tag = (b << 21) | (d << 16) | (f << 13); 98 return (tag); 99 } 100 101 static void 102 mcpcia_decompose_tag(cpv, tag, bp, dp, fp) 103 void *cpv; 104 pcitag_t tag; 105 int *bp, *dp, *fp; 106 { 107 if (bp != NULL) 108 *bp = (tag >> 21) & 0xff; 109 if (dp != NULL) 110 *dp = (tag >> 16) & 0x1f; 111 if (fp != NULL) 112 *fp = (tag >> 13) & 0x7; 113 } 114 115 static pcireg_t 116 mcpcia_conf_read(cpv, tag, offset) 117 void *cpv; 118 pcitag_t tag; 119 int offset; 120 { 121 struct mcpcia_config *ccp = cpv; 122 pcireg_t *dp, data = (pcireg_t) -1; 123 unsigned long paddr; 124 125 /* 126 * There's nothing in slot 0 on a primary bus- don't even try. 127 */ 128 if ((tag >> 21) == 0 && ((u_int32_t) tag & 0x1f0000) == 0) 129 return (data); 130 131 if (ccp == NULL) { 132 panic("NULL ccp in mcpcia_conf_read"); 133 } 134 paddr = (unsigned long) tag; 135 paddr |= (3LL << 3); /* 32 Bit PCI byte enables */ 136 paddr |= ((unsigned long) ((offset >> 2) << 7)); 137 paddr |= MCPCIA_PCI_CONF; 138 paddr |= ccp->cc_sysbase; 139 dp = (pcireg_t *)KV(paddr); 140 if (badaddr(dp, sizeof (*dp)) == 0) { 141 data = *dp; 142 } 143 return (data); 144 } 145 146 static void 147 mcpcia_conf_write(cpv, tag, offset, data) 148 void *cpv; 149 pcitag_t tag; 150 int offset; 151 pcireg_t data; 152 { 153 struct mcpcia_config *ccp = cpv; 154 pcireg_t *dp; 155 unsigned long paddr; 156 157 /* 158 * There's nothing in slot 0 on a primary bus- don't even try. 159 */ 160 if ((tag >> 21) == 0 && ((u_int32_t) tag & 0x1f0000) == 0) 161 return; 162 163 if (ccp == NULL) { 164 panic("NULL ccp in mcpcia_conf_write"); 165 } 166 paddr = (unsigned long) tag; 167 paddr |= (3LL << 3); /* 32 Bit PCI byte enables */ 168 paddr |= ((unsigned long) ((offset >> 2) << 7)); 169 paddr |= MCPCIA_PCI_CONF; 170 paddr |= ccp->cc_sysbase; 171 172 dp = (pcireg_t *)KV(paddr); 173 *dp = data; 174 } 175