1 /* $OpenBSD: mcpcia_pci.c,v 1.2 2010/12/04 17:06:31 miod Exp $ */ 2 /* $NetBSD: mcpcia_pci.c,v 1.5 2007/03/04 05:59:11 christos Exp $ */ 3 4 /* 5 * Copyright (c) 1998 by Matthew Jacob 6 * NASA AMES Research Center. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice immediately at the beginning of the file, without modification, 14 * this list of conditions, and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 25 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 */ 33 34 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/device.h> 39 40 #include <uvm/uvm_extern.h> 41 42 #include <dev/pci/pcireg.h> 43 #include <dev/pci/pcivar.h> 44 #include <alpha/pci/mcpciareg.h> 45 #include <alpha/pci/mcpciavar.h> 46 47 #define KV(_addr) ((void *)ALPHA_PHYS_TO_K0SEG((_addr))) 48 49 void mcpcia_attach_hook(struct device *, struct device *, 50 struct pcibus_attach_args *); 51 int mcpcia_bus_maxdevs(void *, int); 52 pcitag_t mcpcia_make_tag(void *, int, int, int); 53 void mcpcia_decompose_tag(void *, pcitag_t, int *, int *, int *); 54 int mcpcia_conf_size(void *, pcitag_t); 55 pcireg_t mcpcia_conf_read(void *, pcitag_t, int); 56 void mcpcia_conf_write(void *, pcitag_t, int, pcireg_t); 57 58 void 59 mcpcia_pci_init(pc, v) 60 pci_chipset_tag_t pc; 61 void *v; 62 { 63 pc->pc_conf_v = v; 64 pc->pc_attach_hook = mcpcia_attach_hook; 65 pc->pc_bus_maxdevs = mcpcia_bus_maxdevs; 66 pc->pc_make_tag = mcpcia_make_tag; 67 pc->pc_decompose_tag = mcpcia_decompose_tag; 68 pc->pc_conf_size = mcpcia_conf_size; 69 pc->pc_conf_read = mcpcia_conf_read; 70 pc->pc_conf_write = mcpcia_conf_write; 71 } 72 73 void 74 mcpcia_attach_hook(parent, self, pba) 75 struct device *parent, *self; 76 struct pcibus_attach_args *pba; 77 { 78 } 79 80 int 81 mcpcia_bus_maxdevs(cpv, busno) 82 void *cpv; 83 int busno; 84 { 85 return (MCPCIA_MAXDEV); 86 } 87 88 pcitag_t 89 mcpcia_make_tag(cpv, b, d, f) 90 void *cpv; 91 int b, d, f; 92 { 93 pcitag_t tag; 94 tag = (b << 21) | (d << 16) | (f << 13); 95 return (tag); 96 } 97 98 void 99 mcpcia_decompose_tag(cpv, tag, bp, dp, fp) 100 void *cpv; 101 pcitag_t tag; 102 int *bp, *dp, *fp; 103 { 104 if (bp != NULL) 105 *bp = (tag >> 21) & 0xff; 106 if (dp != NULL) 107 *dp = (tag >> 16) & 0x1f; 108 if (fp != NULL) 109 *fp = (tag >> 13) & 0x7; 110 } 111 112 int 113 mcpcia_conf_size(void *cpv, pcitag_t tag) 114 { 115 return PCI_CONFIG_SPACE_SIZE; 116 } 117 118 pcireg_t 119 mcpcia_conf_read(cpv, tag, offset) 120 void *cpv; 121 pcitag_t tag; 122 int offset; 123 { 124 struct mcpcia_config *ccp = cpv; 125 pcireg_t *dp, data = (pcireg_t) -1; 126 unsigned long paddr; 127 128 /* 129 * There's nothing in slot 0 on a primary bus- don't even try. 130 */ 131 if ((tag >> 21) == 0 && ((u_int32_t) tag & 0x1f0000) == 0) 132 return (data); 133 134 if (ccp == NULL) { 135 panic("NULL ccp in mcpcia_conf_read"); 136 } 137 paddr = (unsigned long) tag; 138 paddr |= (3LL << 3); /* 32 Bit PCI byte enables */ 139 paddr |= ((unsigned long) ((offset >> 2) << 7)); 140 paddr |= MCPCIA_PCI_CONF; 141 paddr |= ccp->cc_sysbase; 142 dp = (pcireg_t *)KV(paddr); 143 if (badaddr(dp, sizeof (*dp)) == 0) { 144 data = *dp; 145 } 146 return (data); 147 } 148 149 void 150 mcpcia_conf_write(cpv, tag, offset, data) 151 void *cpv; 152 pcitag_t tag; 153 int offset; 154 pcireg_t data; 155 { 156 struct mcpcia_config *ccp = cpv; 157 pcireg_t *dp; 158 unsigned long paddr; 159 160 /* 161 * There's nothing in slot 0 on a primary bus- don't even try. 162 */ 163 if ((tag >> 21) == 0 && ((u_int32_t) tag & 0x1f0000) == 0) 164 return; 165 166 if (ccp == NULL) { 167 panic("NULL ccp in mcpcia_conf_write"); 168 } 169 paddr = (unsigned long) tag; 170 paddr |= (3LL << 3); /* 32 Bit PCI byte enables */ 171 paddr |= ((unsigned long) ((offset >> 2) << 7)); 172 paddr |= MCPCIA_PCI_CONF; 173 paddr |= ccp->cc_sysbase; 174 175 dp = (pcireg_t *)KV(paddr); 176 *dp = data; 177 } 178