xref: /openbsd/sys/arch/alpha/pci/pci_axppci_33.c (revision 7b36286a)
1 /*	$OpenBSD: pci_axppci_33.c,v 1.19 2008/07/22 18:45:51 miod Exp $	*/
2 /*	$NetBSD: pci_axppci_33.c,v 1.10 1996/11/13 21:13:29 cgd Exp $	*/
3 
4 /*
5  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
6  * All rights reserved.
7  *
8  * Authors: Jeffrey Hsu and Chris G. Demetriou
9  *
10  * Permission to use, copy, modify and distribute this software and
11  * its documentation is hereby granted, provided that both the copyright
12  * notice and this permission notice appear in all copies of the
13  * software, derivative works or modified versions, and any portions
14  * thereof, and that both notices appear in supporting documentation.
15  *
16  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
17  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
18  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
19  *
20  * Carnegie Mellon requests users of this software to return to
21  *
22  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
23  *  School of Computer Science
24  *  Carnegie Mellon University
25  *  Pittsburgh PA 15213-3890
26  *
27  * any improvements or extensions that they make and grant Carnegie the
28  * rights to redistribute these changes.
29  */
30 
31 #include <sys/types.h>
32 #include <sys/param.h>
33 #include <sys/time.h>
34 #include <sys/systm.h>
35 #include <sys/errno.h>
36 #include <sys/device.h>
37 #include <uvm/uvm_extern.h>
38 
39 #include <machine/autoconf.h>
40 #include <machine/bus.h>
41 #include <machine/intr.h>
42 
43 #include <dev/isa/isavar.h>
44 #include <dev/pci/pcireg.h>
45 #include <dev/pci/pcivar.h>
46 
47 #include <alpha/pci/lcavar.h>
48 
49 #include <alpha/pci/pci_axppci_33.h>
50 #include <alpha/pci/siovar.h>
51 #include <alpha/pci/sioreg.h>
52 
53 #include "sio.h"
54 
55 int     dec_axppci_33_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
56 const char *dec_axppci_33_intr_string(void *, pci_intr_handle_t);
57 int	dec_axppci_33_intr_line(void *, pci_intr_handle_t);
58 void    *dec_axppci_33_intr_establish(void *, pci_intr_handle_t,
59 	    int, int (*func)(void *), void *, char *);
60 void    dec_axppci_33_intr_disestablish(void *, void *);
61 
62 #define	LCA_SIO_DEVICE	7	/* XXX */
63 
64 void
65 pci_axppci_33_pickintr(lcp)
66 	struct lca_config *lcp;
67 {
68 	bus_space_tag_t iot = &lcp->lc_iot;
69 	pci_chipset_tag_t pc = &lcp->lc_pc;
70 	pcireg_t sioclass;
71 	int sioII;
72 
73 	/* XXX MAGIC NUMBER */
74 	sioclass = pci_conf_read(pc, pci_make_tag(pc, 0, LCA_SIO_DEVICE, 0),
75 	    PCI_CLASS_REG);
76         sioII = (sioclass & 0xff) >= 3;
77 
78 	if (!sioII)
79 		printf("WARNING: SIO NOT SIO II... NO BETS...\n");
80 
81 	pc->pc_intr_v = lcp;
82 	pc->pc_intr_map = dec_axppci_33_intr_map;
83 	pc->pc_intr_string = dec_axppci_33_intr_string;
84 	pc->pc_intr_line = dec_axppci_33_intr_line;
85 	pc->pc_intr_establish = dec_axppci_33_intr_establish;
86 	pc->pc_intr_disestablish = dec_axppci_33_intr_disestablish;
87 
88         /* Not supported on AXPpci33. */
89         pc->pc_pciide_compat_intr_establish = NULL;
90         pc->pc_pciide_compat_intr_disestablish = NULL;
91 
92 #if NSIO
93 	sio_intr_setup(pc, iot);
94 #else
95 	panic("pci_axppci_33_pickintr: no I/O interrupt handler (no sio)");
96 #endif
97 }
98 
99 int
100 dec_axppci_33_intr_map(pa, ihp)
101 	struct pci_attach_args *pa;
102 	pci_intr_handle_t *ihp;
103 {
104 	pcitag_t bustag = pa->pa_intrtag;
105 	int buspin = pa->pa_intrpin;
106 	pci_chipset_tag_t pc = pa->pa_pc;
107 	int device, pirq;
108 	pcireg_t pirqreg;
109 	u_int8_t pirqline;
110 
111         if (buspin == 0) {
112                 /* No IRQ used. */
113                 return 1;
114         }
115         if (buspin > 4) {
116                 printf("pci_map_int: bad interrupt pin %d\n", buspin);
117                 return 1;
118         }
119 
120 	pci_decompose_tag(pc, bustag, NULL, &device, NULL);
121 
122 	switch (device) {
123 	case 6:					/* NCR SCSI */
124 		pirq = 3;
125 		break;
126 
127 	case 11:				/* slot 1 */
128 		switch (buspin) {
129 		case PCI_INTERRUPT_PIN_A:
130 		case PCI_INTERRUPT_PIN_D:
131 			pirq = 0;
132 			break;
133 		case PCI_INTERRUPT_PIN_B:
134 			pirq = 2;
135 			break;
136 		case PCI_INTERRUPT_PIN_C:
137 			pirq = 1;
138 			break;
139 #ifdef DIAGNOSTIC
140 		default:			/* XXX gcc -Wuninitialized */
141 			panic("dec_axppci_33_intr_map bogus PCI pin %d",
142 			    buspin);
143 #endif
144 		};
145 		break;
146 
147 	case 12:				/* slot 2 */
148 		switch (buspin) {
149 		case PCI_INTERRUPT_PIN_A:
150 		case PCI_INTERRUPT_PIN_D:
151 			pirq = 1;
152 			break;
153 		case PCI_INTERRUPT_PIN_B:
154 			pirq = 0;
155 			break;
156 		case PCI_INTERRUPT_PIN_C:
157 			pirq = 2;
158 			break;
159 #ifdef DIAGNOSTIC
160 		default:			/* XXX gcc -Wuninitialized */
161 			panic("dec_axppci_33_intr_map bogus PCI pin %d",
162 			    buspin);
163 #endif
164 		};
165 		break;
166 
167 	case 8:				/* slot 3 */
168 		switch (buspin) {
169 		case PCI_INTERRUPT_PIN_A:
170 		case PCI_INTERRUPT_PIN_D:
171 			pirq = 2;
172 			break;
173 		case PCI_INTERRUPT_PIN_B:
174 			pirq = 1;
175 			break;
176 		case PCI_INTERRUPT_PIN_C:
177 			pirq = 0;
178 			break;
179 #ifdef DIAGNOSTIC
180 		default:			/* XXX gcc -Wuninitialized */
181 			panic("dec_axppci_33_intr_map bogus PCI pin %d",
182 			    buspin);
183 #endif
184 		};
185 		break;
186 
187 	default:
188                 printf("dec_axppci_33_intr_map: weird device number %d\n",
189 		    device);
190                 return 1;
191 	}
192 
193 	pirqreg = pci_conf_read(pc, pci_make_tag(pc, 0, LCA_SIO_DEVICE, 0),
194 	    SIO_PCIREG_PIRQ_RTCTRL);
195 #if 0
196 	printf("pci_axppci_33_map_int: device %d pin %c: pirq %d, reg = %x\n",
197 		device, '@' + buspin, pirq, pirqreg);
198 #endif
199 	pirqline = (pirqreg >> (pirq * 8)) & 0xff;
200 	if ((pirqline & 0x80) != 0)
201 		return 1;			/* not routed? */
202 	pirqline &= 0xf;
203 
204 #if 0
205 	printf("pci_axppci_33_map_int: device %d pin %c: mapped to line %d\n",
206 	    device, '@' + buspin, pirqline);
207 #endif
208 
209 	*ihp = pirqline;
210 	return (0);
211 }
212 
213 const char *
214 dec_axppci_33_intr_string(lcv, ih)
215 	void *lcv;
216 	pci_intr_handle_t ih;
217 {
218 	return sio_intr_string(NULL /*XXX*/, ih);
219 }
220 
221 int
222 dec_axppci_33_intr_line(lcv, ih)
223 	void *lcv;
224 	pci_intr_handle_t ih;
225 {
226 	return sio_intr_line(NULL /*XXX*/, ih);
227 }
228 
229 void *
230 dec_axppci_33_intr_establish(lcv, ih, level, func, arg, name)
231 	void *lcv, *arg;
232 	pci_intr_handle_t ih;
233 	int level;
234 	int (*func)(void *);
235 	char *name;
236 {
237 	return sio_intr_establish(NULL /*XXX*/, ih, IST_LEVEL, level, func,
238 	    arg, name);
239 }
240 
241 void
242 dec_axppci_33_intr_disestablish(lcv, cookie)
243 	void *lcv, *cookie;
244 {
245 	sio_intr_disestablish(NULL /*XXX*/, cookie);
246 }
247