xref: /openbsd/sys/arch/alpha/pci/pci_eb64plus.c (revision 3d8817e4)
1 /* $OpenBSD: pci_eb64plus.c,v 1.14 2009/09/30 20:18:06 miod Exp $ */
2 /* $NetBSD: pci_eb64plus.c,v 1.10 2001/07/27 00:25:20 thorpej Exp $ */
3 
4 /*-
5  * Copyright (c) 1998 The NetBSD Foundation, Inc.
6  * All rights reserved.
7  *
8  * This code is derived from software contributed to The NetBSD Foundation
9  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10  * NASA Ames Research Center.
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions
14  * are met:
15  * 1. Redistributions of source code must retain the above copyright
16  *    notice, this list of conditions and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31  * POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 /*
35  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
36  * All rights reserved.
37  *
38  * Author: Chris G. Demetriou
39  *
40  * Permission to use, copy, modify and distribute this software and
41  * its documentation is hereby granted, provided that both the copyright
42  * notice and this permission notice appear in all copies of the
43  * software, derivative works or modified versions, and any portions
44  * thereof, and that both notices appear in supporting documentation.
45  *
46  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
47  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
48  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
49  *
50  * Carnegie Mellon requests users of this software to return to
51  *
52  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
53  *  School of Computer Science
54  *  Carnegie Mellon University
55  *  Pittsburgh PA 15213-3890
56  *
57  * any improvements or extensions that they make and grant Carnegie the
58  * rights to redistribute these changes.
59  */
60 
61 #include <sys/types.h>
62 #include <sys/param.h>
63 #include <sys/time.h>
64 #include <sys/systm.h>
65 #include <sys/errno.h>
66 #include <sys/malloc.h>
67 #include <sys/device.h>
68 #include <sys/syslog.h>
69 
70 #include <uvm/uvm_extern.h>
71 
72 #include <machine/autoconf.h>
73 
74 #include <dev/pci/pcireg.h>
75 #include <dev/pci/pcivar.h>
76 
77 #include <alpha/pci/apecsreg.h>
78 #include <alpha/pci/apecsvar.h>
79 
80 #include <alpha/pci/pci_eb64plus.h>
81 
82 #include "sio.h"
83 #if NSIO
84 #include <alpha/pci/siovar.h>
85 #endif
86 
87 int	dec_eb64plus_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
88 const char *dec_eb64plus_intr_string(void *, pci_intr_handle_t);
89 void	*dec_eb64plus_intr_establish(void *, pci_intr_handle_t,
90 	    int, int (*func)(void *), void *, const char *);
91 void	dec_eb64plus_intr_disestablish(void *, void *);
92 
93 #define	EB64PLUS_MAX_IRQ	32
94 #define	PCI_STRAY_MAX		5
95 
96 struct alpha_shared_intr *eb64plus_pci_intr;
97 
98 bus_space_tag_t eb64plus_intrgate_iot;
99 bus_space_handle_t eb64plus_intrgate_ioh;
100 
101 void	eb64plus_iointr(void *arg, unsigned long vec);
102 extern void	eb64plus_intr_enable(int irq);  /* pci_eb64plus_intr.S */
103 extern void	eb64plus_intr_disable(int irq); /* pci_eb64plus_intr.S */
104 
105 void
106 pci_eb64plus_pickintr(acp)
107 	struct apecs_config *acp;
108 {
109 	bus_space_tag_t iot = &acp->ac_iot;
110 	pci_chipset_tag_t pc = &acp->ac_pc;
111 	int i;
112 
113         pc->pc_intr_v = acp;
114         pc->pc_intr_map = dec_eb64plus_intr_map;
115         pc->pc_intr_string = dec_eb64plus_intr_string;
116         pc->pc_intr_establish = dec_eb64plus_intr_establish;
117         pc->pc_intr_disestablish = dec_eb64plus_intr_disestablish;
118 
119 	/* Not supported on the EB64+. */
120 	pc->pc_pciide_compat_intr_establish = NULL;
121 
122 	eb64plus_intrgate_iot = iot;
123 	if (bus_space_map(eb64plus_intrgate_iot, 0x804, 3, 0,
124 	    &eb64plus_intrgate_ioh) != 0)
125 		panic("pci_eb64plus_pickintr: couldn't map interrupt PLD");
126 	for (i = 0; i < EB64PLUS_MAX_IRQ; i++)
127 		eb64plus_intr_disable(i);
128 
129 	eb64plus_pci_intr = alpha_shared_intr_alloc(EB64PLUS_MAX_IRQ);
130 	for (i = 0; i < EB64PLUS_MAX_IRQ; i++) {
131 		alpha_shared_intr_set_maxstrays(eb64plus_pci_intr, i,
132 			PCI_STRAY_MAX);
133 	}
134 
135 #if NSIO
136 	sio_intr_setup(pc, iot);
137 #endif
138 }
139 
140 int
141 dec_eb64plus_intr_map(pa, ihp)
142 	struct pci_attach_args *pa;
143         pci_intr_handle_t *ihp;
144 {
145 	pcitag_t bustag = pa->pa_intrtag;
146 	int buspin = pa->pa_intrpin, line = pa->pa_intrline;
147 	pci_chipset_tag_t pc = pa->pa_pc;
148 	int bus, device, function;
149 
150 	if (buspin == 0) {
151 		/* No IRQ used. */
152 		return 1;
153 	}
154 	if (buspin > 4) {
155 		printf("dec_eb64plus_intr_map: bad interrupt pin %d\n", buspin);
156 		return 1;
157 	}
158 
159 	pci_decompose_tag(pc, bustag, &bus, &device, &function);
160 
161 	/*
162 	 * The console places the interrupt mapping in the "line" value.
163 	 * A value of (char)-1 indicates there is no mapping.
164 	 */
165 	if (line == 0xff) {
166 		printf("dec_eb64plus_intr_map: no mapping for %d/%d/%d\n",
167 		    bus, device, function);
168 		return (1);
169 	}
170 
171 	if (line >= EB64PLUS_MAX_IRQ)
172 		panic("dec_eb64plus_intr_map: eb64+ irq too large (%d)",
173 		    line);
174 
175 	*ihp = line;
176 	return (0);
177 }
178 
179 const char *
180 dec_eb64plus_intr_string(acv, ih)
181 	void *acv;
182 	pci_intr_handle_t ih;
183 {
184         static char irqstr[15];          /* 11 + 2 + NULL + sanity */
185 
186         if (ih >= EB64PLUS_MAX_IRQ)
187                 panic("dec_eb64plus_intr_string: bogus eb64+ IRQ 0x%lx", ih);
188         snprintf(irqstr, sizeof irqstr, "eb64+ irq %ld", ih);
189         return (irqstr);
190 }
191 
192 void *
193 dec_eb64plus_intr_establish(acv, ih, level, func, arg, name)
194         void *acv;
195         pci_intr_handle_t ih;
196         int level;
197         int (*func)(void *);
198 	void *arg;
199 	const char *name;
200 {
201 	void *cookie;
202 
203 	if (ih >= EB64PLUS_MAX_IRQ)
204 		panic("dec_eb64plus_intr_establish: bogus eb64+ IRQ 0x%lx",
205 		    ih);
206 
207 	cookie = alpha_shared_intr_establish(eb64plus_pci_intr, ih, IST_LEVEL,
208 	    level, func, arg, name);
209 
210 	if (cookie != NULL &&
211 	    alpha_shared_intr_firstactive(eb64plus_pci_intr, ih)) {
212 		scb_set(0x900 + SCB_IDXTOVEC(ih), eb64plus_iointr, NULL);
213 		eb64plus_intr_enable(ih);
214 	}
215 	return (cookie);
216 }
217 
218 void
219 dec_eb64plus_intr_disestablish(acv, cookie)
220         void *acv, *cookie;
221 {
222 	struct alpha_shared_intrhand *ih = cookie;
223 	unsigned int irq = ih->ih_num;
224 	int s;
225 
226 	s = splhigh();
227 
228 	alpha_shared_intr_disestablish(eb64plus_pci_intr, cookie);
229 	if (alpha_shared_intr_isactive(eb64plus_pci_intr, irq) == 0) {
230 		eb64plus_intr_disable(irq);
231 		alpha_shared_intr_set_dfltsharetype(eb64plus_pci_intr, irq,
232 		    IST_NONE);
233 		scb_free(0x900 + SCB_IDXTOVEC(irq));
234 	}
235 
236 	splx(s);
237 }
238 
239 void
240 eb64plus_iointr(arg, vec)
241 	void *arg;
242 	unsigned long vec;
243 {
244 	int irq;
245 
246 	irq = SCB_VECTOIDX(vec - 0x900);
247 
248 	if (!alpha_shared_intr_dispatch(eb64plus_pci_intr, irq)) {
249 		alpha_shared_intr_stray(eb64plus_pci_intr, irq,
250 		    "eb64+ irq");
251 		if (ALPHA_SHARED_INTR_DISABLE(eb64plus_pci_intr, irq))
252 			eb64plus_intr_disable(irq);
253 	} else
254 		alpha_shared_intr_reset_strays(eb64plus_pci_intr, irq);
255 }
256 
257 #if 0		/* THIS DOES NOT WORK!  see pci_eb64plus_intr.S. */
258 u_int8_t eb64plus_intr_mask[3] = { 0xff, 0xff, 0xff };
259 
260 void
261 eb64plus_intr_enable(irq)
262 	int irq;
263 {
264 	int byte = (irq / 8), bit = (irq % 8);
265 
266 #if 1
267 	printf("eb64plus_intr_enable: enabling %d (%d:%d)\n", irq, byte, bit);
268 #endif
269 	eb64plus_intr_mask[byte] &= ~(1 << bit);
270 
271 	bus_space_write_1(eb64plus_intrgate_iot, eb64plus_intrgate_ioh, byte,
272 	    eb64plus_intr_mask[byte]);
273 }
274 
275 void
276 eb64plus_intr_disable(irq)
277 	int irq;
278 {
279 	int byte = (irq / 8), bit = (irq % 8);
280 
281 #if 1
282 	printf("eb64plus_intr_disable: disabling %d (%d:%d)\n", irq, byte, bit);
283 #endif
284 	eb64plus_intr_mask[byte] |= (1 << bit);
285 
286 	bus_space_write_1(eb64plus_intrgate_iot, eb64plus_intrgate_ioh, byte,
287 	    eb64plus_intr_mask[byte]);
288 }
289 #endif
290