1 /* $OpenBSD: i82093reg.h,v 1.3 2008/06/26 05:42:09 ray Exp $ */ 2 /* $NetBSD: i82093reg.h,v 1.1 2003/02/26 21:26:10 fvdl Exp $ */ 3 4 /*- 5 * Copyright (c) 2000 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by RedBack Networks Inc. 10 * 11 * Author: Bill Sommerfeld 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 25 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 /* 36 * Typically, the first apic lives here. 37 */ 38 #define IOAPIC_BASE_DEFAULT 0xfec00000 39 40 /* 41 * Memory-space registers. 42 */ 43 44 /* 45 * The externally visible registers are all 32 bits wide; 46 * store the register number of interest in IOAPIC_REG, and store/fetch 47 * the real value in IOAPIC_DATA. 48 */ 49 50 51 52 #define IOAPIC_REG 0x0000 53 #define IOAPIC_DATA 0x0010 54 55 /* 56 * Internal I/O APIC registers. 57 */ 58 59 #define IOAPIC_ID 0x00 60 61 #define IOAPIC_ID_SHIFT 24 62 #define IOAPIC_ID_MASK 0x0f000000 63 64 /* Version, and maximum interrupt pin number. */ 65 66 #define IOAPIC_VER 0x01 67 68 #define IOAPIC_VER_SHIFT 0 69 #define IOAPIC_VER_MASK 0x000000ff 70 71 #define IOAPIC_MAX_SHIFT 16 72 #define IOAPIC_MAX_MASK 0x00ff0000 73 74 /* 75 * Arbitration ID. Same format as IOAPIC_ID register. 76 */ 77 #define IOAPIC_ARB 0x02 78 79 /* 80 * Redirection table registers. 81 */ 82 83 #define IOAPIC_REDHI(pin) (0x11 + ((pin)<<1)) 84 #define IOAPIC_REDLO(pin) (0x10 + ((pin)<<1)) 85 86 #define IOAPIC_REDHI_DEST_SHIFT 24 /* destination. */ 87 #define IOAPIC_REDHI_DEST_MASK 0xff000000 88 89 #define IOAPIC_REDLO_MASK 0x00010000 /* 0=enabled; 1=masked */ 90 91 #define IOAPIC_REDLO_LEVEL 0x00008000 /* 0=edge, 1=level */ 92 #define IOAPIC_REDLO_RIRR 0x00004000 /* remote IRR; read only */ 93 #define IOAPIC_REDLO_ACTLO 0x00002000 /* 0=act. hi; 1=act. lo */ 94 #define IOAPIC_REDLO_DELSTS 0x00001000 /* 0=idle; 1=send pending */ 95 #define IOAPIC_REDLO_DSTMOD 0x00000800 /* 0=physical; 1=logical */ 96 97 #define IOAPIC_REDLO_DEL_MASK 0x00000700 /* del. mode mask */ 98 #define IOAPIC_REDLO_DEL_SHIFT 8 99 100 #define IOAPIC_REDLO_DEL_FIXED 0 101 #define IOAPIC_REDLO_DEL_LOPRI 1 102 #define IOAPIC_REDLO_DEL_SMI 2 103 #define IOAPIC_REDLO_DEL_NMI 4 104 #define IOAPIC_REDLO_DEL_INIT 5 105 #define IOAPIC_REDLO_DEL_EXTINT 7 106 107 #define IOAPIC_REDLO_VECTOR_MASK 0x000000ff /* delivery vector */ 108 109 #define IMCR_ADDR 0x22 110 #define IMCR_DATA 0x23 111 112 #define IMCR_REGISTER 0x70 113 #define IMCR_PIC 0x00 114 #define IMCR_APIC 0x01 115 116 #ifdef _KERNEL 117 118 #define ioapic_asm_ack(num) \ 119 movl $0,(_C_LABEL(local_apic)+LAPIC_EOI)(%rip) 120 121 #ifdef MULTIPROCESSOR 122 123 #ifdef notyet 124 #define ioapic_asm_lock(num) \ 125 movl $1,%esi ;\ 126 77: \ 127 xchgl %esi,PIC_LOCK(%rdi) ;\ 128 testl %esi,%esi ;\ 129 jne 77b 130 131 #define ioapic_asm_unlock(num) \ 132 movl $0,PIC_LOCK(%rdi) 133 #else 134 #define ioapic_asm_lock(num) 135 #define ioapic_asm_unlock(num) 136 #endif 137 138 #else 139 140 #define ioapic_asm_lock(num) 141 #define ioapic_asm_unlock(num) 142 143 #endif /* MULTIPROCESSOR */ 144 145 146 #define ioapic_mask(num) \ 147 movq IS_PIC(%r14),%rdi ;\ 148 ioapic_asm_lock(num) ;\ 149 movl IS_PIN(%r14),%esi ;\ 150 leaq 0x10(%rsi,%rsi,1),%rsi ;\ 151 movq IOAPIC_SC_REG(%rdi),%r15 ;\ 152 movl %esi, (%r15) ;\ 153 movq IOAPIC_SC_DATA(%rdi),%r15 ;\ 154 movl (%r15),%esi ;\ 155 orl $IOAPIC_REDLO_MASK,%esi ;\ 156 movl %esi,(%r15) ;\ 157 ioapic_asm_unlock(num) 158 159 #define ioapic_unmask(num) \ 160 cmpq $IREENT_MAGIC,(TF_ERR+8)(%rsp) ;\ 161 jne 79f ;\ 162 movq IS_PIC(%r14),%rdi ;\ 163 ioapic_asm_lock(num) ;\ 164 movl IS_PIN(%r14),%esi ;\ 165 leaq 0x10(%rsi,%rsi,1),%rsi ;\ 166 movq IOAPIC_SC_REG(%rdi),%r15 ;\ 167 movq IOAPIC_SC_DATA(%rdi),%r13 ;\ 168 movl %esi, (%r15) ;\ 169 movl (%r13),%r12d ;\ 170 andl $~IOAPIC_REDLO_MASK,%r12d ;\ 171 movl %esi,(%r15) ;\ 172 movl %r12d,(%r13) ;\ 173 ioapic_asm_unlock(num) ;\ 174 79: 175 176 #endif 177