1 /* $OpenBSD: i8259.h,v 1.3 2011/03/23 16:54:34 pirofti Exp $ */ 2 /* $NetBSD: i8259.h,v 1.3 2003/05/04 22:01:56 fvdl Exp $ */ 3 4 /*- 5 * Copyright (c) 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * @(#)icu.h 5.6 (Berkeley) 5/9/91 36 */ 37 38 #ifndef _MACHINE_I8259_H_ 39 #define _MACHINE_I8259_H_ 40 41 #include <dev/isa/isareg.h> 42 43 #ifndef _LOCORE 44 45 /* 46 * Interrupt "level" mechanism variables, masks, and macros 47 */ 48 extern unsigned i8259_imen; /* interrupt mask enable */ 49 extern unsigned i8259_setmask(unsigned); 50 51 #define SET_ICUS() (outb(IO_ICU1 + 1, imen), outb(IO_ICU2 + 1, imen >> 8)) 52 53 extern void i8259_default_setup(void); 54 extern void i8259_reinit(void); 55 56 #endif /* !_LOCORE */ 57 58 /* 59 * Interrupt enable bits -- in order of priority 60 */ 61 #define IRQ_SLAVE 2 62 63 /* 64 * Interrupt Control offset into Interrupt descriptor table (IDT) 65 */ 66 #define ICU_OFFSET 32 /* 0-31 are processor exceptions */ 67 #define ICU_LEN 16 /* 32-47 are ISA interrupts */ 68 69 70 #define ICU_HARDWARE_MASK 71 72 /* 73 * These macros are fairly self explanatory. If ICU_SPECIAL_MASK_MODE is 74 * defined, we try to take advantage of the ICU's `special mask mode' by only 75 * EOIing the interrupts on return. This avoids the requirement of masking and 76 * unmasking. We can't do this without special mask mode, because the ICU 77 * would also hold interrupts that it thinks are of lower priority. 78 * 79 * Many machines do not support special mask mode, so by default we don't try 80 * to use it. 81 */ 82 83 #define IRQ_BIT(num) (1 << ((num) % 8)) 84 #define IRQ_BYTE(num) ((num) >> 3) 85 86 #define i8259_late_ack(num) 87 88 #ifdef ICU_SPECIAL_MASK_MODE 89 90 #define i8259_asm_ack1(num) 91 #define i8259_asm_ack2(num) \ 92 movb $(0x60|IRQ_SLAVE),%al /* specific EOI for IRQ2 */ ;\ 93 outb %al,$IO_ICU1 94 #define i8259_asm_mask(num) 95 #define i8259_asm_unmask(num) \ 96 movb $(0x60|(num%8)),%al /* specific EOI */ ;\ 97 outb %al,$ICUADDR 98 99 #else /* ICU_SPECIAL_MASK_MODE */ 100 101 #ifndef AUTO_EOI_1 102 #define i8259_asm_ack1(num) \ 103 movb $(0x60|(num%8)),%al /* specific EOI */ ;\ 104 outb %al,$IO_ICU1 105 #else 106 #define i8259_asm_ack1(num) 107 #endif 108 109 #ifndef AUTO_EOI_2 110 #define i8259_asm_ack2(num) \ 111 movb $(0x60|(num%8)),%al /* specific EOI */ ;\ 112 outb %al,$IO_ICU2 /* do the second ICU first */ ;\ 113 movb $(0x60|IRQ_SLAVE),%al /* specific EOI for IRQ2 */ ;\ 114 outb %al,$IO_ICU1 115 #else 116 #define i8259_asm_ack2(num) 117 #endif 118 119 #ifdef PIC_MASKDELAY 120 #define MASKDELAY pushl %eax ; inb $0x84,%al ; popl %eax 121 #else 122 #define MASKDELAY 123 #endif 124 125 #ifdef ICU_HARDWARE_MASK 126 127 #define i8259_asm_mask(num) \ 128 movb CVAROFF(i8259_imen, IRQ_BYTE(num)),%al ;\ 129 orb $IRQ_BIT(num),%al ;\ 130 movb %al,CVAROFF(i8259_imen, IRQ_BYTE(num)) ;\ 131 MASKDELAY ;\ 132 outb %al,$(ICUADDR+1) 133 #define i8259_asm_unmask(num) \ 134 movb CVAROFF(i8259_imen, IRQ_BYTE(num)),%al ;\ 135 andb $~IRQ_BIT(num),%al ;\ 136 movb %al,CVAROFF(i8259_imen, IRQ_BYTE(num)) ;\ 137 MASKDELAY ;\ 138 outb %al,$(ICUADDR+1) 139 140 #else /* ICU_HARDWARE_MASK */ 141 142 #define i8259_asm_mask(num) 143 #define i8259_asm_unmask(num) 144 145 #endif /* ICU_HARDWARE_MASK */ 146 #endif /* ICU_SPECIAL_MASK_MODE */ 147 148 #endif /* !_MACHINE_I8259_H_ */ 149