1 /* $OpenBSD: cpu.h,v 1.30 2011/11/16 20:50:18 deraadt Exp $ */ 2 /* $NetBSD: cpu.h,v 1.34 2003/06/23 11:01:08 martin Exp $ */ 3 4 /* 5 * Copyright (c) 1994-1996 Mark Brinicombe. 6 * Copyright (c) 1994 Brini. 7 * All rights reserved. 8 * 9 * This code is derived from software written for Brini by Mark Brinicombe 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Brini. 22 * 4. The name of the company nor the name of the author may be used to 23 * endorse or promote products derived from this software without specific 24 * prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 27 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 28 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 29 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 30 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 32 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * RiscBSD kernel project 39 * 40 * cpu.h 41 * 42 * CPU specific symbols 43 * 44 * Created : 18/09/94 45 * 46 * Based on kate/katelib/arm6.h 47 */ 48 49 #ifndef _ARM_CPU_H_ 50 #define _ARM_CPU_H_ 51 52 /* 53 * User-visible definitions 54 */ 55 56 /* CTL_MACHDEP definitions. */ 57 /* 1 formerly int: CPU_DEBUG */ 58 /* 2 formerly string: CPU_BOOTED_DEVICE */ 59 /* 3 formerly string: CPU_BOOTED_KERNEL */ 60 #define CPU_CONSDEV 4 /* struct: dev_t of our console */ 61 #define CPU_POWERSAVE 5 /* int: use CPU powersave mode */ 62 #define CPU_ALLOWAPERTURE 6 /* int: allow mmap of /dev/xf86 */ 63 #define CPU_APMWARN 7 /* APM battery warning percentage */ 64 /* 8 formerly int: keyboard reset */ 65 /* 9 formerly int: CPU_ZTSRAWMODE */ 66 /* 10 formerly struct: CPU_ZTSSCALE */ 67 #define CPU_MAXSPEED 11 /* int: number of valid machdep ids */ 68 #define CPU_LIDSUSPEND 12 /* int: closing lid causes suspend */ 69 #define CPU_MAXID 13 /* number of valid machdep ids */ 70 71 #define CTL_MACHDEP_NAMES { \ 72 { 0, 0 }, \ 73 { 0, 0 }, \ 74 { 0, 0 }, \ 75 { 0, 0 }, \ 76 { "console_device", CTLTYPE_STRUCT }, \ 77 { "powersave", CTLTYPE_INT }, \ 78 { "allowaperture", CTLTYPE_INT }, \ 79 { "apmwarn", CTLTYPE_INT }, \ 80 { 0, 0 }, \ 81 { 0, 0 }, \ 82 { 0, 0 }, \ 83 { "maxspeed", CTLTYPE_INT }, \ 84 { "lidsuspend", CTLTYPE_INT } \ 85 } 86 87 #ifdef _KERNEL 88 89 /* 90 * Kernel-only definitions 91 */ 92 93 #include <arm/cpuconf.h> 94 95 #include <machine/intr.h> 96 #ifndef _LOCORE 97 #if 0 98 #include <sys/user.h> 99 #endif 100 #include <machine/frame.h> 101 #include <machine/pcb.h> 102 #endif /* !_LOCORE */ 103 104 #include <arm/armreg.h> 105 106 #ifndef _LOCORE 107 /* 1 == use cpu_sleep(), 0 == don't */ 108 extern int cpu_do_powersave; 109 #endif 110 111 #ifdef _LOCORE 112 #define IRQdisable \ 113 stmfd sp!, {r0} ; \ 114 mrs r0, cpsr ; \ 115 orr r0, r0, #(I32_bit) ; \ 116 msr cpsr_c, r0 ; \ 117 ldmfd sp!, {r0} 118 119 #define IRQenable \ 120 stmfd sp!, {r0} ; \ 121 mrs r0, cpsr ; \ 122 bic r0, r0, #(I32_bit) ; \ 123 msr cpsr_c, r0 ; \ 124 ldmfd sp!, {r0} 125 126 #else 127 #define IRQdisable __set_cpsr_c(I32_bit, I32_bit); 128 #define IRQenable __set_cpsr_c(I32_bit, 0); 129 #endif /* _LOCORE */ 130 131 #ifndef _LOCORE 132 133 /* All the CLKF_* macros take a struct clockframe * as an argument. */ 134 135 /* 136 * CLKF_USERMODE: Return TRUE/FALSE (1/0) depending on whether the 137 * frame came from USR mode or not. 138 */ 139 #define CLKF_USERMODE(frame) ((frame->if_spsr & PSR_MODE) == PSR_USR32_MODE) 140 141 /* 142 * CLKF_INTR: True if we took the interrupt from inside another 143 * interrupt handler. 144 */ 145 extern int current_intr_depth; 146 #define CLKF_INTR(frame) (current_intr_depth > 1) 147 148 /* 149 * CLKF_PC: Extract the program counter from a clockframe 150 */ 151 #define CLKF_PC(frame) (frame->if_pc) 152 153 /* 154 * PROC_PC: Find out the program counter for the given process. 155 */ 156 #define PROC_PC(p) ((p)->p_addr->u_pcb.pcb_tf->tf_pc) 157 158 /* The address of the vector page. */ 159 extern vaddr_t vector_page; 160 void arm32_vector_init(vaddr_t, int); 161 162 #define ARM_VEC_RESET (1 << 0) 163 #define ARM_VEC_UNDEFINED (1 << 1) 164 #define ARM_VEC_SWI (1 << 2) 165 #define ARM_VEC_PREFETCH_ABORT (1 << 3) 166 #define ARM_VEC_DATA_ABORT (1 << 4) 167 #define ARM_VEC_ADDRESS_EXCEPTION (1 << 5) 168 #define ARM_VEC_IRQ (1 << 6) 169 #define ARM_VEC_FIQ (1 << 7) 170 171 #define ARM_NVEC 8 172 #define ARM_VEC_ALL 0xffffffff 173 174 /* 175 * Per-CPU information. For now we assume one CPU. 176 */ 177 178 #include <sys/device.h> 179 #include <sys/sched.h> 180 struct cpu_info { 181 struct proc *ci_curproc; 182 183 struct schedstate_percpu ci_schedstate; /* scheduler state */ 184 #if defined(DIAGNOSTIC) || defined(LOCKDEBUG) 185 u_long ci_spin_locks; /* # of spin locks held */ 186 u_long ci_simple_locks; /* # of simple locks held */ 187 #endif 188 #ifdef DIAGNOSTIC 189 int ci_mutex_level; 190 #endif 191 struct device *ci_dev; /* Device corresponding to this CPU */ 192 u_int32_t ci_arm_cpuid; /* aggregate CPU id */ 193 u_int32_t ci_arm_cputype; /* CPU type */ 194 u_int32_t ci_arm_cpurev; /* CPU revision */ 195 u_int32_t ci_ctrl; /* The CPU control register */ 196 u_int32_t ci_randseed; 197 198 uint32_t ci_cpl; 199 uint32_t ci_ipending; 200 }; 201 202 #ifndef MULTIPROCESSOR 203 extern struct cpu_info cpu_info_store; 204 #define curcpu() (&cpu_info_store) 205 #define cpu_number() 0 206 #define CPU_IS_PRIMARY(ci) 1 207 #define CPU_INFO_ITERATOR int 208 #define CPU_INFO_FOREACH(cii, ci) \ 209 for (cii = 0, ci = curcpu(); ci != NULL; ci = NULL) 210 #define CPU_INFO_UNIT(ci) 0 211 #define MAXCPUS 1 212 #define cpu_unidle(ci) 213 #endif 214 215 /* 216 * Scheduling glue 217 */ 218 219 extern int astpending; 220 #define setsoftast() (astpending = 1) 221 222 /* 223 * Notify the current process (p) that it has a signal pending, 224 * process as soon as possible. 225 */ 226 227 #define signotify(p) setsoftast() 228 229 /* 230 * Preempt the current process if in interrupt from user mode, 231 * or after the current trap/syscall if in system mode. 232 */ 233 extern int want_resched; /* resched() was called */ 234 #define need_resched(ci) (want_resched = 1, setsoftast()) 235 #define clear_resched(ci) want_resched = 0 236 237 /* 238 * Give a profiling tick to the current process when the user profiling 239 * buffer pages are invalid. On the i386, request an ast to send us 240 * through trap(), marking the proc as needing a profiling tick. 241 */ 242 #define need_proftick(p) setsoftast() 243 244 /* 245 * cpu device glue (belongs in cpuvar.h) 246 */ 247 248 struct device; 249 void cpu_attach (struct device *); 250 int cpu_alloc_idlepcb (struct cpu_info *); 251 252 /* 253 * Random cruft 254 */ 255 256 /* cpuswitch.S */ 257 struct pcb; 258 void savectx (struct pcb *pcb); 259 260 /* machdep.h */ 261 void bootsync (int); 262 263 /* fault.c */ 264 int badaddr_read (void *, size_t, void *); 265 266 /* syscall.c */ 267 void swi_handler (trapframe_t *); 268 269 /* machine_machdep.c */ 270 void board_startup(void); 271 272 #endif /* !_LOCORE */ 273 274 #endif /* _KERNEL */ 275 276 #endif /* !_ARM_CPU_H_ */ 277 278 /* End of cpu.h */ 279