xref: /openbsd/sys/arch/arm/include/reloc.h (revision 690c92a2)
1*690c92a2Smiod /*	$OpenBSD: reloc.h,v 1.2 2006/05/26 20:22:04 miod Exp $	*/
2e1e4f5b1Sdrahn /* Processor specific relocation types */
3e1e4f5b1Sdrahn 
4e1e4f5b1Sdrahn #define R_ARM_NONE		0
5e1e4f5b1Sdrahn #define R_ARM_PC24		1
6e1e4f5b1Sdrahn #define R_ARM_ABS32		2
7e1e4f5b1Sdrahn #define R_ARM_REL32		3
8e1e4f5b1Sdrahn #define R_ARM_PC13		4
9e1e4f5b1Sdrahn #define R_ARM_ABS16		5
10e1e4f5b1Sdrahn #define R_ARM_ABS12		6
11e1e4f5b1Sdrahn #define R_ARM_THM_ABS5		7
12e1e4f5b1Sdrahn #define R_ARM_ABS8		8
13e1e4f5b1Sdrahn #define R_ARM_SBREL32		9
14e1e4f5b1Sdrahn #define R_ARM_THM_PC22		10
15e1e4f5b1Sdrahn #define R_ARM_THM_PC8		11
16e1e4f5b1Sdrahn #define R_ARM_AMP_VCALL9	12
17e1e4f5b1Sdrahn #define R_ARM_SWI24		13
18e1e4f5b1Sdrahn #define R_ARM_THM_SWI8		14
19e1e4f5b1Sdrahn #define R_ARM_XPC25		15
20e1e4f5b1Sdrahn #define R_ARM_THM_XPC22		16
21e1e4f5b1Sdrahn 
22e1e4f5b1Sdrahn /* 17-31 are reserved for ARM Linux. */
23e1e4f5b1Sdrahn #define R_ARM_COPY		20
24e1e4f5b1Sdrahn #define R_ARM_GLOB_DAT		21
25e1e4f5b1Sdrahn #define	R_ARM_JUMP_SLOT		22
26e1e4f5b1Sdrahn #define R_ARM_RELATIVE		23
27e1e4f5b1Sdrahn #define	R_ARM_GOTOFF		24
28e1e4f5b1Sdrahn #define R_ARM_GOTPC		25
29e1e4f5b1Sdrahn #define R_ARM_GOT32		26
30e1e4f5b1Sdrahn #define R_ARM_PLT32		27
31e1e4f5b1Sdrahn 
32e1e4f5b1Sdrahn #define R_ARM_ALU_PCREL_7_0	32
33e1e4f5b1Sdrahn #define R_ARM_ALU_PCREL_15_8	33
34e1e4f5b1Sdrahn #define R_ARM_ALU_PCREL_23_15	34
35e1e4f5b1Sdrahn #define R_ARM_ALU_SBREL_11_0	35
36e1e4f5b1Sdrahn #define R_ARM_ALU_SBREL_19_12	36
37e1e4f5b1Sdrahn #define R_ARM_ALU_SBREL_27_20	37
38e1e4f5b1Sdrahn 
39e1e4f5b1Sdrahn /* 96-111 are reserved to G++. */
40e1e4f5b1Sdrahn #define R_ARM_GNU_VTENTRY	100
41e1e4f5b1Sdrahn #define R_ARM_GNU_VTINHERIT	101
42e1e4f5b1Sdrahn #define R_ARM_THM_PC11		102
43e1e4f5b1Sdrahn #define R_ARM_THM_PC9		103
44e1e4f5b1Sdrahn 
45e1e4f5b1Sdrahn /* 112-127 are reserved for private experiments. */
46e1e4f5b1Sdrahn 
47e1e4f5b1Sdrahn #define R_ARM_RXPC25		249
48e1e4f5b1Sdrahn #define R_ARM_RSBREL32		250
49e1e4f5b1Sdrahn #define R_ARM_THM_RPC22		251
50e1e4f5b1Sdrahn #define R_ARM_RREL32		252
51e1e4f5b1Sdrahn #define R_ARM_RABS32		253
52e1e4f5b1Sdrahn #define R_ARM_RPC24		254
53e1e4f5b1Sdrahn #define R_ARM_RBASE		255
54e1e4f5b1Sdrahn 
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