xref: /openbsd/sys/arch/armv7/include/intr.h (revision f6aab3d8)
1 /*	$OpenBSD: intr.h,v 1.14 2020/07/17 08:07:34 patrick Exp $	*/
2 /*	$NetBSD: intr.h,v 1.12 2003/06/16 20:00:59 thorpej Exp $	*/
3 
4 /*
5  * Copyright (c) 2001, 2003 Wasabi Systems, Inc.
6  * All rights reserved.
7  *
8  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *	This product includes software developed for the NetBSD Project by
21  *	Wasabi Systems, Inc.
22  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
23  *    or promote products derived from this software without specific prior
24  *    written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
27  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 #ifndef	_MACHINE_INTR_H_
40 #define	_MACHINE_INTR_H_
41 
42 #ifdef _KERNEL
43 
44 /* Interrupt priority `levels'; not mutually exclusive. */
45 #define	IPL_NONE	0	/* nothing */
46 #define	IPL_SOFT	1	/* soft interrupts */
47 #define	IPL_SOFTCLOCK	2	/* soft clock interrupts */
48 #define	IPL_SOFTNET	3	/* soft network interrupts */
49 #define	IPL_SOFTTTY	4	/* soft terminal interrupts */
50 #define	IPL_BIO		5	/* block I/O */
51 #define	IPL_NET		6	/* network */
52 #define	IPL_TTY		7	/* terminal */
53 #define	IPL_VM		8	/* memory allocation */
54 #define	IPL_AUDIO	9	/* audio */
55 #define	IPL_CLOCK	10	/* clock */
56 #define	IPL_SCHED	IPL_CLOCK
57 #define	IPL_STATCLOCK	IPL_CLOCK
58 #define	IPL_HIGH	11	/* everything */
59 #define	IPL_IPI		12	/* interprocessor interrupt */
60 #define	NIPL		13	/* number of levels */
61 
62 #define	IPL_MPFLOOR	IPL_TTY
63 /* Interrupt priority 'flags'. */
64 #define	IPL_IRQMASK	0xf	/* priority only */
65 #define	IPL_FLAGMASK	0xf00	/* flags only*/
66 #define	IPL_MPSAFE	0x100	/* 'mpsafe' interrupt, no kernel lock */
67 
68 /* Interrupt sharing types. */
69 #define	IST_NONE	0	/* none */
70 #define	IST_PULSE	1	/* pulsed */
71 #define	IST_EDGE	2	/* edge-triggered */
72 #define	IST_LEVEL	3	/* level-triggered */
73 
74 #define	IST_LEVEL_LOW		IST_LEVEL
75 #define	IST_LEVEL_HIGH		4
76 #define	IST_EDGE_FALLING	IST_EDGE
77 #define	IST_EDGE_RISING		5
78 #define	IST_EDGE_BOTH		6
79 
80 #ifndef _LOCORE
81 #include <sys/device.h>
82 #include <sys/queue.h>
83 
84 struct cpu_info;
85 
86 int     splraise(int);
87 int     spllower(int);
88 void    splx(int);
89 
90 void	arm_do_pending_intr(int);
91 void	arm_set_intr_handler(int (*raise)(int), int (*lower)(int),
92 	void (*x)(int), void (*setipl)(int),
93 	void *(*intr_establish)(int irqno, int level, struct cpu_info *ci,
94 	    int (*func)(void *), void *cookie, char *name),
95 	void (*intr_disestablish)(void *cookie),
96 	const char *(*intr_string)(void *cookie),
97 	void (*intr_handle)(void *));
98 
99 struct arm_intr_func {
100 	int (*raise)(int);
101 	int (*lower)(int);
102 	void (*x)(int);
103 	void (*setipl)(int);
104 	void *(*intr_establish)(int irqno, int level, struct cpu_info *,
105 	    int (*func)(void *), void *cookie, char *name);
106 	void (*intr_disestablish)(void *cookie);
107 	const char *(*intr_string)(void *cookie);
108 };
109 
110 extern struct arm_intr_func arm_intr_func;
111 
112 #define splraise(cpl)		(arm_intr_func.raise(cpl))
113 #define _splraise(cpl)		(arm_intr_func.raise(cpl))
114 #define spllower(cpl)		(arm_intr_func.lower(cpl))
115 #define splx(cpl)		(arm_intr_func.x(cpl))
116 
117 #define	splhigh()	splraise(IPL_HIGH)
118 #define	splsoft()	splraise(IPL_SOFT)
119 #define	splsoftclock()	splraise(IPL_SOFTCLOCK)
120 #define	splsoftnet()	splraise(IPL_SOFTNET)
121 #define	splbio()	splraise(IPL_BIO)
122 #define	splnet()	splraise(IPL_NET)
123 #define	spltty()	splraise(IPL_TTY)
124 #define	splvm()		splraise(IPL_VM)
125 #define	splaudio()	splraise(IPL_AUDIO)
126 #define	splclock()	splraise(IPL_CLOCK)
127 #define	splstatclock()	splraise(IPL_STATCLOCK)
128 
129 #define	spl0()		spllower(IPL_NONE)
130 
131 #define	splsched()	splhigh()
132 
133 void	intr_barrier(void *);
134 
135 void arm_init_smask(void); /* XXX */
136 extern uint32_t arm_smask[NIPL];
137 void arm_setsoftintr(int si);
138 
139 #define _setsoftintr arm_setsoftintr
140 
141 #include <arm/softintr.h>
142 
143 void *arm_intr_establish(int irqno, int level, int (*func)(void *),
144     void *cookie, char *name);
145 void arm_intr_disestablish(void *cookie);
146 const char *arm_intr_string(void *cookie);
147 
148 /* XXX - this is probably the wrong location for this */
149 void arm_clock_register(void (*)(void), void (*)(u_int), void (*)(int),
150     void (*)(void));
151 
152 struct interrupt_controller {
153 	int	ic_node;
154 	void	*ic_cookie;
155 	void	*(*ic_establish)(void *, int *, int, struct cpu_info *,
156 		    int (*)(void *), void *, char *);
157 	void	*(*ic_establish_msi)(void *, uint64_t *, uint64_t *, int,
158 		    struct cpu_info *, int (*)(void *), void *, char *);
159 	void	 (*ic_disestablish)(void *);
160 	void	 (*ic_enable)(void *);
161 	void	 (*ic_disable)(void *);
162 	void	 (*ic_route)(void *, int, struct cpu_info *);
163 	void	 (*ic_cpu_enable)(void);
164 	void	 (*ic_barrier)(void *);
165 
166 	LIST_ENTRY(interrupt_controller) ic_list;
167 	uint32_t ic_phandle;
168 	uint32_t ic_cells;
169 };
170 
171 void	 arm_intr_init_fdt(void);
172 void	 arm_intr_register_fdt(struct interrupt_controller *);
173 void	*arm_intr_establish_fdt(int, int, int (*)(void *),
174 	    void *, char *);
175 void	*arm_intr_establish_fdt_cpu(int, int, struct cpu_info *,
176 	    int (*)(void *), void *, char *);
177 void	*arm_intr_establish_fdt_idx(int, int, int, int (*)(void *),
178 	    void *, char *);
179 void	*arm_intr_establish_fdt_idx_cpu(int, int, int, struct cpu_info *,
180 	    int (*)(void *), void *, char *);
181 void	*arm_intr_establish_fdt_imap(int, int *, int, int, int (*)(void *),
182 	    void *, char *);
183 void	*arm_intr_establish_fdt_imap_cpu(int, int *, int, int,
184 	    struct cpu_info *, int (*)(void *), void *, char *);
185 void	*arm_intr_establish_fdt_msi(int, uint64_t *, uint64_t *, int,
186 	    int (*)(void *), void *, char *);
187 void	*arm_intr_establish_fdt_msi_cpu(int, uint64_t *, uint64_t *, int,
188 	    struct cpu_info *, int (*)(void *), void *, char *);
189 void	 arm_intr_disestablish_fdt(void *);
190 void	 arm_intr_enable(void *);
191 void	 arm_intr_disable(void *);
192 void	 arm_intr_route(void *, int, struct cpu_info *);
193 void	 arm_intr_cpu_enable(void);
194 
195 void	*arm_intr_parent_establish_fdt(void *, int *, int,
196 	    struct cpu_info *ci, int (*)(void *), void *, char *);
197 void	 arm_intr_parent_disestablish_fdt(void *);
198 
199 void	 arm_send_ipi(struct cpu_info *, int);
200 extern void (*intr_send_ipi_func)(struct cpu_info *, int);
201 
202 #define ARM_IPI_NOP	0
203 #define ARM_IPI_DDB	1
204 
205 #ifdef DIAGNOSTIC
206 /*
207  * Although this function is implemented in MI code, it must be in this MD
208  * header because we don't want this header to include MI includes.
209  */
210 void splassert_fail(int, int, const char *);
211 extern int splassert_ctl;
212 void arm_splassert_check(int, const char *);
213 #define splassert(__wantipl) do {                               \
214 	if (splassert_ctl > 0) {                                \
215 		arm_splassert_check(__wantipl, __func__);    \
216 	}                                                       \
217 } while (0)
218 #define splsoftassert(wantipl) splassert(wantipl)
219 #else
220 #define splassert(wantipl)      do { /* nothing */ } while (0)
221 #define splsoftassert(wantipl)  do { /* nothing */ } while (0)
222 #endif
223 
224 #endif /* ! _LOCORE */
225 
226 #define ARM_IRQ_HANDLER arm_intr
227 
228 #endif /* _KERNEL */
229 
230 #endif	/* _MACHINE_INTR_H_ */
231 
232