1 /* $OpenBSD: siop_sgc.c,v 1.2 2022/03/13 08:04:38 mpi Exp $ */ 2 3 /* 4 * Copyright (c) 2007 Mark Kettenis 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #include <sys/param.h> 20 #include <sys/device.h> 21 #include <sys/systm.h> 22 23 #include <machine/autoconf.h> 24 #include <machine/bus.h> 25 #include <machine/iomod.h> 26 27 #include <scsi/scsi_all.h> 28 #include <scsi/scsiconf.h> 29 30 #include <dev/ic/siopreg.h> 31 #include <dev/ic/siopvar_common.h> 32 #include <dev/ic/siopvar.h> 33 34 #include <hppa/dev/cpudevs.h> 35 36 #define IO_II_INTEN 0x20000000 37 #define IO_II_PACKEN 0x10000000 38 #define IO_II_PREFETCHEN 0x08000000 39 40 int siop_sgc_match(struct device *, void *, void *); 41 void siop_sgc_attach(struct device *, struct device *, void *); 42 int siop_sgc_intr(void *); 43 void siop_sgc_reset(struct siop_common_softc *); 44 45 u_int8_t siop_sgc_r1(void *, bus_space_handle_t, bus_size_t); 46 u_int16_t siop_sgc_r2(void *, bus_space_handle_t, bus_size_t); 47 void siop_sgc_w1(void *, bus_space_handle_t, bus_size_t, u_int8_t); 48 void siop_sgc_w2(void *, bus_space_handle_t, bus_size_t, u_int16_t); 49 50 struct siop_sgc_softc { 51 struct siop_softc sc_siop; 52 bus_space_tag_t sc_iot; 53 bus_space_handle_t sc_ioh; 54 struct hppa_bus_space_tag sc_bustag; 55 }; 56 57 const struct cfattach siop_gedoens_ca = { 58 sizeof(struct siop_sgc_softc), siop_sgc_match, siop_sgc_attach 59 }; 60 61 int 62 siop_sgc_match(struct device *parent, void *match, void *aux) 63 { 64 struct confargs *ca = aux; 65 66 if (ca->ca_type.iodc_type != HPPA_TYPE_ADMA || 67 ca->ca_type.iodc_sv_model != HPPA_ADMA_FWSCSI) 68 return 0; 69 70 return 1; 71 } 72 73 void 74 siop_sgc_attach(struct device *parent, struct device *self, void *aux) 75 { 76 struct siop_sgc_softc *sc = (struct siop_sgc_softc *)self; 77 struct confargs *ca = aux; 78 volatile struct iomod *regs; 79 80 sc->sc_iot = ca->ca_iot; 81 if (bus_space_map(sc->sc_iot, ca->ca_hpa, 82 IOMOD_HPASIZE, 0, &sc->sc_ioh)) { 83 printf(": cannot map io space\n"); 84 return; 85 } 86 87 sc->sc_bustag = *sc->sc_iot; 88 sc->sc_bustag.hbt_r1 = siop_sgc_r1; 89 sc->sc_bustag.hbt_r2 = siop_sgc_r2; 90 sc->sc_bustag.hbt_w1 = siop_sgc_w1; 91 sc->sc_bustag.hbt_w2 = siop_sgc_w2; 92 93 sc->sc_siop.sc_c.features = SF_CHIP_PF | SF_CHIP_BE | SF_BUS_WIDE; 94 sc->sc_siop.sc_c.maxburst = 4; 95 sc->sc_siop.sc_c.maxoff = 8; 96 sc->sc_siop.sc_c.clock_div = 3; 97 sc->sc_siop.sc_c.clock_period = 250; 98 sc->sc_siop.sc_c.ram_size = 0; 99 100 sc->sc_siop.sc_c.sc_reset = siop_sgc_reset; 101 sc->sc_siop.sc_c.sc_dmat = ca->ca_dmatag; 102 103 sc->sc_siop.sc_c.sc_rt = &sc->sc_bustag; 104 bus_space_subregion(sc->sc_iot, sc->sc_ioh, IOMOD_DEVOFFSET, 105 IOMOD_HPASIZE - IOMOD_DEVOFFSET, &sc->sc_siop.sc_c.sc_rh); 106 107 regs = bus_space_vaddr(sc->sc_iot, sc->sc_ioh); 108 regs->io_command = CMD_RESET; 109 while ((regs->io_status & IO_ERR_MEM_RY) == 0) 110 delay(100); 111 regs->io_ii_rw = IO_II_PACKEN | IO_II_PREFETCHEN; 112 113 siop_sgc_reset(&sc->sc_siop.sc_c); 114 115 regs->io_eim = cpu_gethpa(0) | (31 - ca->ca_irq); 116 regs->io_ii_rw |= IO_II_INTEN; 117 cpu_intr_establish(IPL_BIO, ca->ca_irq, siop_intr, sc, 118 sc->sc_siop.sc_c.sc_dev.dv_xname); 119 120 printf(": NCR53C720 rev %d\n", bus_space_read_1(sc->sc_siop.sc_c.sc_rt, 121 sc->sc_siop.sc_c.sc_rh, SIOP_CTEST3) >> 4); 122 123 siop_attach(&sc->sc_siop); 124 } 125 126 void 127 siop_sgc_reset(struct siop_common_softc *sc) 128 { 129 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_DCNTL, DCNTL_EA); 130 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST0, CTEST0_EHP); 131 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST4, CTEST4_MUX); 132 133 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STIME0, 134 (0xc << STIME0_SEL_SHIFT)); 135 } 136 137 u_int8_t 138 siop_sgc_r1(void *v, bus_space_handle_t h, bus_size_t o) 139 { 140 return *(volatile u_int8_t *)(h + (o ^ 3)); 141 } 142 143 u_int16_t 144 siop_sgc_r2(void *v, bus_space_handle_t h, bus_size_t o) 145 { 146 if (o == SIOP_SIST0) { 147 u_int16_t reg; 148 149 reg = siop_sgc_r1(v, h, SIOP_SIST0); 150 reg |= siop_sgc_r1(v, h, SIOP_SIST1) << 8; 151 return reg; 152 } 153 return *(volatile u_int16_t *)(h + (o ^ 2)); 154 } 155 156 void 157 siop_sgc_w1(void *v, bus_space_handle_t h, bus_size_t o, u_int8_t vv) 158 { 159 *(volatile u_int8_t *)(h + (o ^ 3)) = vv; 160 } 161 162 void 163 siop_sgc_w2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t vv) 164 { 165 *(volatile u_int16_t *)(h + (o ^ 2)) = vv; 166 } 167