1 /* $OpenBSD: bus.h,v 1.20 2003/03/29 00:58:50 mickey Exp $ */ 2 3 /* 4 * Copyright (c) 1998,1999 Michael Shalayeff 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Michael Shalayeff. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 25 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 27 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 29 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 30 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 35 #ifndef _MACHINE_BUS_H_ 36 #define _MACHINE_BUS_H_ 37 38 #include <machine/cpufunc.h> 39 40 /* addresses in bus space */ 41 typedef u_long bus_addr_t; 42 typedef u_long bus_size_t; 43 44 /* access methods for bus space */ 45 typedef u_long bus_space_handle_t; 46 47 struct hppa_bus_space_tag { 48 void *hbt_cookie; 49 50 int (*hbt_map)(void *v, bus_addr_t addr, bus_size_t size, 51 int cacheable, bus_space_handle_t *bshp); 52 void (*hbt_unmap)(void *v, bus_space_handle_t bsh, 53 bus_size_t size); 54 int (*hbt_subregion)(void *v, bus_space_handle_t bsh, 55 bus_size_t offset, bus_size_t size, 56 bus_space_handle_t *nbshp); 57 int (*hbt_alloc)(void *v, bus_addr_t rstart, bus_addr_t rend, 58 bus_size_t size, bus_size_t align, 59 bus_size_t boundary, int cacheable, 60 bus_addr_t *addrp, bus_space_handle_t *bshp); 61 void (*hbt_free)(void *, bus_space_handle_t, bus_size_t); 62 void (*hbt_barrier)(void *v, bus_space_handle_t h, 63 bus_size_t o, bus_size_t l, int op); 64 65 u_int8_t (*hbt_r1)(void *, bus_space_handle_t, bus_size_t); 66 u_int16_t (*hbt_r2)(void *, bus_space_handle_t, bus_size_t); 67 u_int32_t (*hbt_r4)(void *, bus_space_handle_t, bus_size_t); 68 u_int64_t (*hbt_r8)(void *, bus_space_handle_t, bus_size_t); 69 70 void (*hbt_w1)(void *, bus_space_handle_t, bus_size_t, u_int8_t); 71 void (*hbt_w2)(void *, bus_space_handle_t, bus_size_t, u_int16_t); 72 void (*hbt_w4)(void *, bus_space_handle_t, bus_size_t, u_int32_t); 73 void (*hbt_w8)(void *, bus_space_handle_t, bus_size_t, u_int64_t); 74 75 void (*hbt_rm_1)(void *v, bus_space_handle_t h, 76 bus_size_t o, u_int8_t *a, bus_size_t c); 77 void (*hbt_rm_2)(void *v, bus_space_handle_t h, 78 bus_size_t o, u_int16_t *a, bus_size_t c); 79 void (*hbt_rm_4)(void *v, bus_space_handle_t h, 80 bus_size_t o, u_int32_t *a, bus_size_t c); 81 void (*hbt_rm_8)(void *v, bus_space_handle_t h, 82 bus_size_t o, u_int64_t *a, bus_size_t c); 83 84 void (*hbt_wm_1)(void *v, bus_space_handle_t h, bus_size_t o, 85 const u_int8_t *a, bus_size_t c); 86 void (*hbt_wm_2)(void *v, bus_space_handle_t h, bus_size_t o, 87 const u_int16_t *a, bus_size_t c); 88 void (*hbt_wm_4)(void *v, bus_space_handle_t h, bus_size_t o, 89 const u_int32_t *a, bus_size_t c); 90 void (*hbt_wm_8)(void *v, bus_space_handle_t h, bus_size_t o, 91 const u_int64_t *a, bus_size_t c); 92 93 void (*hbt_sm_1)(void *v, bus_space_handle_t h, bus_size_t o, 94 u_int8_t vv, bus_size_t c); 95 void (*hbt_sm_2)(void *v, bus_space_handle_t h, bus_size_t o, 96 u_int16_t vv, bus_size_t c); 97 void (*hbt_sm_4)(void *v, bus_space_handle_t h, bus_size_t o, 98 u_int32_t vv, bus_size_t c); 99 void (*hbt_sm_8)(void *v, bus_space_handle_t h, bus_size_t o, 100 u_int64_t vv, bus_size_t c); 101 102 void (*hbt_rrm_2)(void *v, bus_space_handle_t h, 103 bus_size_t o, u_int8_t *a, bus_size_t c); 104 void (*hbt_rrm_4)(void *v, bus_space_handle_t h, 105 bus_size_t o, u_int8_t *a, bus_size_t c); 106 void (*hbt_rrm_8)(void *v, bus_space_handle_t h, 107 bus_size_t o, u_int8_t *a, bus_size_t c); 108 109 void (*hbt_wrm_2)(void *v, bus_space_handle_t h, 110 bus_size_t o, const u_int8_t *a, bus_size_t c); 111 void (*hbt_wrm_4)(void *v, bus_space_handle_t h, 112 bus_size_t o, const u_int8_t *a, bus_size_t c); 113 void (*hbt_wrm_8)(void *v, bus_space_handle_t h, 114 bus_size_t o, const u_int8_t *a, bus_size_t c); 115 116 void (*hbt_rr_1)(void *v, bus_space_handle_t h, 117 bus_size_t o, u_int8_t *a, bus_size_t c); 118 void (*hbt_rr_2)(void *v, bus_space_handle_t h, 119 bus_size_t o, u_int16_t *a, bus_size_t c); 120 void (*hbt_rr_4)(void *v, bus_space_handle_t h, 121 bus_size_t o, u_int32_t *a, bus_size_t c); 122 void (*hbt_rr_8)(void *v, bus_space_handle_t h, 123 bus_size_t o, u_int64_t *a, bus_size_t c); 124 125 void (*hbt_wr_1)(void *v, bus_space_handle_t h, 126 bus_size_t o, const u_int8_t *a, bus_size_t c); 127 void (*hbt_wr_2)(void *v, bus_space_handle_t h, 128 bus_size_t o, const u_int16_t *a, bus_size_t c); 129 void (*hbt_wr_4)(void *v, bus_space_handle_t h, 130 bus_size_t o, const u_int32_t *a, bus_size_t c); 131 void (*hbt_wr_8)(void *v, bus_space_handle_t h, 132 bus_size_t o, const u_int64_t *a, bus_size_t c); 133 134 void (*hbt_rrr_2)(void *v, bus_space_handle_t h, 135 bus_size_t o, u_int8_t *a, bus_size_t c); 136 void (*hbt_rrr_4)(void *v, bus_space_handle_t h, 137 bus_size_t o, u_int8_t *a, bus_size_t c); 138 void (*hbt_rrr_8)(void *v, bus_space_handle_t h, 139 bus_size_t o, u_int8_t *a, bus_size_t c); 140 141 void (*hbt_wrr_2)(void *v, bus_space_handle_t h, 142 bus_size_t o, const u_int8_t *a, bus_size_t c); 143 void (*hbt_wrr_4)(void *v, bus_space_handle_t h, 144 bus_size_t o, const u_int8_t *a, bus_size_t c); 145 void (*hbt_wrr_8)(void *v, bus_space_handle_t h, 146 bus_size_t o, const u_int8_t *a, bus_size_t c); 147 148 void (*hbt_sr_1)(void *v, bus_space_handle_t h, 149 bus_size_t o, u_int8_t vv, bus_size_t c); 150 void (*hbt_sr_2)(void *v, bus_space_handle_t h, 151 bus_size_t o, u_int16_t vv, bus_size_t c); 152 void (*hbt_sr_4)(void *v, bus_space_handle_t h, 153 bus_size_t o, u_int32_t vv, bus_size_t c); 154 void (*hbt_sr_8)(void *v, bus_space_handle_t h, 155 bus_size_t o, u_int64_t vv, bus_size_t c); 156 157 void (*hbt_cp_1)(void *v, bus_space_handle_t h1, bus_size_t o1, 158 bus_space_handle_t h2, bus_size_t o2, bus_size_t c); 159 void (*hbt_cp_2)(void *v, bus_space_handle_t h1, bus_size_t o1, 160 bus_space_handle_t h2, bus_size_t o2, bus_size_t c); 161 void (*hbt_cp_4)(void *v, bus_space_handle_t h1, bus_size_t o1, 162 bus_space_handle_t h2, bus_size_t o2, bus_size_t c); 163 void (*hbt_cp_8)(void *v, bus_space_handle_t h1, bus_size_t o1, 164 bus_space_handle_t h2, bus_size_t o2, bus_size_t c); 165 }; 166 typedef const struct hppa_bus_space_tag *bus_space_tag_t; 167 extern const struct hppa_bus_space_tag hppa_bustag; 168 169 /* flags for bus space map functions */ 170 #define BUS_SPACE_MAP_CACHEABLE 0x0001 171 #define BUS_SPACE_MAP_LINEAR 0x0002 172 #define BUS_SPACE_MAP_READONLY 0x0004 173 #define BUS_SPACE_MAP_PREFETCHABLE 0x0008 174 175 /* bus access routines */ 176 177 #define bus_space_map(t,a,c,ca,hp) \ 178 (((t)->hbt_map)((t)->hbt_cookie,(a),(c),(ca),(hp))) 179 #define bus_space_unmap(t,h,c) \ 180 (((t)->hbt_unmap)((t)->hbt_cookie,(h),(c))) 181 #define bus_space_subregion(t,h,o,c,hp) \ 182 (((t)->hbt_subregion)((t)->hbt_cookie,(h),(o),(c),(hp))) 183 #define bus_space_alloc(t,b,e,c,al,bn,ca,ap,hp) \ 184 (((t)->hbt_alloc)((t)->hbt_alloc,(b),(e),(c),(al),(bn),(ca),(ap),(hp))) 185 #define bus_space_free(t,h,c) \ 186 (((t)->hbt_free)((t)->hbt_cookie,(h),(c))) 187 188 #define bus_space_read_1(t,h,o) (((t)->hbt_r1)((t)->hbt_cookie,(h),(o))) 189 #define bus_space_read_2(t,h,o) (((t)->hbt_r2)((t)->hbt_cookie,(h),(o))) 190 #define bus_space_read_4(t,h,o) (((t)->hbt_r4)((t)->hbt_cookie,(h),(o))) 191 #define bus_space_read_8(t,h,o) (((t)->hbt_r8)((t)->hbt_cookie,(h),(o))) 192 193 #define bus_space_write_1(t,h,o,v) (((t)->hbt_w1)((t)->hbt_cookie,(h),(o),(v))) 194 #define bus_space_write_2(t,h,o,v) (((t)->hbt_w2)((t)->hbt_cookie,(h),(o),(v))) 195 #define bus_space_write_4(t,h,o,v) (((t)->hbt_w4)((t)->hbt_cookie,(h),(o),(v))) 196 #define bus_space_write_8(t,h,o,v) (((t)->hbt_w8)((t)->hbt_cookie,(h),(o),(v))) 197 198 #define bus_space_read_multi_1(t,h,o,a,c) \ 199 (((t)->hbt_rm_1)((t)->hbt_cookie, (h), (o), (a), (c))) 200 #define bus_space_read_multi_2(t,h,o,a,c) \ 201 (((t)->hbt_rm_2)((t)->hbt_cookie, (h), (o), (a), (c))) 202 #define bus_space_read_multi_4(t,h,o,a,c) \ 203 (((t)->hbt_rm_4)((t)->hbt_cookie, (h), (o), (a), (c))) 204 #define bus_space_read_multi_8(t,h,o,a,c) \ 205 (((t)->hbt_rm_8)((t)->hbt_cookie, (h), (o), (a), (c))) 206 207 #define bus_space_write_multi_1(t,h,o,a,c) \ 208 (((t)->hbt_wm_1)((t)->hbt_cookie, (h), (o), (a), (c))) 209 #define bus_space_write_multi_2(t,h,o,a,c) \ 210 (((t)->hbt_wm_2)((t)->hbt_cookie, (h), (o), (a), (c))) 211 #define bus_space_write_multi_4(t,h,o,a,c) \ 212 (((t)->hbt_wm_4)((t)->hbt_cookie, (h), (o), (a), (c))) 213 #define bus_space_write_multi_8(t,h,o,a,c) \ 214 (((t)->hbt_wm_8)((t)->hbt_cookie, (h), (o), (a), (c))) 215 216 #define bus_space_set_multi_1(t,h,o,v,c) \ 217 (((t)->hbt_sm_1)((t)->hbt_cookie, (h), (o), (v), (c))) 218 #define bus_space_set_multi_2(t,h,o,v,c) \ 219 (((t)->hbt_sm_2)((t)->hbt_cookie, (h), (o), (v), (c))) 220 #define bus_space_set_multi_4(t,h,o,v,c) \ 221 (((t)->hbt_sm_4)((t)->hbt_cookie, (h), (o), (v), (c))) 222 #define bus_space_set_multi_8(t,h,o,v,c) \ 223 (((t)->hbt_sm_8)((t)->hbt_cookie, (h), (o), (v), (c))) 224 225 #define bus_space_read_raw_multi_2(t, h, o, a, c) \ 226 (((t)->hbt_rrm_2)((t)->hbt_cookie, (h), (o), (a), (c))) 227 #define bus_space_read_raw_multi_4(t, h, o, a, c) \ 228 (((t)->hbt_rrm_4)((t)->hbt_cookie, (h), (o), (a), (c))) 229 #define bus_space_read_raw_multi_8(t, h, o, a, c) \ 230 (((t)->hbt_rrm_8)((t)->hbt_cookie, (h), (o), (a), (c))) 231 232 #define bus_space_write_raw_multi_2(t, h, o, a, c) \ 233 (((t)->hbt_wrm_2)((t)->hbt_cookie, (h), (o), (a), (c))) 234 #define bus_space_write_raw_multi_4(t, h, o, a, c) \ 235 (((t)->hbt_wrm_4)((t)->hbt_cookie, (h), (o), (a), (c))) 236 #define bus_space_write_raw_multi_8(t, h, o, a, c) \ 237 (((t)->hbt_wrm_8)((t)->hbt_cookie, (h), (o), (a), (c))) 238 239 #define bus_space_read_region_1(t, h, o, a, c) \ 240 (((t)->hbt_rr_1)((t)->hbt_cookie, (h), (o), (a), (c))) 241 #define bus_space_read_region_2(t, h, o, a, c) \ 242 (((t)->hbt_rr_2)((t)->hbt_cookie, (h), (o), (a), (c))) 243 #define bus_space_read_region_4(t, h, o, a, c) \ 244 (((t)->hbt_rr_4)((t)->hbt_cookie, (h), (o), (a), (c))) 245 #define bus_space_read_region_8(t, h, o, a, c) \ 246 (((t)->hbt_rr_8)((t)->hbt_cookie, (h), (o), (a), (c))) 247 248 #define bus_space_write_region_1(t, h, o, a, c) \ 249 (((t)->hbt_wr_1)((t)->hbt_cookie, (h), (o), (a), (c))) 250 #define bus_space_write_region_2(t, h, o, a, c) \ 251 (((t)->hbt_wr_2)((t)->hbt_cookie, (h), (o), (a), (c))) 252 #define bus_space_write_region_4(t, h, o, a, c) \ 253 (((t)->hbt_wr_4)((t)->hbt_cookie, (h), (o), (a), (c))) 254 #define bus_space_write_region_8(t, h, o, a, c) \ 255 (((t)->hbt_wr_8)((t)->hbt_cookie, (h), (o), (a), (c))) 256 257 #define bus_space_read_raw_region_2(t, h, o, a, c) \ 258 (((t)->hbt_rrr_2)((t)->hbt_cookie, (h), (o), (a), (c))) 259 #define bus_space_read_raw_region_4(t, h, o, a, c) \ 260 (((t)->hbt_rrr_4)((t)->hbt_cookie, (h), (o), (a), (c))) 261 #define bus_space_read_raw_region_8(t, h, o, a, c) \ 262 (((t)->hbt_rrr_8)((t)->hbt_cookie, (h), (o), (a), (c))) 263 264 #define bus_space_write_raw_region_2(t, h, o, a, c) \ 265 (((t)->hbt_wrr_2)((t)->hbt_cookie, (h), (o), (a), (c))) 266 #define bus_space_write_raw_region_4(t, h, o, a, c) \ 267 (((t)->hbt_wrr_4)((t)->hbt_cookie, (h), (o), (a), (c))) 268 #define bus_space_write_raw_region_8(t, h, o, a, c) \ 269 (((t)->hbt_wrr_8)((t)->hbt_cookie, (h), (o), (a), (c))) 270 271 #define bus_space_set_region_1(t, h, o, v, c) \ 272 (((t)->hbt_sr_1)((t)->hbt_cookie, (h), (o), (v), (c))) 273 #define bus_space_set_region_2(t, h, o, v, c) \ 274 (((t)->hbt_sr_2)((t)->hbt_cookie, (h), (o), (v), (c))) 275 #define bus_space_set_region_4(t, h, o, v, c) \ 276 (((t)->hbt_sr_4)((t)->hbt_cookie, (h), (o), (v), (c))) 277 #define bus_space_set_region_8(t, h, o, v, c) \ 278 (((t)->hbt_sr_8)((t)->hbt_cookie, (h), (o), (v), (c))) 279 280 #define bus_space_copy_1(t, h1, o1, h2, o2, c) \ 281 (((t)->hbt_cp_1)((t)->hbt_cookie, (h1), (o1), (h2), (o2), (c))) 282 #define bus_space_copy_2(t, h1, o1, h2, o2, c) \ 283 (((t)->hbt_cp_2)((t)->hbt_cookie, (h1), (o1), (h2), (o2), (c))) 284 #define bus_space_copy_4(t, h1, o1, h2, o2, c) \ 285 (((t)->hbt_cp_4)((t)->hbt_cookie, (h1), (o1), (h2), (o2), (c))) 286 #define bus_space_copy_8(t, h1, o1, h2, o2, c) \ 287 (((t)->hbt_cp_8)((t)->hbt_cookie, (h1), (o1), (h2), (o2), (c))) 288 289 #define BUS_SPACE_BARRIER_READ 0 290 #define BUS_SPACE_BARRIER_WRITE 1 291 292 #define bus_space_barrier(t,h,o,l,op) \ 293 ((t)->hbt_barrier((t)->hbt_cookie, (h), (o), (l), (op))) 294 #define bus_space_vaddr(t,h,o,l,op) \ 295 ((t)->hbt_vaddr((t)->hbt_cookie, (h), (o), (l), (op))) 296 297 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 298 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 299 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 300 #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ 301 #define BUS_DMAMEM_NOSYNC 0x010 302 #define BUS_DMA_BUS1 0x020 /* placeholders for bus functions... */ 303 #define BUS_DMA_BUS2 0x040 304 #define BUS_DMA_BUS3 0x080 305 #define BUS_DMA_BUS4 0x100 306 #define BUS_DMA_STREAMING 0x200 /* hint: sequential, unidirectional */ 307 #define BUS_DMA_READ 0x400 /* mapping is device -> memory only */ 308 #define BUS_DMA_WRITE 0x800 /* mapping is memory -> device only */ 309 310 /* Forwards needed by prototypes below. */ 311 struct mbuf; 312 struct proc; 313 struct uio; 314 315 /* Operations performed by bus_dmamap_sync(). */ 316 #define BUS_DMASYNC_POSTREAD 0x01 317 #define BUS_DMASYNC_POSTWRITE 0x02 318 #define BUS_DMASYNC_PREREAD 0x04 319 #define BUS_DMASYNC_PREWRITE 0x08 320 321 typedef const struct hppa_bus_dma_tag *bus_dma_tag_t; 322 typedef struct hppa_bus_dmamap *bus_dmamap_t; 323 324 /* 325 * bus_dma_segment_t 326 * 327 * Describes a single contiguous DMA transaction. Values 328 * are suitable for programming into DMA registers. 329 */ 330 struct hppa_bus_dma_segment { 331 bus_addr_t ds_addr; /* DMA address */ 332 bus_size_t ds_len; /* length of transfer */ 333 }; 334 typedef struct hppa_bus_dma_segment bus_dma_segment_t; 335 336 /* 337 * bus_dma_tag_t 338 * 339 * A machine-dependent opaque type describing the implementation of 340 * DMA for a given bus. 341 */ 342 343 struct hppa_bus_dma_tag { 344 void *_cookie; /* cookie used in the guts */ 345 346 /* 347 * DMA mapping methods. 348 */ 349 int (*_dmamap_create)(void *, bus_size_t, int, 350 bus_size_t, bus_size_t, int, bus_dmamap_t *); 351 void (*_dmamap_destroy)(void *, bus_dmamap_t); 352 int (*_dmamap_load)(void *, bus_dmamap_t, void *, 353 bus_size_t, struct proc *, int); 354 int (*_dmamap_load_mbuf)(void *, bus_dmamap_t, 355 struct mbuf *, int); 356 int (*_dmamap_load_uio)(void *, bus_dmamap_t, 357 struct uio *, int); 358 int (*_dmamap_load_raw)(void *, bus_dmamap_t, 359 bus_dma_segment_t *, int, bus_size_t, int); 360 void (*_dmamap_unload)(void *, bus_dmamap_t); 361 void (*_dmamap_sync)(void *, bus_dmamap_t, bus_addr_t, 362 bus_size_t, int); 363 364 /* 365 * DMA memory utility functions. 366 */ 367 int (*_dmamem_alloc)(void *, bus_size_t, bus_size_t, 368 bus_size_t, bus_dma_segment_t *, int, int *, int); 369 void (*_dmamem_free)(void *, bus_dma_segment_t *, int); 370 int (*_dmamem_map)(void *, bus_dma_segment_t *, 371 int, size_t, caddr_t *, int); 372 void (*_dmamem_unmap)(void *, caddr_t, size_t); 373 paddr_t (*_dmamem_mmap)(void *, bus_dma_segment_t *, 374 int, off_t, int, int); 375 }; 376 377 #define bus_dmamap_create(t, s, n, m, b, f, p) \ 378 (*(t)->_dmamap_create)((t)->_cookie, (s), (n), (m), (b), (f), (p)) 379 #define bus_dmamap_destroy(t, p) \ 380 (*(t)->_dmamap_destroy)((t)->_cookie, (p)) 381 #define bus_dmamap_load(t, m, b, s, p, f) \ 382 (*(t)->_dmamap_load)((t)->_cookie, (m), (b), (s), (p), (f)) 383 #define bus_dmamap_load_mbuf(t, m, b, f) \ 384 (*(t)->_dmamap_load_mbuf)((t)->_cookie, (m), (b), (f)) 385 #define bus_dmamap_load_uio(t, m, u, f) \ 386 (*(t)->_dmamap_load_uio)((t)->_cookie, (m), (u), (f)) 387 #define bus_dmamap_load_raw(t, m, sg, n, s, f) \ 388 (*(t)->_dmamap_load_raw)((t)->_cookie, (m), (sg), (n), (s), (f)) 389 #define bus_dmamap_unload(t, p) \ 390 (*(t)->_dmamap_unload)((t)->_cookie, (p)) 391 #define bus_dmamap_sync(t, p, a, l, o) \ 392 (void)((t)->_dmamap_sync ? \ 393 (*(t)->_dmamap_sync)((t)->_cookie, (p), (a), (l), (o)) : (void)0) 394 395 #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \ 396 (*(t)->_dmamem_alloc)((t)->_cookie, (s), (a), (b), (sg), (n), (r), (f)) 397 #define bus_dmamem_free(t, sg, n) \ 398 (*(t)->_dmamem_free)((t)->_cookie, (sg), (n)) 399 #define bus_dmamem_map(t, sg, n, s, k, f) \ 400 (*(t)->_dmamem_map)((t)->_cookie, (sg), (n), (s), (k), (f)) 401 #define bus_dmamem_unmap(t, k, s) \ 402 (*(t)->_dmamem_unmap)((t)->_cookie, (k), (s)) 403 #define bus_dmamem_mmap(t, sg, n, o, p, f) \ 404 (*(t)->_dmamem_mmap)((t)->_cookie, (sg), (n), (o), (p), (f)) 405 406 /* 407 * bus_dmamap_t 408 * 409 * Describes a DMA mapping. 410 */ 411 struct hppa_bus_dmamap { 412 /* 413 * PRIVATE MEMBERS: not for use by machine-independent code. 414 */ 415 bus_size_t _dm_size; /* largest DMA transfer mappable */ 416 int _dm_segcnt; /* number of segs this map can map */ 417 bus_size_t _dm_maxsegsz; /* largest possible segment */ 418 bus_size_t _dm_boundary; /* don't cross this */ 419 int _dm_flags; /* misc. flags */ 420 vaddr_t _dm_va; /* needed for syncing */ 421 422 void *_dm_cookie; /* cookie for bus-specific functions */ 423 424 /* 425 * PUBLIC MEMBERS: these are used by machine-independent code. 426 */ 427 bus_size_t dm_mapsize; /* size of the mapping */ 428 int dm_nsegs; /* # valid segments in mapping */ 429 bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 430 }; 431 432 #endif /* _MACHINE_BUS_H_ */ 433