1 /* $OpenBSD: pte.h,v 1.11 2002/09/05 18:41:19 mickey Exp $ */ 2 3 /* 4 * Copyright (c) 1990,1993,1994 The University of Utah and 5 * the Computer Systems Laboratory at the University of Utah (CSL). 6 * All rights reserved. 7 * 8 * Permission to use, copy, modify and distribute this software is hereby 9 * granted provided that (1) source code retains these copyright, permission, 10 * and disclaimer notices, and (2) redistributions including binaries 11 * reproduce the notices in supporting documentation, and (3) all advertising 12 * materials mentioning features or use of this software display the following 13 * acknowledgement: ``This product includes software developed by the 14 * Computer Systems Laboratory at the University of Utah.'' 15 * 16 * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS 17 * IS" CONDITION. THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF 18 * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 19 * 20 * CSL requests users of this software to return to csl-dist@cs.utah.edu any 21 * improvements that they make and grant CSL redistribution rights. 22 * 23 * Utah $Hdr: pmap.h 1.24 94/12/14$ 24 * Author: Mike Hibler, Bob Wheeler, University of Utah CSL, 9/90 25 */ 26 27 #ifndef _MACHINE_PTE_H_ 28 #define _MACHINE_PTE_H_ 29 30 typedef u_int32_t pt_entry_t; 31 32 #define PTE_PROT_SHIFT 19 33 #define PTE_PROT(tlb) ((tlb) >> PTE_PROT_SHIFT) 34 #define TLB_PROT(pte) ((pte) << PTE_PROT_SHIFT) 35 #define PDE_MASK (0xffc00000) 36 #define PDE_SIZE (0x00400000) 37 #define PTE_MASK (0x003ff000) 38 #define PTE_PAGE(pte) ((pte) & ~PGOFSET) 39 40 /* TLB access/protection values */ 41 #define TLB_WIRED 0x40000000 /* software only */ 42 #define TLB_REFTRAP 0x20000000 43 #define TLB_DIRTY 0x10000000 44 #define TLB_BREAK 0x08000000 45 #define TLB_AR_MASK 0x07f00000 46 #define TLB_READ 0x00000000 47 #define TLB_WRITE 0x01000000 48 #define TLB_EXECUTE 0x02000000 49 #define TLB_GATEWAY 0x04000000 50 #define TLB_USER 0x00f00000 51 #define TLB_AR_NA 0x07300000 52 #define TLB_AR_R TLB_READ 53 #define TLB_AR_RW TLB_READ|TLB_WRITE 54 #define TLB_AR_RX TLB_READ|TLB_EXECUTE 55 #define TLB_AR_RWX TLB_READ|TLB_WRITE|TLB_EXECUTE 56 #define TLB_UNCACHABLE 0x00080000 57 #define TLB_PID_MASK 0x0000fffe 58 59 #define TLB_BITS "\020\024U\031W\032X\033N\034B\035D\036R\037H" 60 61 /* protection for a gateway page */ 62 #define TLB_GATE_PROT 0x04c00000 63 64 /* protection for break page */ 65 #define TLB_BREAK_PROT 0x02c00000 66 67 #endif /* _MACHINE_PTE_H_ */ 68