xref: /openbsd/sys/arch/i386/include/cpu.h (revision 17df1aa7)
1 /*	$OpenBSD: cpu.h,v 1.109 2009/12/09 14:27:34 oga Exp $	*/
2 /*	$NetBSD: cpu.h,v 1.35 1996/05/05 19:29:26 christos Exp $	*/
3 
4 /*-
5  * Copyright (c) 1990 The Regents of the University of California.
6  * All rights reserved.
7  *
8  * This code is derived from software contributed to Berkeley by
9  * William Jolitz.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. Neither the name of the University nor the names of its contributors
20  *    may be used to endorse or promote products derived from this software
21  *    without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33  * SUCH DAMAGE.
34  *
35  *	@(#)cpu.h	5.4 (Berkeley) 5/9/91
36  */
37 
38 #ifndef _I386_CPU_H_
39 #define _I386_CPU_H_
40 
41 /*
42  * Definitions unique to i386 cpu support.
43  */
44 #include <machine/frame.h>
45 #include <machine/psl.h>
46 #include <machine/segments.h>
47 #include <machine/intrdefs.h>
48 
49 #ifdef MULTIPROCESSOR
50 #include <machine/i82489reg.h>
51 #include <machine/i82489var.h>
52 #endif
53 
54 /*
55  * Arguments to hardclock, softclock and statclock
56  * encapsulate the previous machine state in an opaque
57  * clockframe; for now, use generic intrframe.
58  *
59  * XXX intrframe has a lot of gunk we don't need.
60  */
61 #define clockframe intrframe
62 
63 #include <sys/device.h>
64 #include <sys/lock.h>			/* will also get LOCKDEBUG */
65 #include <sys/sched.h>
66 #include <sys/sensors.h>
67 
68 struct intrsource;
69 
70 #ifdef _KERNEL
71 /* XXX stuff to move to cpuvar.h later */
72 struct cpu_info {
73 	struct device ci_dev;		/* our device */
74 	struct cpu_info *ci_self;	/* pointer to this structure */
75 	struct schedstate_percpu ci_schedstate; /* scheduler state */
76 	struct cpu_info *ci_next;	/* next cpu */
77 
78 	/*
79 	 * Public members.
80 	 */
81 	struct proc *ci_curproc; 	/* current owner of the processor */
82 	struct simplelock ci_slock;	/* lock on this data structure */
83 	cpuid_t ci_cpuid; 		/* our CPU ID */
84 	u_int ci_apicid;		/* our APIC ID */
85 #if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
86 	u_long ci_spin_locks;		/* # of spin locks held */
87 	u_long ci_simple_locks;		/* # of simple locks held */
88 #endif
89 	u_int32_t ci_randseed;
90 
91 	/*
92 	 * Private members.
93 	 */
94 	struct proc *ci_fpcurproc;	/* current owner of the FPU */
95 	int ci_fpsaving;		/* save in progress */
96 
97 	struct pcb *ci_curpcb;		/* VA of current HW PCB */
98 	struct pcb *ci_idle_pcb;	/* VA of current PCB */
99 	int ci_idle_tss_sel;		/* TSS selector of idle PCB */
100 	struct pmap *ci_curpmap;
101 
102 	struct intrsource *ci_isources[MAX_INTR_SOURCES];
103 	u_int32_t	ci_ipending;
104 	int		ci_ilevel;
105 	int		ci_idepth;
106 	u_int32_t	ci_imask[NIPL];
107 	u_int32_t	ci_iunmask[NIPL];
108 
109 	paddr_t		ci_idle_pcb_paddr; /* PA of idle PCB */
110 	u_long		ci_flags;	/* flags; see below */
111 	u_int32_t	ci_ipis; 	/* interprocessor interrupts pending */
112 	int		sc_apic_version;/* local APIC version */
113 
114 	u_int32_t	ci_level;
115 	u_int32_t	ci_vendor[4];
116 	u_int32_t	ci_signature;		/* X86 cpuid type */
117 	u_int32_t	ci_family;		/* extended cpuid family */
118 	u_int32_t	ci_model;		/* extended cpuid model */
119 	u_int32_t	ci_feature_flags;	/* X86 CPUID feature bits */
120 	u_int32_t	cpu_class;		/* CPU class */
121 	u_int32_t	ci_cflushsz;		/* clflush cache-line size */
122 
123 	struct cpu_functions *ci_func;	/* start/stop functions */
124 	void (*cpu_setup)(struct cpu_info *);	/* proc-dependant init */
125 
126 	int		ci_want_resched;
127 
128 	union descriptor *ci_gdt;
129 	union descriptor *ci_ldt;	/* per-cpu default LDT */
130 	int		ci_ldt_len;	/* in bytes */
131 
132 	volatile int ci_ddb_paused;	/* paused due to other proc in ddb */
133 #define CI_DDB_RUNNING		0
134 #define CI_DDB_SHOULDSTOP	1
135 #define CI_DDB_STOPPED		2
136 #define CI_DDB_ENTERDDB		3
137 #define CI_DDB_INDDB		4
138 
139 	volatile int ci_setperf_state;
140 #define CI_SETPERF_READY	0
141 #define CI_SETPERF_SHOULDSTOP	1
142 #define CI_SETPERF_INTRANSIT	2
143 #define CI_SETPERF_DONE		3
144 
145 	struct ksensordev	ci_sensordev;
146 	struct ksensor		ci_sensor;
147 };
148 
149 /*
150  * Processor flag notes: The "primary" CPU has certain MI-defined
151  * roles (mostly relating to hardclock handling); we distinguish
152  * betwen the processor which booted us, and the processor currently
153  * holding the "primary" role just to give us the flexibility later to
154  * change primaries should we be sufficiently twisted.
155  */
156 
157 #define	CPUF_BSP	0x0001		/* CPU is the original BSP */
158 #define	CPUF_AP		0x0002		/* CPU is an AP */
159 #define	CPUF_SP		0x0004		/* CPU is only processor */
160 #define	CPUF_PRIMARY	0x0008		/* CPU is active primary processor */
161 #define	CPUF_APIC_CD	0x0010		/* CPU has apic configured */
162 
163 #define	CPUF_PRESENT	0x1000		/* CPU is present */
164 #define	CPUF_RUNNING	0x2000		/* CPU is running */
165 
166 /*
167  * We statically allocate the CPU info for the primary CPU (or,
168  * the only CPU on uniprocessors), and the primary CPU is the
169  * first CPU on the CPU info list.
170  */
171 extern struct cpu_info cpu_info_primary;
172 extern struct cpu_info *cpu_info_list;
173 
174 #define	CPU_INFO_ITERATOR		int
175 #define	CPU_INFO_FOREACH(cii, ci)	for (cii = 0, ci = cpu_info_list; \
176 					    ci != NULL; ci = ci->ci_next)
177 
178 #define CPU_INFO_UNIT(ci)	((ci)->ci_dev.dv_unit)
179 
180 #ifdef MULTIPROCESSOR
181 
182 #define MAXCPUS			32	/* because we use a bitmask */
183 
184 #define CPU_STARTUP(_ci)	((_ci)->ci_func->start(_ci))
185 #define CPU_STOP(_ci)		((_ci)->ci_func->stop(_ci))
186 #define CPU_START_CLEANUP(_ci)	((_ci)->ci_func->cleanup(_ci))
187 
188 static struct cpu_info *curcpu(void);
189 
190 __inline static struct cpu_info *
191 curcpu(void)
192 {
193 	struct cpu_info *ci;
194 
195 	/* Can't include sys/param.h for offsetof() since it includes us */
196 	__asm __volatile("movl %%fs:%1, %0" :
197 		"=r" (ci) : "m"
198 		(*(struct cpu_info * const *)&((struct cpu_info *)0)->ci_self));
199 	return ci;
200 }
201 #define cpu_number() 		(curcpu()->ci_cpuid)
202 
203 #define CPU_IS_PRIMARY(ci)	((ci)->ci_flags & CPUF_PRIMARY)
204 
205 extern struct cpu_info	*cpu_info[MAXCPUS];
206 
207 extern void cpu_boot_secondary_processors(void);
208 extern void cpu_init_idle_pcbs(void);
209 
210 void cpu_unidle(struct cpu_info *);
211 
212 #else /* MULTIPROCESSOR */
213 
214 #define MAXCPUS			1
215 
216 #define cpu_number()		0
217 #define	curcpu()		(&cpu_info_primary)
218 
219 #define CPU_IS_PRIMARY(ci)	1
220 
221 #define cpu_unidle(ci)
222 
223 #endif
224 
225 #define aston(p)	((p)->p_md.md_astpending = 1)
226 
227 #define curpcb			curcpu()->ci_curpcb
228 
229 #define want_resched (curcpu()->ci_want_resched)
230 
231 /*
232  * Preempt the current process if in interrupt from user mode,
233  * or after the current trap/syscall if in system mode.
234  */
235 extern void need_resched(struct cpu_info *);
236 #define clear_resched(ci) (ci)->ci_want_resched = 0
237 
238 #define	CLKF_USERMODE(frame)	USERMODE((frame)->if_cs, (frame)->if_eflags)
239 #define	CLKF_PC(frame)		((frame)->if_eip)
240 #define	CLKF_INTR(frame)	(IDXSEL((frame)->if_cs) == GICODE_SEL)
241 
242 /*
243  * This is used during profiling to integrate system time.
244  */
245 #define	PROC_PC(p)		((p)->p_md.md_regs->tf_eip)
246 
247 /*
248  * Give a profiling tick to the current process when the user profiling
249  * buffer pages are invalid.  On the i386, request an ast to send us
250  * through trap(), marking the proc as needing a profiling tick.
251  */
252 #define	need_proftick(p)	aston(p)
253 
254 /*
255  * Notify the current process (p) that it has a signal pending,
256  * process as soon as possible.
257  */
258 void signotify(struct proc *);
259 
260 /*
261  * We need a machine-independent name for this.
262  */
263 extern void (*delay_func)(int);
264 struct timeval;
265 
266 #define	DELAY(x)		(*delay_func)(x)
267 #define delay(x)		(*delay_func)(x)
268 
269 /*
270  * High resolution clock support (Pentium only)
271  */
272 void	calibrate_cyclecounter(void);
273 
274 /*
275  * pull in #defines for kinds of processors
276  */
277 #include <machine/cputypes.h>
278 
279 struct cpu_nocpuid_nameclass {
280 	int cpu_vendor;
281 	const char *cpu_vendorname;
282 	const char *cpu_name;
283 	int cpu_class;
284 	void (*cpu_setup)(struct cpu_info *);
285 };
286 
287 struct cpu_cpuid_nameclass {
288 	const char *cpu_id;
289 	int cpu_vendor;
290 	const char *cpu_vendorname;
291 	struct cpu_cpuid_family {
292 		int cpu_class;
293 		const char *cpu_models[CPU_MAXMODEL+2];
294 		void (*cpu_setup)(struct cpu_info *);
295 	} cpu_family[CPU_MAXFAMILY - CPU_MINFAMILY + 1];
296 };
297 
298 struct cpu_cpuid_feature {
299 	int feature_bit;
300 	const char *feature_name;
301 };
302 
303 /* locore.s */
304 extern int cpu;
305 extern int cpu_id;
306 extern char cpu_vendor[]; /* note: NOT nul-terminated */
307 extern char cpu_brandstr[];
308 extern int cpuid_level;
309 extern int cpu_miscinfo;
310 extern int cpu_feature;
311 extern int cpu_ecxfeature;
312 extern int cpu_cache_eax;
313 extern int cpu_cache_ebx;
314 extern int cpu_cache_ecx;
315 extern int cpu_cache_edx;
316 
317 /* machdep.c */
318 extern int cpu_apmhalt;
319 extern int cpu_class;
320 extern char cpu_model[];
321 extern const struct cpu_nocpuid_nameclass i386_nocpuid_cpus[];
322 extern const struct cpu_cpuid_nameclass i386_cpuid_cpus[];
323 extern void (*cpu_idle_enter_fcn)(void);
324 extern void (*cpu_idle_cycle_fcn)(void);
325 extern void (*cpu_idle_leave_fcn)(void);
326 
327 /* apm.c */
328 extern int cpu_apmwarn;
329 
330 extern int cpuspeed;
331 
332 #if !defined(SMALL_KERNEL)
333 #define BUS66  6667
334 #define BUS100 10000
335 #define BUS133 13333
336 #define BUS166 16667
337 #define BUS200 20000
338 #define BUS266 26667
339 #define BUS333 33333
340 extern int bus_clock;
341 #endif
342 
343 /* F00F bug fix stuff for pentium cpu */
344 extern int cpu_f00f_bug;
345 void fix_f00f(void);
346 
347 /* dkcsum.c */
348 void	dkcsumattach(void);
349 
350 extern int i386_use_fxsave;
351 extern int i386_has_sse;
352 extern int i386_has_sse2;
353 
354 extern void (*update_cpuspeed)(void);
355 
356 /* machdep.c */
357 void	dumpconf(void);
358 void	cpu_reset(void);
359 void	i386_proc0_tss_ldt_init(void);
360 void	i386_init_pcb_tss_ldt(struct cpu_info *);
361 void	cpuid(u_int32_t, u_int32_t *);
362 
363 /* locore.s */
364 struct region_descriptor;
365 void	lgdt(struct region_descriptor *);
366 
367 struct pcb;
368 void	savectx(struct pcb *);
369 void	switch_exit(struct proc *);
370 void	proc_trampoline(void);
371 
372 /* clock.c */
373 void	initrtclock(void);
374 void	startrtclock(void);
375 void	rtcdrain(void *);
376 void	i8254_delay(int);
377 void	i8254_initclocks(void);
378 void	i8254_inittimecounter(void);
379 void	i8254_inittimecounter_simple(void);
380 
381 
382 #if !defined(SMALL_KERNEL)
383 /* est.c */
384 void	est_init(const char *, int);
385 void	est_setperf(int);
386 /* longrun.c */
387 void	longrun_init(void);
388 void	longrun_setperf(int);
389 /* p4tcc.c */
390 void	p4tcc_init(int, int);
391 void	p4tcc_setperf(int);
392 /* powernow.c */
393 void	k6_powernow_init(void);
394 void	k6_powernow_setperf(int);
395 /* powernow-k7.c */
396 void	k7_powernow_init(void);
397 void	k7_powernow_setperf(int);
398 /* powernow-k8.c */
399 void 	k8_powernow_init(void);
400 void 	k8_powernow_setperf(int);
401 #endif
402 
403 /* npx.c */
404 void	npxdrop(struct proc *);
405 void	npxsave_proc(struct proc *, int);
406 void	npxsave_cpu(struct cpu_info *, int);
407 
408 #ifdef USER_LDT
409 /* sys_machdep.h */
410 extern int user_ldt_enable;
411 int	i386_get_ldt(struct proc *, void *, register_t *);
412 int	i386_set_ldt(struct proc *, void *, register_t *);
413 #endif
414 
415 /* isa_machdep.c */
416 void	isa_defaultirq(void);
417 void	isa_nodefaultirq(void);
418 int	isa_nmi(void);
419 
420 /* pmap.c */
421 void	pmap_bootstrap(vaddr_t);
422 
423 /* vm_machdep.c */
424 int	kvtop(caddr_t);
425 
426 #ifdef MULTIPROCESSOR
427 /* mp_setperf.c */
428 void	mp_setperf_init(void);
429 #endif
430 
431 #ifdef VM86
432 /* vm86.c */
433 void	vm86_gpfault(struct proc *, int);
434 #endif /* VM86 */
435 
436 #ifdef GENERIC
437 /* swapgeneric.c */
438 void	setconf(void);
439 #endif /* GENERIC */
440 
441 #endif /* _KERNEL */
442 
443 /*
444  * CTL_MACHDEP definitions.
445  */
446 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
447 #define	CPU_BIOS		2	/* BIOS variables */
448 #define	CPU_BLK2CHR		3	/* convert blk maj into chr one */
449 #define	CPU_CHR2BLK		4	/* convert chr maj into blk one */
450 #define CPU_ALLOWAPERTURE	5	/* allow mmap of /dev/xf86 */
451 #define CPU_CPUVENDOR		6	/* cpuid vendor string */
452 #define CPU_CPUID		7	/* cpuid */
453 #define CPU_CPUFEATURE		8	/* cpuid features */
454 #define CPU_APMWARN		9	/* APM battery warning percentage */
455 #define CPU_KBDRESET		10	/* keyboard reset under pcvt */
456 #define CPU_APMHALT		11	/* halt -p hack */
457 #define CPU_USERLDT		12
458 #define CPU_OSFXSR		13	/* uses FXSAVE/FXRSTOR */
459 #define CPU_SSE			14	/* supports SSE */
460 #define CPU_SSE2		15	/* supports SSE2 */
461 #define CPU_XCRYPT		16	/* supports VIA xcrypt in userland */
462 #define CPU_MAXID		17	/* number of valid machdep ids */
463 
464 #define	CTL_MACHDEP_NAMES { \
465 	{ 0, 0 }, \
466 	{ "console_device", CTLTYPE_STRUCT }, \
467 	{ "bios", CTLTYPE_INT }, \
468 	{ "blk2chr", CTLTYPE_STRUCT }, \
469 	{ "chr2blk", CTLTYPE_STRUCT }, \
470 	{ "allowaperture", CTLTYPE_INT }, \
471 	{ "cpuvendor", CTLTYPE_STRING }, \
472 	{ "cpuid", CTLTYPE_INT }, \
473 	{ "cpufeature", CTLTYPE_INT }, \
474 	{ "apmwarn", CTLTYPE_INT }, \
475 	{ "kbdreset", CTLTYPE_INT }, \
476 	{ "apmhalt", CTLTYPE_INT }, \
477 	{ "userldt", CTLTYPE_INT }, \
478 	{ "osfxsr", CTLTYPE_INT }, \
479 	{ "sse", CTLTYPE_INT }, \
480 	{ "sse2", CTLTYPE_INT }, \
481 	{ "xcrypt", CTLTYPE_INT }, \
482 }
483 
484 /*
485  * This needs to be included late since it relies on definitions higher
486  * up in this file.
487  */
488 #if defined(MULTIPROCESSOR) && defined(_KERNEL)
489 #include <sys/mplock.h>
490 #endif
491 
492 #endif /* !_I386_CPU_H_ */
493