xref: /openbsd/sys/arch/i386/include/cpu.h (revision 3bef86f7)
1 /*	$OpenBSD: cpu.h,v 1.184 2024/01/24 19:23:39 cheloha Exp $	*/
2 /*	$NetBSD: cpu.h,v 1.35 1996/05/05 19:29:26 christos Exp $	*/
3 
4 /*-
5  * Copyright (c) 1990 The Regents of the University of California.
6  * All rights reserved.
7  *
8  * This code is derived from software contributed to Berkeley by
9  * William Jolitz.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. Neither the name of the University nor the names of its contributors
20  *    may be used to endorse or promote products derived from this software
21  *    without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33  * SUCH DAMAGE.
34  *
35  *	@(#)cpu.h	5.4 (Berkeley) 5/9/91
36  */
37 
38 #ifndef _MACHINE_CPU_H_
39 #define _MACHINE_CPU_H_
40 
41 /*
42  * Definitions unique to i386 cpu support.
43  */
44 #ifdef _KERNEL
45 #include <machine/frame.h>
46 #include <machine/psl.h>
47 #include <machine/segments.h>
48 #include <machine/intrdefs.h>
49 #include <machine/tss.h>
50 
51 #ifdef MULTIPROCESSOR
52 #include <machine/i82489reg.h>
53 #include <machine/i82489var.h>
54 #endif
55 
56 #endif /* _KERNEL */
57 
58 /*
59  * Arguments to hardclock, softclock and statclock
60  * encapsulate the previous machine state in an opaque
61  * clockframe; for now, use generic intrframe.
62  *
63  * XXX intrframe has a lot of gunk we don't need.
64  */
65 #define clockframe intrframe
66 
67 #include <sys/clockintr.h>
68 #include <sys/device.h>
69 #include <sys/sched.h>
70 #include <sys/sensors.h>
71 #include <sys/srp.h>
72 
73 struct intrsource;
74 
75 #ifdef _KERNEL
76 /* XXX stuff to move to cpuvar.h later */
77 struct cpu_info {
78 	u_int32_t	ci_kern_cr3;	/* U+K page table */
79 	u_int32_t	ci_scratch;	/* for U<-->K transition */
80 
81 #define ci_PAGEALIGN	ci_dev
82 	struct device *ci_dev;		/* our device */
83 	struct cpu_info *ci_self;	/* pointer to this structure */
84 	struct schedstate_percpu ci_schedstate; /* scheduler state */
85 	struct cpu_info *ci_next;	/* next cpu */
86 
87 	/*
88 	 * Public members.
89 	 */
90 	struct proc *ci_curproc; 	/* current owner of the processor */
91 	cpuid_t ci_cpuid; 		/* our CPU ID */
92 	u_int ci_apicid;		/* our APIC ID */
93 	u_int ci_acpi_proc_id;
94 	u_int32_t ci_randseed;
95 
96 	u_int32_t ci_kern_esp;		/* kernel-only stack */
97 	u_int32_t ci_intr_esp;		/* U<-->K trampoline stack */
98 	u_int32_t ci_user_cr3;		/* U-K page table */
99 
100 #if defined(MULTIPROCESSOR)
101 	struct srp_hazard ci_srp_hazards[SRP_HAZARD_NUM];
102 #endif
103 
104 	/*
105 	 * Private members.
106 	 */
107 	struct proc *ci_fpcurproc;	/* current owner of the FPU */
108 	struct proc *ci_fpsaveproc;
109 	int ci_fpsaving;		/* save in progress */
110 
111 	struct pcb *ci_curpcb;		/* VA of current HW PCB */
112 	struct pcb *ci_idle_pcb;	/* VA of current PCB */
113 	struct pmap *ci_curpmap;
114 
115 	struct intrsource *ci_isources[MAX_INTR_SOURCES];
116 	u_int32_t	ci_ipending;
117 	int		ci_ilevel;
118 	int		ci_idepth;
119 	u_int32_t	ci_imask[NIPL];
120 	u_int32_t	ci_iunmask[NIPL];
121 #ifdef DIAGNOSTIC
122 	int		ci_mutex_level;
123 #endif
124 
125 	paddr_t		ci_idle_pcb_paddr; /* PA of idle PCB */
126 	volatile u_long	ci_flags;	/* flags; see below */
127 	u_int32_t	ci_ipis; 	/* interprocessor interrupts pending */
128 
129 	u_int32_t	ci_level;
130 	u_int32_t	ci_vendor[4];
131 	u_int32_t	ci_signature;		/* X86 cpuid type */
132 	u_int32_t	ci_family;		/* extended cpuid family */
133 	u_int32_t	ci_model;		/* extended cpuid model */
134 	u_int32_t	ci_feature_flags;	/* X86 CPUID feature bits */
135 	u_int32_t	ci_feature_sefflags_ebx;/* more CPUID feature bits */
136 	u_int32_t	ci_feature_sefflags_ecx;/* more CPUID feature bits */
137 	u_int32_t	ci_feature_sefflags_edx;/* more CPUID feature bits */
138 	u_int32_t	ci_feature_tpmflags;	/* thermal & power bits */
139 	u_int32_t	cpu_class;		/* CPU class */
140 	u_int32_t	ci_cflushsz;		/* clflush cache-line size */
141 
142 	int		ci_inatomic;
143 
144 	struct cpu_functions *ci_func;	/* start/stop functions */
145 	void (*cpu_setup)(struct cpu_info *);	/* proc-dependant init */
146 
147 	struct device	*ci_acpicpudev;
148 	volatile u_int	ci_mwait;
149 #define	MWAIT_IN_IDLE		0x1	/* don't need IPI to wake */
150 #define	MWAIT_KEEP_IDLING	0x2	/* cleared by other cpus to wake me */
151 #define	MWAIT_ONLY		0x4	/* set if all idle states use mwait */
152 #define	MWAIT_IDLING		(MWAIT_IN_IDLE | MWAIT_KEEP_IDLING)
153 
154 	int		ci_want_resched;
155 
156 	union descriptor *ci_gdt;
157 	struct i386tss	*ci_tss;
158 	struct i386tss	*ci_nmi_tss;
159 
160 	volatile int ci_ddb_paused;	/* paused due to other proc in ddb */
161 #define CI_DDB_RUNNING		0
162 #define CI_DDB_SHOULDSTOP	1
163 #define CI_DDB_STOPPED		2
164 #define CI_DDB_ENTERDDB		3
165 #define CI_DDB_INDDB		4
166 
167 	struct ksensordev	ci_sensordev;
168 	struct ksensor		ci_sensor;
169 #if defined(GPROF) || defined(DDBPROF)
170 	struct gmonparam	*ci_gmon;
171 	struct clockintr	ci_gmonclock;
172 #endif
173 	struct clockintr_queue	ci_queue;
174 	char			ci_panicbuf[512];
175 };
176 
177 /*
178  * Processor flag notes: The "primary" CPU has certain MI-defined
179  * roles (mostly relating to hardclock handling); we distinguish
180  * between the processor which booted us, and the processor currently
181  * holding the "primary" role just to give us the flexibility later to
182  * change primaries should we be sufficiently twisted.
183  */
184 
185 #define	CPUF_BSP	0x0001		/* CPU is the original BSP */
186 #define	CPUF_AP		0x0002		/* CPU is an AP */
187 #define	CPUF_SP		0x0004		/* CPU is only processor */
188 #define	CPUF_PRIMARY	0x0008		/* CPU is active primary processor */
189 #define	CPUF_APIC_CD	0x0010		/* CPU has apic configured */
190 #define	CPUF_CONST_TSC	0x0020		/* CPU has constant TSC */
191 
192 #define	CPUF_PRESENT	0x1000		/* CPU is present */
193 #define	CPUF_RUNNING	0x2000		/* CPU is running */
194 #define CPUF_VMM	0x4000		/* CPU is executing in VMM mode */
195 
196 /*
197  * We statically allocate the CPU info for the primary CPU (or,
198  * the only CPU on uniprocessors), and the primary CPU is the
199  * first CPU on the CPU info list.
200  */
201 struct cpu_info_full;
202 extern struct cpu_info_full cpu_info_full_primary;
203 #define cpu_info_primary (*(struct cpu_info *)((char *)&cpu_info_full_primary + PAGE_SIZE*2 - offsetof(struct cpu_info, ci_PAGEALIGN)))
204 
205 extern struct cpu_info *cpu_info_list;
206 
207 #define	CPU_INFO_ITERATOR		int
208 #define	CPU_INFO_FOREACH(cii, ci)	for (cii = 0, ci = cpu_info_list; \
209 					    ci != NULL; ci = ci->ci_next)
210 
211 #define CPU_INFO_UNIT(ci)	((ci)->ci_dev ? (ci)->ci_dev->dv_unit : 0)
212 
213 #ifdef MULTIPROCESSOR
214 
215 #define MAXCPUS			32	/* because we use a bitmask */
216 
217 #define CPU_STARTUP(_ci)	((_ci)->ci_func->start(_ci))
218 #define CPU_STOP(_ci)		((_ci)->ci_func->stop(_ci))
219 #define CPU_START_CLEANUP(_ci)	((_ci)->ci_func->cleanup(_ci))
220 
221 static struct cpu_info *curcpu(void);
222 
223 static __inline struct cpu_info *
224 curcpu(void)
225 {
226 	struct cpu_info *ci;
227 
228 	/* Can't include sys/param.h for offsetof() since it includes us */
229 	__asm volatile("movl %%fs:%1, %0" :
230 		"=r" (ci) : "m"
231 		(*(struct cpu_info * const *)&((struct cpu_info *)0)->ci_self));
232 	return ci;
233 }
234 #define cpu_number() 		(curcpu()->ci_cpuid)
235 
236 #define CPU_IS_PRIMARY(ci)	((ci)->ci_flags & CPUF_PRIMARY)
237 #define CPU_IS_RUNNING(ci)	((ci)->ci_flags & CPUF_RUNNING)
238 
239 extern struct cpu_info	*cpu_info[MAXCPUS];
240 
241 extern void cpu_boot_secondary_processors(void);
242 extern void cpu_init_idle_pcbs(void);
243 
244 void cpu_kick(struct cpu_info *);
245 void cpu_unidle(struct cpu_info *);
246 
247 #define CPU_BUSY_CYCLE()	__asm volatile("pause": : : "memory")
248 
249 #else /* MULTIPROCESSOR */
250 
251 #define MAXCPUS			1
252 
253 #define cpu_number()		0
254 #define	curcpu()		(&cpu_info_primary)
255 
256 #define CPU_IS_PRIMARY(ci)	1
257 #define CPU_IS_RUNNING(ci)	1
258 
259 #define cpu_kick(ci)
260 #define cpu_unidle(ci)
261 
262 #define CPU_BUSY_CYCLE()	do {} while (0)
263 
264 #endif
265 
266 #include <machine/cpufunc.h>
267 
268 #define aston(p)	((p)->p_md.md_astpending = 1)
269 
270 #define curpcb			curcpu()->ci_curpcb
271 
272 unsigned int cpu_rnd_messybits(void);
273 
274 /*
275  * Preempt the current process if in interrupt from user mode,
276  * or after the current trap/syscall if in system mode.
277  */
278 extern void need_resched(struct cpu_info *);
279 #define clear_resched(ci) (ci)->ci_want_resched = 0
280 
281 #define	CLKF_USERMODE(frame)	USERMODE((frame)->if_cs, (frame)->if_eflags)
282 #define	CLKF_PC(frame)		((frame)->if_eip)
283 #define	CLKF_INTR(frame)	(IDXSEL((frame)->if_cs) == GICODE_SEL)
284 
285 /*
286  * This is used during profiling to integrate system time.
287  */
288 #define	PROC_PC(p)		((p)->p_md.md_regs->tf_eip)
289 #define	PROC_STACK(p)		((p)->p_md.md_regs->tf_esp)
290 
291 /*
292  * Give a profiling tick to the current process when the user profiling
293  * buffer pages are invalid.  On the i386, request an ast to send us
294  * through trap(), marking the proc as needing a profiling tick.
295  */
296 #define	need_proftick(p)	aston(p)
297 
298 /*
299  * Notify the current process (p) that it has a signal pending,
300  * process as soon as possible.
301  */
302 void signotify(struct proc *);
303 
304 /*
305  * We need a machine-independent name for this.
306  */
307 extern void (*delay_func)(int);
308 void delay_fini(void(*)(int));
309 void delay_init(void(*)(int), int);
310 struct timeval;
311 
312 #define	DELAY(x)		(*delay_func)(x)
313 #define delay(x)		(*delay_func)(x)
314 
315 /*
316  * High resolution clock support (Pentium only)
317  */
318 void	calibrate_cyclecounter(void);
319 
320 /*
321  * pull in #defines for kinds of processors
322  */
323 #include <machine/cputypes.h>
324 
325 struct cpu_cpuid_nameclass {
326 	const char *cpu_id;
327 	int cpu_vendor;
328 	const char *cpu_vendorname;
329 	struct cpu_cpuid_family {
330 		int cpu_class;
331 		const char *cpu_models[CPU_MAXMODEL+2];
332 		void (*cpu_setup)(struct cpu_info *);
333 	} cpu_family[CPU_MAXFAMILY - CPU_MINFAMILY + 1];
334 };
335 
336 struct cpu_cpuid_feature {
337 	int feature_bit;
338 	const char *feature_name;
339 };
340 
341 /* locore.s */
342 extern int cpu_id;
343 extern char cpu_vendor[]; /* note: NOT nul-terminated */
344 extern char cpu_brandstr[];
345 extern int cpuid_level;
346 extern int cpu_miscinfo;
347 extern int cpu_feature;
348 extern int ecpu_feature;
349 extern int cpu_ecxfeature;
350 extern int ecpu_ecxfeature;
351 extern int cpu_cache_eax;
352 extern int cpu_cache_ebx;
353 extern int cpu_cache_ecx;
354 extern int cpu_cache_edx;
355 extern int cpu_perf_eax;
356 extern int cpu_perf_ebx;
357 extern int cpu_perf_edx;
358 extern int cpu_apmi_edx;
359 extern int cpu_pae;	/* cpu has both PAE and NX features */
360 
361 /* cpu.c */
362 extern u_int cpu_mwait_size;
363 extern u_int cpu_mwait_states;
364 extern void cpu_update_nmi_cr3(vaddr_t);
365 extern void cpu_tsx_disable(struct cpu_info *);
366 
367 /* machdep.c */
368 extern int cpu_apmhalt;
369 extern int cpu_class;
370 extern char cpu_model[];
371 extern const struct cpu_cpuid_nameclass i386_cpuid_cpus[];
372 extern void (*cpu_idle_enter_fcn)(void);
373 extern void (*cpu_idle_cycle_fcn)(void);
374 extern void (*cpu_idle_leave_fcn)(void);
375 
376 extern int cpuspeed;
377 
378 #if !defined(SMALL_KERNEL)
379 #define BUS66  6667
380 #define BUS100 10000
381 #define BUS133 13333
382 #define BUS166 16667
383 #define BUS200 20000
384 #define BUS266 26667
385 #define BUS333 33333
386 extern int bus_clock;
387 #endif
388 
389 /* F00F bug fix stuff for pentium cpu */
390 extern int cpu_f00f_bug;
391 void fix_f00f(void);
392 
393 /* dkcsum.c */
394 void	dkcsumattach(void);
395 
396 extern int i386_use_fxsave;
397 extern int i386_has_sse;
398 extern int i386_has_sse2;
399 
400 extern void (*update_cpuspeed)(void);
401 
402 extern void (*initclock_func)(void);
403 extern void (*startclock_func)(void);
404 
405 /* machdep.c */
406 void	dumpconf(void);
407 void	cpu_reset(void);
408 void	i386_proc0_tss_init(void);
409 void	i386_init_pcb_tss(struct cpu_info *);
410 void	cpuid(u_int32_t, u_int32_t *);
411 
412 /* locore.s */
413 struct region_descriptor;
414 void	lgdt(struct region_descriptor *);
415 
416 struct pcb;
417 void	savectx(struct pcb *);
418 void	switch_exit(struct proc *);
419 void	proc_trampoline(void);
420 
421 /* clock.c */
422 void	startclocks(void);
423 void	rtcinit(void);
424 void	rtcstart(void);
425 void	rtcstop(void);
426 void	i8254_delay(int);
427 void	i8254_initclocks(void);
428 void	i8254_startclock(void);
429 void	i8254_start_both_clocks(void);
430 void	i8254_inittimecounter(void);
431 void	i8254_inittimecounter_simple(void);
432 
433 #if !defined(SMALL_KERNEL)
434 /* est.c */
435 void	est_init(struct cpu_info *, int);
436 void	est_setperf(int);
437 /* longrun.c */
438 void	longrun_init(void);
439 void	longrun_setperf(int);
440 /* p4tcc.c */
441 void	p4tcc_init(int, int);
442 void	p4tcc_setperf(int);
443 /* powernow.c */
444 void	k6_powernow_init(void);
445 void	k6_powernow_setperf(int);
446 /* powernow-k7.c */
447 void	k7_powernow_init(void);
448 void	k7_powernow_setperf(int);
449 /* powernow-k8.c */
450 void 	k8_powernow_init(void);
451 void 	k8_powernow_setperf(int);
452 /* k1x-pstate.c */
453 void k1x_init(struct cpu_info *);
454 void k1x_setperf(int);
455 #endif
456 
457 /* npx.c */
458 void	npxdrop(struct proc *);
459 void	npxsave_proc(struct proc *, int);
460 void	npxsave_cpu(struct cpu_info *, int);
461 
462 /* isa_machdep.c */
463 void	isa_defaultirq(void);
464 int	isa_nmi(void);
465 
466 /* pmap.c */
467 void	pmap_bootstrap(vaddr_t);
468 
469 /* vm_machdep.c */
470 int	kvtop(caddr_t);
471 
472 #ifdef MULTIPROCESSOR
473 /* mp_setperf.c */
474 void	mp_setperf_init(void);
475 #endif
476 
477 int	cpu_paenable(void *);
478 #endif /* _KERNEL */
479 
480 /*
481  * CTL_MACHDEP definitions.
482  */
483 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
484 #define	CPU_BIOS		2	/* BIOS variables */
485 #define	CPU_BLK2CHR		3	/* convert blk maj into chr one */
486 #define	CPU_CHR2BLK		4	/* convert chr maj into blk one */
487 #define CPU_ALLOWAPERTURE	5	/* allow mmap of /dev/xf86 */
488 #define CPU_CPUVENDOR		6	/* cpuid vendor string */
489 #define CPU_CPUID		7	/* cpuid */
490 #define CPU_CPUFEATURE		8	/* cpuid features */
491 #define CPU_KBDRESET		10	/* keyboard reset under pcvt */
492 #define CPU_OSFXSR		13	/* uses FXSAVE/FXRSTOR */
493 #define CPU_SSE			14	/* supports SSE */
494 #define CPU_SSE2		15	/* supports SSE2 */
495 #define CPU_XCRYPT		16	/* supports VIA xcrypt in userland */
496 #define CPU_LIDACTION		18	/* action caused by lid close */
497 #define CPU_FORCEUKBD		19	/* Force ukbd(4) as console keyboard */
498 #define CPU_MAXID		20	/* number of valid machdep ids */
499 
500 #define	CTL_MACHDEP_NAMES { \
501 	{ 0, 0 }, \
502 	{ "console_device", CTLTYPE_STRUCT }, \
503 	{ "bios", CTLTYPE_INT }, \
504 	{ "blk2chr", CTLTYPE_STRUCT }, \
505 	{ "chr2blk", CTLTYPE_STRUCT }, \
506 	{ "allowaperture", CTLTYPE_INT }, \
507 	{ "cpuvendor", CTLTYPE_STRING }, \
508 	{ "cpuid", CTLTYPE_INT }, \
509 	{ "cpufeature", CTLTYPE_INT }, \
510 	{ 0, 0 }, \
511 	{ "kbdreset", CTLTYPE_INT }, \
512 	{ 0, 0 }, \
513 	{ 0, 0 }, \
514 	{ "osfxsr", CTLTYPE_INT }, \
515 	{ "sse", CTLTYPE_INT }, \
516 	{ "sse2", CTLTYPE_INT }, \
517 	{ "xcrypt", CTLTYPE_INT }, \
518 	{ 0, 0 }, \
519 	{ "lidaction", CTLTYPE_INT }, \
520 	{ "forceukbd", CTLTYPE_INT }, \
521 }
522 
523 /*
524  * This needs to be included late since it relies on definitions higher
525  * up in this file.
526  */
527 #if defined(MULTIPROCESSOR) && defined(_KERNEL)
528 #include <sys/mplock.h>
529 #endif
530 
531 #endif /* !_MACHINE_CPU_H_ */
532