1 /* $OpenBSD: i8259.h,v 1.7 2015/09/02 13:39:23 mikeb Exp $ */ 2 /* $NetBSD: i8259.h,v 1.3 2003/05/04 22:01:56 fvdl Exp $ */ 3 4 /*- 5 * Copyright (c) 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * @(#)icu.h 5.6 (Berkeley) 5/9/91 36 */ 37 38 #ifndef _MACHINE_I8259_H_ 39 #define _MACHINE_I8259_H_ 40 41 #include <dev/isa/isareg.h> 42 43 #ifndef _LOCORE 44 45 /* 46 * Interrupt "level" mechanism variables, masks, and macros 47 */ 48 extern unsigned imen; /* interrupt mask enable */ 49 50 #define SET_ICUS() (outb(IO_ICU1 + 1, imen), outb(IO_ICU2 + 1, imen >> 8)) 51 52 #endif /* !_LOCORE */ 53 54 /* 55 * Interrupt enable bits -- in order of priority 56 */ 57 #define IRQ_SLAVE 2 58 59 /* 60 * Interrupt Control offset into Interrupt descriptor table (IDT) 61 */ 62 #define ICU_OFFSET 32 /* 0-31 are processor exceptions */ 63 #define ICU_LEN 16 /* 32-47 are ISA interrupts */ 64 65 66 #define ICU_HARDWARE_MASK 67 68 /* 69 * These macros are fairly self explanatory. If ICU_SPECIAL_MASK_MODE is 70 * defined, we try to take advantage of the ICU's `special mask mode' by only 71 * EOIing the interrupts on return. This avoids the requirement of masking and 72 * unmasking. We can't do this without special mask mode, because the ICU 73 * would also hold interrupts that it thinks are of lower priority. 74 * 75 * Many machines do not support special mask mode, so by default we don't try 76 * to use it. 77 */ 78 79 #define IRQ_BIT(num) (1 << ((num) % 8)) 80 #define IRQ_BYTE(num) ((num) >> 3) 81 82 #define i8259_late_ack(num) 83 84 #ifdef ICU_SPECIAL_MASK_MODE 85 86 #define i8259_asm_ack1(num) 87 #define i8259_asm_ack2(num) \ 88 movb $(0x60|IRQ_SLAVE),%al /* specific EOI for IRQ2 */ ;\ 89 outb %al,$IO_ICU1 90 #define i8259_asm_mask(num) 91 #define i8259_asm_unmask(num) \ 92 movb $(0x60|(num%8)),%al /* specific EOI */ ;\ 93 outb %al,$ICUADDR 94 95 #else /* ICU_SPECIAL_MASK_MODE */ 96 97 #ifndef AUTO_EOI_1 98 #define i8259_asm_ack1(num) \ 99 movb $(0x60|(num%8)),%al /* specific EOI */ ;\ 100 outb %al,$IO_ICU1 101 #else 102 #define i8259_asm_ack1(num) 103 #endif 104 105 #ifndef AUTO_EOI_2 106 #define i8259_asm_ack2(num) \ 107 movb $(0x60|(num%8)),%al /* specific EOI */ ;\ 108 outb %al,$IO_ICU2 /* do the second ICU first */ ;\ 109 movb $(0x60|IRQ_SLAVE),%al /* specific EOI for IRQ2 */ ;\ 110 outb %al,$IO_ICU1 111 #else 112 #define i8259_asm_ack2(num) 113 #endif 114 115 #ifdef ICU_HARDWARE_MASK 116 117 #define i8259_asm_mask(num) \ 118 movb CVAROFF(imen, IRQ_BYTE(num)),%al ;\ 119 orb $IRQ_BIT(num),%al ;\ 120 movb %al,CVAROFF(imen, IRQ_BYTE(num)) ;\ 121 pushl %eax ;\ 122 inb $0x84,%al ;\ 123 popl %eax ;\ 124 outb %al,$(ICUADDR+1) 125 #define i8259_asm_unmask(num) \ 126 cli ;\ 127 movb CVAROFF(imen, IRQ_BYTE(num)),%al ;\ 128 andb $~IRQ_BIT(num),%al ;\ 129 movb %al,CVAROFF(imen, IRQ_BYTE(num)) ;\ 130 pushl %eax ;\ 131 inb $0x84,%al ;\ 132 popl %eax ;\ 133 outb %al,$(ICUADDR+1) ;\ 134 sti 135 136 #else /* ICU_HARDWARE_MASK */ 137 138 #define i8259_asm_mask(num) 139 #define i8259_asm_unmask(num) 140 141 #endif /* ICU_HARDWARE_MASK */ 142 #endif /* ICU_SPECIAL_MASK_MODE */ 143 144 #endif /* !_MACHINE_I8259_H_ */ 145