xref: /openbsd/sys/arch/i386/include/pmap.h (revision cca36db2)
1 /*	$OpenBSD: pmap.h,v 1.59 2011/06/25 19:20:41 jsg Exp $	*/
2 /*	$NetBSD: pmap.h,v 1.44 2000/04/24 17:18:18 thorpej Exp $	*/
3 
4 /*
5  *
6  * Copyright (c) 1997 Charles D. Cranor and Washington University.
7  * All rights reserved.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgment:
19  *      This product includes software developed by Charles D. Cranor and
20  *      Washington University.
21  * 4. The name of the author may not be used to endorse or promote products
22  *    derived from this software without specific prior written permission.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
25  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
26  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
28  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
29  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
31  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
33  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34  */
35 
36 /*
37  * pmap.h: see pmap.c for the history of this pmap module.
38  */
39 
40 #ifndef	_MACHINE_PMAP_H_
41 #define	_MACHINE_PMAP_H_
42 
43 #include <machine/cpufunc.h>
44 #include <machine/pte.h>
45 #include <machine/segments.h>
46 #include <uvm/uvm_object.h>
47 
48 /*
49  * See pte.h for a description of i386 MMU terminology and hardware
50  * interface.
51  *
52  * A pmap describes a process' 4GB virtual address space.  This
53  * virtual address space can be broken up into 1024 4MB regions which
54  * are described by PDEs in the PDP.  The PDEs are defined as follows:
55  *
56  * Ranges are inclusive -> exclusive, just like vm_map_entry start/end.
57  * The following assumes that KERNBASE is 0xd0000000.
58  *
59  * PDE#s	VA range		Usage
60  * 0->831	0x0 -> 0xcfc00000	user address space, note that the
61  *					max user address is 0xcfbfe000
62  *					the final two pages in the last 4MB
63  *					used to be reserved for the UAREA
64  *					but now are no longer used.
65  * 831		0xcfc00000->		recursive mapping of PDP (used for
66  *			0xd0000000	linear mapping of PTPs).
67  * 832->1023	0xd0000000->		kernel address space (constant
68  *			0xffc00000	across all pmaps/processes).
69  * 1023		0xffc00000->		"alternate" recursive PDP mapping
70  *			<end>		(for other pmaps).
71  *
72  *
73  * Note: A recursive PDP mapping provides a way to map all the PTEs for
74  * a 4GB address space into a linear chunk of virtual memory.  In other
75  * words, the PTE for page 0 is the first int mapped into the 4MB recursive
76  * area.  The PTE for page 1 is the second int.  The very last int in the
77  * 4MB range is the PTE that maps VA 0xffffe000 (the last page in a 4GB
78  * address).
79  *
80  * All pmaps' PDs must have the same values in slots 832->1023 so that
81  * the kernel is always mapped in every process.  These values are loaded
82  * into the PD at pmap creation time.
83  *
84  * At any one time only one pmap can be active on a processor.  This is
85  * the pmap whose PDP is pointed to by processor register %cr3.  This pmap
86  * will have all its PTEs mapped into memory at the recursive mapping
87  * point (slot #831 as show above).  When the pmap code wants to find the
88  * PTE for a virtual address, all it has to do is the following:
89  *
90  * Address of PTE = (831 * 4MB) + (VA / NBPG) * sizeof(pt_entry_t)
91  *                = 0xcfc00000 + (VA / 4096) * 4
92  *
93  * What happens if the pmap layer is asked to perform an operation
94  * on a pmap that is not the one which is currently active?  In that
95  * case we take the PA of the PDP of non-active pmap and put it in
96  * slot 1023 of the active pmap.  This causes the non-active pmap's
97  * PTEs to get mapped in the final 4MB of the 4GB address space
98  * (e.g. starting at 0xffc00000).
99  *
100  * The following figure shows the effects of the recursive PDP mapping:
101  *
102  *   PDP (%cr3)
103  *   +----+
104  *   |   0| -> PTP#0 that maps VA 0x0 -> 0x400000
105  *   |    |
106  *   |    |
107  *   | 831| -> points back to PDP (%cr3) mapping VA 0xcfc00000 -> 0xd0000000
108  *   | 832| -> first kernel PTP (maps 0xd0000000 -> 0xe0400000)
109  *   |    |
110  *   |1023| -> points to alternate pmap's PDP (maps 0xffc00000 -> end)
111  *   +----+
112  *
113  * Note that the PDE#831 VA (0xcfc00000) is defined as "PTE_BASE".
114  * Note that the PDE#1023 VA (0xffc00000) is defined as "APTE_BASE".
115  *
116  * Starting at VA 0xcfc00000 the current active PDP (%cr3) acts as a
117  * PTP:
118  *
119  * PTP#831 == PDP(%cr3) => maps VA 0xcfc00000 -> 0xd0000000
120  *   +----+
121  *   |   0| -> maps the contents of PTP#0 at VA 0xcfc00000->0xcfc01000
122  *   |    |
123  *   |    |
124  *   | 831| -> maps the contents of PTP#831 (the PDP) at VA 0xcff3f000
125  *   | 832| -> maps the contents of first kernel PTP
126  *   |    |
127  *   |1023|
128  *   +----+
129  *
130  * Note that mapping of the PDP at PTP#831's VA (0xcff3f000) is
131  * defined as "PDP_BASE".... within that mapping there are two
132  * defines:
133  *   "PDP_PDE" (0xcff3fcfc) is the VA of the PDE in the PDP
134  *      which points back to itself.
135  *   "APDP_PDE" (0xcff3fffc) is the VA of the PDE in the PDP which
136  *      establishes the recursive mapping of the alternate pmap.
137  *      To set the alternate PDP, one just has to put the correct
138  *	PA info in *APDP_PDE.
139  *
140  * Note that in the APTE_BASE space, the APDP appears at VA
141  * "APDP_BASE" (0xfffff000).
142  */
143 
144 /*
145  * The following defines identify the slots used as described above.
146  */
147 
148 #define PDSLOT_PTE	((KERNBASE/NBPD)-1) /* 831: for recursive PDP map */
149 #define PDSLOT_KERN	(KERNBASE/NBPD)	    /* 832: start of kernel space */
150 #define PDSLOT_APTE	((unsigned)1023) /* 1023: alternative recursive slot */
151 
152 /*
153  * The following defines give the virtual addresses of various MMU
154  * data structures:
155  * PTE_BASE and APTE_BASE: the base VA of the linear PTE mappings
156  * PTD_BASE and APTD_BASE: the base VA of the recursive mapping of the PTD
157  * PDP_PDE and APDP_PDE: the VA of the PDE that points back to the PDP/APDP
158  */
159 
160 #define PTE_BASE	((pt_entry_t *)  (PDSLOT_PTE * NBPD) )
161 #define APTE_BASE	((pt_entry_t *)  (PDSLOT_APTE * NBPD) )
162 #define PDP_BASE ((pd_entry_t *)(((char *)PTE_BASE) + (PDSLOT_PTE * NBPG)))
163 #define APDP_BASE ((pd_entry_t *)(((char *)APTE_BASE) + (PDSLOT_APTE * NBPG)))
164 #define PDP_PDE		(PDP_BASE + PDSLOT_PTE)
165 #define APDP_PDE	(PDP_BASE + PDSLOT_APTE)
166 
167 /*
168  * The following define determines how many PTPs should be set up for the
169  * kernel by locore.s at boot time.  This should be large enough to
170  * get the VM system running.  Once the VM system is running, the
171  * pmap module can add more PTPs to the kernel area on demand.
172  */
173 
174 #ifndef NKPTP
175 #define NKPTP		4	/* 16MB to start */
176 #endif
177 #define NKPTP_MIN	4	/* smallest value we allow */
178 #define NKPTP_MAX	(1024 - (KERNBASE/NBPD) - 1)
179 				/* largest value (-1 for APTP space) */
180 
181 /*
182  * various address macros
183  *
184  *  vtopte: return a pointer to the PTE mapping a VA
185  *  kvtopte: same as above (takes a KVA, but doesn't matter with this pmap)
186  *  ptetov: given a pointer to a PTE, return the VA that it maps
187  *  vtophys: translate a VA to the PA mapped to it
188  *
189  * plus alternative versions of the above
190  */
191 
192 #define vtopte(VA)	(PTE_BASE + atop(VA))
193 #define kvtopte(VA)	vtopte(VA)
194 #define ptetov(PT)	(ptoa(PT - PTE_BASE))
195 #define	vtophys(VA)	((*vtopte(VA) & PG_FRAME) | \
196 			 ((unsigned)(VA) & ~PG_FRAME))
197 #define	avtopte(VA)	(APTE_BASE + atop(VA))
198 #define	ptetoav(PT)	(ptoa(PT - APTE_BASE))
199 #define	avtophys(VA)	((*avtopte(VA) & PG_FRAME) | \
200 			 ((unsigned)(VA) & ~PG_FRAME))
201 
202 /*
203  * pdei/ptei: generate index into PDP/PTP from a VA
204  */
205 #define	pdei(VA)	(((VA) & PD_MASK) >> PDSHIFT)
206 #define	ptei(VA)	(((VA) & PT_MASK) >> PGSHIFT)
207 
208 /*
209  * PTP macros:
210  *   A PTP's index is the PD index of the PDE that points to it.
211  *   A PTP's offset is the byte-offset in the PTE space that this PTP is at.
212  *   A PTP's VA is the first VA mapped by that PTP.
213  *
214  * Note that NBPG == number of bytes in a PTP (4096 bytes == 1024 entries)
215  *           NBPD == number of bytes a PTP can map (4MB)
216  */
217 
218 #define ptp_i2o(I)	((I) * NBPG)	/* index => offset */
219 #define ptp_o2i(O)	((O) / NBPG)	/* offset => index */
220 #define ptp_i2v(I)	((I) * NBPD)	/* index => VA */
221 #define ptp_v2i(V)	((V) / NBPD)	/* VA => index (same as pdei) */
222 
223 /*
224  * PG_AVAIL usage: we make use of the ignored bits of the PTE
225  */
226 
227 #define PG_W		PG_AVAIL1	/* "wired" mapping */
228 #define PG_PVLIST	PG_AVAIL2	/* mapping has entry on pvlist */
229 #define	PG_X		PG_AVAIL3	/* executable mapping */
230 
231 /*
232  * Number of PTE's per cache line.  4 byte pte, 32-byte cache line
233  * Used to avoid false sharing of cache lines.
234  */
235 #define NPTECL			8
236 
237 #ifdef _KERNEL
238 /*
239  * pmap data structures: see pmap.c for details of locking.
240  */
241 
242 struct pmap;
243 typedef struct pmap *pmap_t;
244 
245 /*
246  * We maintain a list of all non-kernel pmaps.
247  */
248 
249 LIST_HEAD(pmap_head, pmap); /* struct pmap_head: head of a pmap list */
250 
251 /*
252  * The pmap structure
253  *
254  * Note that the pm_obj contains the simple_lock, the reference count,
255  * page list, and number of PTPs within the pmap.
256  */
257 
258 struct pmap {
259 	struct uvm_object pm_obj;	/* object (lck by object lock) */
260 #define	pm_lock	pm_obj.vmobjlock
261 	LIST_ENTRY(pmap) pm_list;	/* list (lck by pm_list lock) */
262 	pd_entry_t *pm_pdir;		/* VA of PD (lck by object lock) */
263 	paddr_t pm_pdirpa;		/* PA of PD (read-only after create) */
264 	struct vm_page *pm_ptphint;	/* pointer to a PTP in our pmap */
265 	struct pmap_statistics pm_stats;  /* pmap stats (lck by object lock) */
266 
267 	vaddr_t pm_hiexec;		/* highest executable mapping */
268 	int pm_flags;			/* see below */
269 
270 	struct	segment_descriptor pm_codeseg;	/* cs descriptor for process */
271 	union descriptor *pm_ldt;	/* user-set LDT */
272 	int pm_ldt_len;			/* number of LDT entries */
273 	int pm_ldt_sel;			/* LDT selector */
274 };
275 
276 /* pm_flags */
277 #define	PMF_USER_LDT	0x01	/* pmap has user-set LDT */
278 
279 /*
280  * For each managed physical page we maintain a list of <PMAP,VA>s
281  * which it is mapped at.  The list is headed by a pv_head structure.
282  * there is one pv_head per managed phys page (allocated at boot time).
283  * The pv_head structure points to a list of pv_entry structures (each
284  * describes one mapping).
285  */
286 
287 struct pv_entry {			/* locked by its list's pvh_lock */
288 	struct pv_entry *pv_next;	/* next entry */
289 	struct pmap *pv_pmap;		/* the pmap */
290 	vaddr_t pv_va;			/* the virtual address */
291 	struct vm_page *pv_ptp;		/* the vm_page of the PTP */
292 };
293 /*
294  * MD flags to pmap_enter:
295  */
296 
297 /* to get just the pa from params to pmap_enter */
298 #define PMAP_PA_MASK	~((paddr_t)PAGE_MASK)
299 #define	PMAP_NOCACHE	0x1		/* map uncached */
300 #define	PMAP_WC		0x2		/* map write combining. */
301 
302 /*
303  * We keep mod/ref flags in struct vm_page->pg_flags.
304  */
305 #define	PG_PMAP_MOD	PG_PMAP0
306 #define	PG_PMAP_REF	PG_PMAP1
307 #define	PG_PMAP_WC	PG_PMAP2
308 
309 /*
310  * pv_entrys are dynamically allocated in chunks from a single page.
311  * we keep track of how many pv_entrys are in use for each page and
312  * we can free pv_entry pages if needed.  There is one lock for the
313  * entire allocation system.
314  */
315 
316 struct pv_page_info {
317 	TAILQ_ENTRY(pv_page) pvpi_list;
318 	struct pv_entry *pvpi_pvfree;
319 	int pvpi_nfree;
320 };
321 
322 /*
323  * number of pv_entries in a pv_page
324  * (note: won't work on systems where NPBG isn't a constant)
325  */
326 
327 #define PVE_PER_PVPAGE ((NBPG - sizeof(struct pv_page_info)) / \
328 			sizeof(struct pv_entry))
329 
330 /*
331  * a pv_page: where pv_entrys are allocated from
332  */
333 
334 struct pv_page {
335 	struct pv_page_info pvinfo;
336 	struct pv_entry pvents[PVE_PER_PVPAGE];
337 };
338 
339 /*
340  * global kernel variables
341  */
342 
343 extern pd_entry_t	PTD[];
344 
345 /* PTDpaddr: is the physical address of the kernel's PDP */
346 extern u_int32_t PTDpaddr;
347 
348 extern struct pmap kernel_pmap_store;	/* kernel pmap */
349 extern int nkpde;			/* current # of PDEs for kernel */
350 extern int pmap_pg_g;			/* do we support PG_G? */
351 
352 /*
353  * Macros
354  */
355 
356 #define	pmap_kernel()			(&kernel_pmap_store)
357 #define	pmap_wired_count(pmap)		((pmap)->pm_stats.wired_count)
358 #define	pmap_resident_count(pmap)	((pmap)->pm_stats.resident_count)
359 #define	pmap_update(pm)			/* nada */
360 
361 #define pmap_clear_modify(pg)		pmap_clear_attrs(pg, PG_M)
362 #define pmap_clear_reference(pg)	pmap_clear_attrs(pg, PG_U)
363 #define pmap_copy(DP,SP,D,L,S)
364 #define pmap_is_modified(pg)		pmap_test_attrs(pg, PG_M)
365 #define pmap_is_referenced(pg)		pmap_test_attrs(pg, PG_U)
366 #define pmap_valid_entry(E) 		((E) & PG_V) /* is PDE or PTE valid? */
367 
368 #define pmap_proc_iflush(p,va,len)	/* nothing */
369 #define pmap_unuse_final(p)		/* nothing */
370 #define	pmap_remove_holes(map)		do { /* nothing */ } while (0)
371 
372 
373 /*
374  * Prototypes
375  */
376 
377 void		pmap_bootstrap(vaddr_t);
378 boolean_t	pmap_clear_attrs(struct vm_page *, int);
379 static void	pmap_page_protect(struct vm_page *, vm_prot_t);
380 void		pmap_page_remove(struct vm_page *);
381 static void	pmap_protect(struct pmap *, vaddr_t,
382 				vaddr_t, vm_prot_t);
383 void		pmap_remove(struct pmap *, vaddr_t, vaddr_t);
384 boolean_t	pmap_test_attrs(struct vm_page *, int);
385 void		pmap_write_protect(struct pmap *, vaddr_t,
386 				vaddr_t, vm_prot_t);
387 int		pmap_exec_fixup(struct vm_map *, struct trapframe *,
388 		    struct pcb *);
389 void		pmap_switch(struct proc *, struct proc *);
390 
391 vaddr_t reserve_dumppages(vaddr_t); /* XXX: not a pmap fn */
392 
393 void	pmap_tlb_shootpage(struct pmap *, vaddr_t);
394 void	pmap_tlb_shootrange(struct pmap *, vaddr_t, vaddr_t);
395 void	pmap_tlb_shoottlb(void);
396 #ifdef MULTIPROCESSOR
397 void	pmap_tlb_droppmap(struct pmap *);
398 void	pmap_tlb_shootwait(void);
399 #else
400 #define pmap_tlb_shootwait()
401 #endif
402 
403 void	pmap_prealloc_lowmem_ptp(paddr_t);
404 
405 /*
406  * functions for flushing the cache for vaddrs and pages.
407  * these functions are not part of the MI pmap interface and thus
408  * should not be used as such.
409  */
410 void	pmap_flush_cache(vaddr_t, vsize_t);
411 void	pmap_flush_page(paddr_t);
412 
413 #define PMAP_GROWKERNEL		/* turn on pmap_growkernel interface */
414 
415 /*
416  * Do idle page zero'ing uncached to avoid polluting the cache.
417  */
418 boolean_t	pmap_zero_page_uncached(paddr_t);
419 #define	PMAP_PAGEIDLEZERO(pg)	pmap_zero_page_uncached(VM_PAGE_TO_PHYS(pg))
420 
421 /*
422  * Inline functions
423  */
424 
425 /*
426  * pmap_update_pg: flush one page from the TLB (or flush the whole thing
427  *	if hardware doesn't support one-page flushing)
428  */
429 
430 #define pmap_update_pg(va)	invlpg((u_int)(va))
431 
432 /*
433  * pmap_update_2pg: flush two pages from the TLB
434  */
435 
436 #define pmap_update_2pg(va, vb) { invlpg((u_int)(va)); invlpg((u_int)(vb)); }
437 
438 /*
439  * pmap_page_protect: change the protection of all recorded mappings
440  *	of a managed page
441  *
442  * => This function is a front end for pmap_page_remove/pmap_clear_attrs
443  * => We only have to worry about making the page more protected.
444  *	Unprotecting a page is done on-demand at fault time.
445  */
446 
447 __inline static void
448 pmap_page_protect(struct vm_page *pg, vm_prot_t prot)
449 {
450 	if ((prot & VM_PROT_WRITE) == 0) {
451 		if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
452 			(void) pmap_clear_attrs(pg, PG_RW);
453 		} else {
454 			pmap_page_remove(pg);
455 		}
456 	}
457 }
458 
459 /*
460  * pmap_protect: change the protection of pages in a pmap
461  *
462  * => This function is a front end for pmap_remove/pmap_write_protect.
463  * => We only have to worry about making the page more protected.
464  *	Unprotecting a page is done on-demand at fault time.
465  */
466 
467 __inline static void
468 pmap_protect(struct pmap *pmap, vaddr_t sva, vaddr_t eva, vm_prot_t prot)
469 {
470 	if ((prot & VM_PROT_WRITE) == 0) {
471 		if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
472 			pmap_write_protect(pmap, sva, eva, prot);
473 		} else {
474 			pmap_remove(pmap, sva, eva);
475 		}
476 	}
477 }
478 
479 #if defined(USER_LDT)
480 void	pmap_ldt_cleanup(struct proc *);
481 #define	PMAP_FORK
482 #endif /* USER_LDT */
483 
484 #endif /* _KERNEL */
485 #endif	/* _MACHINE_PMAP_H_ */
486