1*38a3e2e8Smiod /* $OpenBSD: smfbreg.h,v 1.5 2010/08/27 12:48:54 miod Exp $ */ 2f1558498Smiod 3f1558498Smiod /* 49525108cSmiod * Copyright (c) 2009, 2010 Miodrag Vallat. 5f1558498Smiod * 6f1558498Smiod * Permission to use, copy, modify, and distribute this software for any 7f1558498Smiod * purpose with or without fee is hereby granted, provided that the above 8f1558498Smiod * copyright notice and this permission notice appear in all copies. 9f1558498Smiod * 10f1558498Smiod * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11f1558498Smiod * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12f1558498Smiod * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13f1558498Smiod * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14f1558498Smiod * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15f1558498Smiod * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16f1558498Smiod * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17f1558498Smiod */ 18f1558498Smiod 19f1558498Smiod /* 20f1558498Smiod * Silicon Motion SM712 registers 21f1558498Smiod */ 22f1558498Smiod 23f1558498Smiod /* 24f1558498Smiod * DPR (2D drawing engine) 25f1558498Smiod */ 26f1558498Smiod 27f1558498Smiod #define DPR_COORDS(x, y) (((x) << 16) | (y)) 28f1558498Smiod 299525108cSmiod #define SM5XX_DPR_BASE 0x00100000 309525108cSmiod #define SM7XX_DPR_BASE 0x00408000 31*38a3e2e8Smiod #define SMXXX_DPR_SIZE 0x00004000 329525108cSmiod 33f1558498Smiod #define DPR_SRC_COORDS 0x00 34f1558498Smiod #define DPR_DST_COORDS 0x04 35f1558498Smiod #define DPR_SPAN_COORDS 0x08 36f1558498Smiod #define DPR_DE_CTRL 0x0c 37f1558498Smiod #define DPR_PITCH 0x10 38f1558498Smiod #define DPR_FG_COLOR 0x14 39f1558498Smiod #define DPR_BG_COLOR 0x18 40f1558498Smiod #define DPR_STRETCH 0x1c 41f1558498Smiod #define DPR_COLOR_COMPARE 0x20 42f1558498Smiod #define DPR_COLOR_COMPARE_MASK 0x24 43f1558498Smiod #define DPR_BYTE_BIT_MASK 0x28 44f1558498Smiod #define DPR_CROP_TOPLEFT_COORDS 0x2c 45f1558498Smiod #define DPR_CROP_BOTRIGHT_COORDS 0x30 46f1558498Smiod #define DPR_MONO_PATTERN_LO32 0x34 47f1558498Smiod #define DPR_MONO_PATTERN_HI32 0x38 48f1558498Smiod #define DPR_SRC_WINDOW 0x3c 49f1558498Smiod #define DPR_SRC_BASE 0x40 50f1558498Smiod #define DPR_DST_BASE 0x44 51f1558498Smiod 52f1558498Smiod #define DE_CTRL_START 0x80000000 53f1558498Smiod #define DE_CTRL_RTOL 0x08000000 54f1558498Smiod #define DE_CTRL_COMMAND_MASK 0x001f0000 55f1558498Smiod #define DE_CTRL_COMMAND_SHIFT 16 56f1558498Smiod #define DE_CTRL_COMMAND_BITBLT 0x00 57f1558498Smiod #define DE_CTRL_COMMAND_SOLIDFILL 0x01 58f1558498Smiod #define DE_CTRL_ROP_ENABLE 0x00008000 59f1558498Smiod #define DE_CTRL_ROP_MASK 0x000000ff 60f1558498Smiod #define DE_CTRL_ROP_SHIFT 0 61f1558498Smiod #define DE_CTRL_ROP_SRC 0x0c 62f1558498Smiod 63f1558498Smiod /* 64f1558498Smiod * VPR (Video Parameter Registers) 65f1558498Smiod */ 66f1558498Smiod 679525108cSmiod #define SM7XX_VPR_BASE 0x0040c000 68f1558498Smiod 69f1558498Smiod /* 709525108cSmiod * MMIO (SM7XX only) 71f1558498Smiod */ 72f1558498Smiod 739525108cSmiod #define SM7XX_MMIO_BASE 0x00700000 74*38a3e2e8Smiod #define SM7XX_MMIO_SIZE 0x00004000 75