1 /* $OpenBSD: mb89352.c,v 1.20 2014/10/05 11:46:18 aoyama Exp $ */ 2 /* $NetBSD: mb89352.c,v 1.5 2000/03/23 07:01:31 thorpej Exp $ */ 3 /* NecBSD: mb89352.c,v 1.4 1998/03/14 07:31:20 kmatsuda Exp */ 4 5 #ifdef DDB 6 #define integrate 7 #else 8 #define integrate __inline static 9 #endif 10 11 /*- 12 * Copyright (c) 1996,97,98,99 The NetBSD Foundation, Inc. 13 * All rights reserved. 14 * 15 * This code is derived from software contributed to The NetBSD Foundation 16 * by Charles M. Hannum, Masaru Oki and Kouichi Matsuda. 17 * 18 * Redistribution and use in source and binary forms, with or without 19 * modification, are permitted provided that the following conditions 20 * are met: 21 * 1. Redistributions of source code must retain the above copyright 22 * notice, this list of conditions and the following disclaimer. 23 * 2. Redistributions in binary form must reproduce the above copyright 24 * notice, this list of conditions and the following disclaimer in the 25 * documentation and/or other materials provided with the distribution. 26 * 3. All advertising materials mentioning features or use of this software 27 * must display the following acknowledgement: 28 * This product includes software developed by Charles M. Hannum. 29 * 4. The name of the author may not be used to endorse or promote products 30 * derived from this software without specific prior written permission. 31 * 32 * Copyright (c) 1994 Jarle Greipsland 33 * All rights reserved. 34 * 35 * Redistribution and use in source and binary forms, with or without 36 * modification, are permitted provided that the following conditions 37 * are met: 38 * 1. Redistributions of source code must retain the above copyright 39 * notice, this list of conditions and the following disclaimer. 40 * 2. Redistributions in binary form must reproduce the above copyright 41 * notice, this list of conditions and the following disclaimer in the 42 * documentation and/or other materials provided with the distribution. 43 * 3. The name of the author may not be used to endorse or promote products 44 * derived from this software without specific prior written permission. 45 * 46 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 47 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 48 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 49 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 50 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 51 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 52 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 53 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 54 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 55 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 56 * POSSIBILITY OF SUCH DAMAGE. 57 */ 58 /* 59 * [NetBSD for NEC PC-98 series] 60 * Copyright (c) 1996, 1997, 1998 61 * NetBSD/pc98 porting staff. All rights reserved. 62 * Copyright (c) 1996, 1997, 1998 63 * Kouichi Matsuda. All rights reserved. 64 */ 65 66 /* 67 * Acknowledgements: Many of the algorithms used in this driver are 68 * inspired by the work of Julian Elischer (julian@tfs.com) and 69 * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million! 70 */ 71 72 /* TODO list: 73 * 1) Get the DMA stuff working. 74 * 2) Get the iov/uio stuff working. Is this a good thing ??? 75 * 3) Get the synch stuff working. 76 * 4) Rewrite it to use malloc for the acb structs instead of static alloc.? 77 */ 78 79 /* 80 * A few customizable items: 81 */ 82 83 /* Synchronous data transfers? */ 84 #define SPC_USE_SYNCHRONOUS 0 85 #define SPC_SYNC_REQ_ACK_OFS 8 86 87 /* Wide data transfers? */ 88 #define SPC_USE_WIDE 0 89 #define SPC_MAX_WIDTH 0 90 91 /* Max attempts made to transmit a message */ 92 #define SPC_MSG_MAX_ATTEMPT 3 /* Not used now XXX */ 93 94 /* 95 * Some spin loop parameters (essentially how long to wait some places) 96 * The problem(?) is that sometimes we expect either to be able to transmit a 97 * byte or to get a new one from the SCSI bus pretty soon. In order to avoid 98 * returning from the interrupt just to get yanked back for the next byte we 99 * may spin in the interrupt routine waiting for this byte to come. How long? 100 * This is really (SCSI) device and processor dependent. Tuneable, I guess. 101 */ 102 #define SPC_MSGIN_SPIN 1 /* Will spinwait upto ?ms for a new msg byte */ 103 #define SPC_MSGOUT_SPIN 1 104 105 /* 106 * Include debug functions? At the end of this file there are a bunch of 107 * functions that will print out various information regarding queued SCSI 108 * commands, driver state and chip contents. You can call them from the 109 * kernel debugger. If you set SPC_DEBUG to 0 they are not included (the 110 * kernel uses less memory) but you lose the debugging facilities. 111 */ 112 /* #define SPC_DEBUG */ 113 114 #define SPC_ABORT_TIMEOUT 2000 /* time to wait for abort */ 115 116 /* End of customizable parameters */ 117 118 /* 119 * MB89352 SCSI Protocol Controller (SPC) routines. 120 */ 121 122 #include <sys/param.h> 123 #include <sys/systm.h> 124 #include <sys/kernel.h> 125 #include <sys/errno.h> 126 #include <sys/ioctl.h> 127 #include <sys/device.h> 128 #include <sys/buf.h> 129 #include <sys/proc.h> 130 #include <sys/queue.h> 131 132 #include <machine/intr.h> 133 #include <machine/bus.h> 134 135 #include <scsi/scsi_all.h> 136 #include <scsi/scsi_message.h> 137 #include <scsi/scsiconf.h> 138 139 #include <luna88k/dev/mb89352reg.h> 140 #include <luna88k/dev/mb89352var.h> 141 142 #ifndef DDB 143 #define Debugger() panic("should call debugger here (mb89352.c)") 144 #endif /* ! DDB */ 145 146 #ifdef SPC_DEBUG 147 int spc_debug = 0x00; /* SPC_SHOWSTART|SPC_SHOWMISC|SPC_SHOWTRACE; */ 148 #endif 149 150 void spc_done (struct spc_softc *, struct spc_acb *); 151 void spc_dequeue (struct spc_softc *, struct spc_acb *); 152 void spc_scsi_cmd (struct scsi_xfer *); 153 int spc_poll (struct spc_softc *, struct scsi_xfer *, int); 154 integrate void spc_sched_msgout(struct spc_softc *, u_char); 155 integrate void spc_setsync(struct spc_softc *, struct spc_tinfo *); 156 void spc_select (struct spc_softc *, struct spc_acb *); 157 void spc_timeout (void *); 158 void spc_scsi_reset (struct spc_softc *); 159 void spc_reset (struct spc_softc *); 160 void spc_acb_free (void *, void *); 161 void *spc_acb_alloc (void *); 162 int spc_reselect (struct spc_softc *, int); 163 void spc_sense (struct spc_softc *, struct spc_acb *); 164 void spc_msgin (struct spc_softc *); 165 void spc_abort (struct spc_softc *, struct spc_acb *); 166 void spc_msgout (struct spc_softc *); 167 int spc_dataout_pio (struct spc_softc *, u_char *, int); 168 int spc_datain_pio (struct spc_softc *, u_char *, int); 169 #ifdef SPC_DEBUG 170 void spc_print_acb (struct spc_acb *); 171 void spc_dump_driver (struct spc_softc *); 172 void spc_dump89352 (struct spc_softc *); 173 void spc_show_scsi_cmd(struct spc_acb *); 174 void spc_print_active_acb(void); 175 #endif 176 177 extern struct cfdriver spc_cd; 178 179 /* 180 * INITIALIZATION ROUTINES (probe, attach ++) 181 */ 182 183 void 184 /* spc_attach(sc) */ 185 spc_attach(struct spc_softc *sc, struct scsi_adapter *adapter) 186 { 187 struct scsibus_attach_args saa; 188 SPC_TRACE(("spc_attach ")); 189 sc->sc_state = SPC_INIT; 190 191 sc->sc_freq = 20; /* XXXX Assume 20 MHz. */ 192 193 #if SPC_USE_SYNCHRONOUS 194 /* 195 * These are the bounds of the sync period, based on the frequency of 196 * the chip's clock input and the size and offset of the sync period 197 * register. 198 * 199 * For a 20MHz clock, this gives us 25, or 100nS, or 10MB/s, as a 200 * maximum transfer rate, and 112.5, or 450nS, or 2.22MB/s, as a 201 * minimum transfer rate. 202 */ 203 sc->sc_minsync = (2 * 250) / sc->sc_freq; 204 sc->sc_maxsync = (9 * 250) / sc->sc_freq; 205 #endif 206 207 spc_init(sc); /* Init chip and driver */ 208 209 /* 210 * Fill in the adapter. 211 */ 212 sc->sc_link.adapter_softc = sc; 213 sc->sc_link.adapter_target = sc->sc_initiator; 214 sc->sc_link.adapter = adapter; 215 sc->sc_link.openings = 2; 216 sc->sc_link.pool = &sc->sc_iopool; 217 218 bzero(&saa, sizeof(saa)); 219 saa.saa_sc_link = &sc->sc_link; 220 221 /* 222 * ask the adapter what subunits are present 223 */ 224 config_found(&sc->sc_dev, &saa, scsiprint); 225 } 226 227 /* 228 * Initialize MB89352 chip itself 229 * The following conditions should hold: 230 * spc_isa_probe should have succeeded, i.e. the iobase address in spc_softc 231 * must be valid. 232 */ 233 void 234 spc_reset(struct spc_softc *sc) 235 { 236 bus_space_tag_t iot = sc->sc_iot; 237 bus_space_handle_t ioh = sc->sc_ioh; 238 239 SPC_TRACE(("spc_reset ")); 240 /* 241 * Disable interrupts then reset the FUJITSU chip. 242 */ 243 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST); 244 bus_space_write_1(iot, ioh, SCMD, 0); 245 bus_space_write_1(iot, ioh, TMOD, 0); 246 bus_space_write_1(iot, ioh, PCTL, 0); 247 bus_space_write_1(iot, ioh, TEMP, 0); 248 bus_space_write_1(iot, ioh, TCH, 0); 249 bus_space_write_1(iot, ioh, TCM, 0); 250 bus_space_write_1(iot, ioh, TCL, 0); 251 bus_space_write_1(iot, ioh, INTS, 0); 252 bus_space_write_1(iot, ioh, SCTL, 253 SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB); 254 bus_space_write_1(iot, ioh, BDID, sc->sc_initiator); 255 delay(400); 256 bus_space_write_1(iot, ioh, SCTL, 257 bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE); 258 } 259 260 261 /* 262 * Pull the SCSI RST line for 500us. 263 */ 264 void 265 spc_scsi_reset(struct spc_softc *sc) 266 { 267 bus_space_tag_t iot = sc->sc_iot; 268 bus_space_handle_t ioh = sc->sc_ioh; 269 270 SPC_TRACE(("spc_scsi_reset ")); 271 bus_space_write_1(iot, ioh, SCMD, bus_space_read_1(iot, ioh, SCMD) | SCMD_RST); 272 delay(500); 273 bus_space_write_1(iot, ioh, SCMD, bus_space_read_1(iot, ioh, SCMD) & ~SCMD_RST); 274 delay(50); 275 } 276 277 /* 278 * Initialize spc SCSI driver. 279 */ 280 void 281 spc_init(struct spc_softc *sc) 282 { 283 struct spc_acb *acb; 284 int r; 285 286 SPC_TRACE(("spc_init ")); 287 spc_reset(sc); 288 spc_scsi_reset(sc); 289 spc_reset(sc); 290 291 if (sc->sc_state == SPC_INIT) { 292 /* First time through; initialize. */ 293 TAILQ_INIT(&sc->ready_list); 294 TAILQ_INIT(&sc->nexus_list); 295 TAILQ_INIT(&sc->free_list); 296 mtx_init(&sc->sc_acb_mtx, IPL_BIO); 297 scsi_iopool_init(&sc->sc_iopool, sc, spc_acb_alloc, spc_acb_free); 298 sc->sc_nexus = NULL; 299 acb = sc->sc_acb; 300 bzero(acb, sizeof(sc->sc_acb)); 301 for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) { 302 TAILQ_INSERT_TAIL(&sc->free_list, acb, chain); 303 acb++; 304 } 305 bzero(&sc->sc_tinfo, sizeof(sc->sc_tinfo)); 306 } else { 307 /* Cancel any active commands. */ 308 sc->sc_state = SPC_CLEANING; 309 if ((acb = sc->sc_nexus) != NULL) { 310 acb->xs->error = XS_DRIVER_STUFFUP; 311 timeout_del(&acb->xs->stimeout); 312 spc_done(sc, acb); 313 } 314 while ((acb = TAILQ_FIRST(&sc->nexus_list)) != NULL) { 315 acb->xs->error = XS_DRIVER_STUFFUP; 316 timeout_del(&acb->xs->stimeout); 317 spc_done(sc, acb); 318 } 319 } 320 321 sc->sc_prevphase = PH_INVALID; 322 for (r = 0; r < 8; r++) { 323 struct spc_tinfo *ti = &sc->sc_tinfo[r]; 324 325 ti->flags = 0; 326 #if SPC_USE_SYNCHRONOUS 327 ti->flags |= DO_SYNC; 328 ti->period = sc->sc_minsync; 329 ti->offset = SPC_SYNC_REQ_ACK_OFS; 330 #else 331 ti->period = ti->offset = 0; 332 #endif 333 #if SPC_USE_WIDE 334 ti->flags |= DO_WIDE; 335 ti->width = SPC_MAX_WIDTH; 336 #else 337 ti->width = 0; 338 #endif 339 } 340 341 sc->sc_state = SPC_IDLE; 342 bus_space_write_1(sc->sc_iot, sc->sc_ioh, SCTL, 343 bus_space_read_1(sc->sc_iot, sc->sc_ioh, SCTL) | SCTL_INTR_ENAB); 344 } 345 346 void 347 spc_acb_free(void *xsc, void *xacb) 348 { 349 struct spc_softc *sc = xsc; 350 struct spc_acb *acb = xacb; 351 352 SPC_TRACE(("spc_acb_free ")); 353 354 acb->flags = 0; 355 mtx_enter(&sc->sc_acb_mtx); 356 TAILQ_INSERT_HEAD(&sc->free_list, acb, chain); 357 mtx_leave(&sc->sc_acb_mtx); 358 } 359 360 void * 361 spc_acb_alloc(void *xsc) 362 { 363 struct spc_softc *sc = xsc; 364 struct spc_acb *acb; 365 366 SPC_TRACE(("spc_acb_alloc ")); 367 368 mtx_enter(&sc->sc_acb_mtx); 369 acb = TAILQ_FIRST(&sc->free_list); 370 if (acb) 371 TAILQ_REMOVE(&sc->free_list, acb, chain); 372 mtx_leave(&sc->sc_acb_mtx); 373 374 return acb; 375 } 376 377 /* 378 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS 379 */ 380 381 /* 382 * Expected sequence: 383 * 1) Command inserted into ready list 384 * 2) Command selected for execution 385 * 3) Command won arbitration and has selected target device 386 * 4) Send message out (identify message, eventually also sync.negotiations) 387 * 5) Send command 388 * 5a) Receive disconnect message, disconnect. 389 * 5b) Reselected by target 390 * 5c) Receive identify message from target. 391 * 6) Send or receive data 392 * 7) Receive status 393 * 8) Receive message (command complete etc.) 394 * 9) If status == SCSI_CHECK construct a synthetic request sense SCSI cmd. 395 * Repeat 2-8 (no disconnects please...) 396 */ 397 398 /* 399 * Start a SCSI-command 400 * This function is called by the higher level SCSI-driver to queue/run 401 * SCSI-commands. 402 */ 403 void 404 spc_scsi_cmd(struct scsi_xfer *xs) 405 { 406 struct scsi_link *sc_link = xs->sc_link; 407 struct spc_softc *sc = sc_link->adapter_softc; 408 struct spc_acb *acb; 409 int s, flags; 410 411 SPC_TRACE(("spc_scsi_cmd ")); 412 SPC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, 413 sc_link->target)); 414 415 flags = xs->flags; 416 acb = xs->io; 417 418 /* Initialize acb */ 419 acb->xs = xs; 420 acb->timeout = xs->timeout; 421 timeout_set(&xs->stimeout, spc_timeout, acb); 422 423 if (xs->flags & SCSI_RESET) { 424 acb->flags |= ACB_RESET; 425 acb->scsi_cmd_length = 0; 426 acb->data_length = 0; 427 } else { 428 bcopy(xs->cmd, &acb->scsi_cmd, xs->cmdlen); 429 acb->scsi_cmd_length = xs->cmdlen; 430 acb->data_addr = xs->data; 431 acb->data_length = xs->datalen; 432 } 433 acb->target_stat = 0; 434 435 s = splbio(); 436 437 TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain); 438 /* 439 * Start scheduling unless a queue process is in progress. 440 */ 441 if (sc->sc_state == SPC_IDLE) 442 spc_sched(sc); 443 /* 444 * After successful sending, check if we should return just now. 445 */ 446 447 splx(s); 448 449 if ((flags & SCSI_POLL) == 0) 450 return; 451 452 /* Not allowed to use interrupts, use polling instead */ 453 s = splbio(); 454 if (spc_poll(sc, xs, acb->timeout)) { 455 spc_timeout(acb); 456 if (spc_poll(sc, xs, acb->timeout)) 457 spc_timeout(acb); 458 } 459 splx(s); 460 } 461 462 /* 463 * Used when interrupt driven I/O isn't allowed, e.g. during boot. 464 */ 465 int 466 spc_poll(struct spc_softc *sc, struct scsi_xfer *xs, int count) 467 { 468 bus_space_tag_t iot = sc->sc_iot; 469 bus_space_handle_t ioh = sc->sc_ioh; 470 471 SPC_TRACE(("spc_poll ")); 472 while (count) { 473 /* 474 * If we had interrupts enabled, would we 475 * have got an interrupt? 476 */ 477 if (bus_space_read_1(iot, ioh, INTS) != 0) 478 spc_intr(sc); 479 if ((xs->flags & ITSDONE) != 0) 480 return 0; 481 delay(1000); 482 count--; 483 } 484 return 1; 485 } 486 487 /* 488 * LOW LEVEL SCSI UTILITIES 489 */ 490 491 integrate void 492 spc_sched_msgout(struct spc_softc *sc, u_char m) 493 { 494 bus_space_tag_t iot = sc->sc_iot; 495 bus_space_handle_t ioh = sc->sc_ioh; 496 497 SPC_TRACE(("spc_sched_msgout ")); 498 if (sc->sc_msgpriq == 0) 499 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN); 500 sc->sc_msgpriq |= m; 501 } 502 503 /* 504 * Set synchronous transfer offset and period. 505 */ 506 integrate void 507 spc_setsync(struct spc_softc *sc, struct spc_tinfo *ti) 508 { 509 #if SPC_USE_SYNCHRONOUS 510 bus_space_tag_t iot = sc->sc_iot; 511 bus_space_handle_t ioh = sc->sc_ioh; 512 513 SPC_TRACE(("spc_setsync ")); 514 if (ti->offset != 0) 515 bus_space_write_1(iot, ioh, TMOD, 516 ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset); 517 else 518 bus_space_write_1(iot, ioh, TMOD, 0); 519 #endif 520 } 521 522 /* 523 * Start a selection. This is used by spc_sched() to select an idle target, 524 * and by spc_done() to immediately reselect a target to get sense information. 525 */ 526 void 527 spc_select(struct spc_softc *sc, struct spc_acb *acb) 528 { 529 struct scsi_link *sc_link = acb->xs->sc_link; 530 int target = sc_link->target; 531 struct spc_tinfo *ti = &sc->sc_tinfo[target]; 532 bus_space_tag_t iot = sc->sc_iot; 533 bus_space_handle_t ioh = sc->sc_ioh; 534 535 SPC_TRACE(("spc_select ")); 536 spc_setsync(sc, ti); 537 538 #if 0 539 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN); 540 #endif 541 542 bus_space_write_1(iot, ioh, PCTL, 0); 543 bus_space_write_1(iot, ioh, TEMP, 544 (1 << sc->sc_initiator) | (1 << target)); 545 /* 546 * Setup BSY timeout (selection timeout). 547 * 250ms according to the SCSI specification. 548 * T = (X * 256 + 15) * Tclf * 2 (Tclf = 200ns on x68k) 549 * To setup 256ms timeout, 550 * 128000ns/200ns = X * 256 + 15 551 * 640 - 15 = X * 256 552 * X = 625 / 256 553 * X = 2 + 113 / 256 554 * ==> tch = 2, tcm = 113 (correct?) 555 */ 556 /* Time to the information transfer phase start. */ 557 /* XXX These values should be calculated from sc_freq */ 558 bus_space_write_1(iot, ioh, TCH, 2); 559 bus_space_write_1(iot, ioh, TCM, 113); 560 bus_space_write_1(iot, ioh, TCL, 3); 561 bus_space_write_1(iot, ioh, SCMD, SCMD_SELECT); 562 563 sc->sc_state = SPC_SELECTING; 564 } 565 566 int 567 spc_reselect(struct spc_softc *sc, int message) 568 { 569 u_char selid, target, lun; 570 struct spc_acb *acb; 571 struct scsi_link *sc_link; 572 struct spc_tinfo *ti; 573 574 SPC_TRACE(("spc_reselect ")); 575 /* 576 * The SCSI chip made a snapshot of the data bus while the reselection 577 * was being negotiated. This enables us to determine which target did 578 * the reselect. 579 */ 580 selid = sc->sc_selid & ~(1 << sc->sc_initiator); 581 if (selid & (selid - 1)) { 582 printf("%s: reselect with invalid selid %02x; " 583 "sending DEVICE RESET\n", sc->sc_dev.dv_xname, selid); 584 SPC_BREAK(); 585 goto reset; 586 } 587 588 /* 589 * Search wait queue for disconnected cmd 590 * The list should be short, so I haven't bothered with 591 * any more sophisticated structures than a simple 592 * singly linked list. 593 */ 594 target = ffs(selid) - 1; 595 lun = message & 0x07; 596 TAILQ_FOREACH(acb, &sc->nexus_list, chain) { 597 sc_link = acb->xs->sc_link; 598 if (sc_link->target == target && 599 sc_link->lun == lun) 600 break; 601 } 602 if (acb == NULL) { 603 printf("%s: reselect from target %d lun %d with no nexus; " 604 "sending ABORT\n", sc->sc_dev.dv_xname, target, lun); 605 SPC_BREAK(); 606 goto abort; 607 } 608 609 /* Make this nexus active again. */ 610 TAILQ_REMOVE(&sc->nexus_list, acb, chain); 611 sc->sc_state = SPC_CONNECTED; 612 sc->sc_nexus = acb; 613 ti = &sc->sc_tinfo[target]; 614 ti->lubusy |= (1 << lun); 615 spc_setsync(sc, ti); 616 617 if (acb->flags & ACB_RESET) 618 spc_sched_msgout(sc, SEND_DEV_RESET); 619 else if (acb->flags & ACB_ABORT) 620 spc_sched_msgout(sc, SEND_ABORT); 621 622 /* Do an implicit RESTORE POINTERS. */ 623 sc->sc_dp = acb->data_addr; 624 sc->sc_dleft = acb->data_length; 625 sc->sc_cp = (u_char *)&acb->scsi_cmd; 626 sc->sc_cleft = acb->scsi_cmd_length; 627 628 return (0); 629 630 reset: 631 spc_sched_msgout(sc, SEND_DEV_RESET); 632 return (1); 633 634 abort: 635 spc_sched_msgout(sc, SEND_ABORT); 636 return (1); 637 } 638 639 /* 640 * Schedule a SCSI operation. This has now been pulled out of the interrupt 641 * handler so that we may call it from spc_scsi_cmd and spc_done. This may 642 * save us an unnecessary interrupt just to get things going. Should only be 643 * called when state == SPC_IDLE and at bio pl. 644 */ 645 void 646 spc_sched(struct spc_softc *sc) 647 { 648 struct spc_acb *acb; 649 struct scsi_link *sc_link; 650 struct spc_tinfo *ti; 651 652 /* missing the hw, just return and wait for our hw */ 653 if (sc->sc_flags & SPC_INACTIVE) 654 return; 655 SPC_TRACE(("spc_sched ")); 656 /* 657 * Find first acb in ready queue that is for a target/lunit pair that 658 * is not busy. 659 */ 660 TAILQ_FOREACH(acb, &sc->ready_list, chain) { 661 sc_link = acb->xs->sc_link; 662 ti = &sc->sc_tinfo[sc_link->target]; 663 if ((ti->lubusy & (1 << sc_link->lun)) == 0) { 664 SPC_MISC(("selecting %d:%d ", 665 sc_link->target, sc_link->lun)); 666 TAILQ_REMOVE(&sc->ready_list, acb, chain); 667 sc->sc_nexus = acb; 668 spc_select(sc, acb); 669 return; 670 } else 671 SPC_MISC(("%d:%d busy\n", 672 sc_link->target, sc_link->lun)); 673 } 674 SPC_MISC(("idle ")); 675 /* Nothing to start; just enable reselections and wait. */ 676 } 677 678 void 679 spc_sense(struct spc_softc *sc, struct spc_acb *acb) 680 { 681 struct scsi_xfer *xs = acb->xs; 682 struct scsi_link *sc_link = xs->sc_link; 683 struct spc_tinfo *ti = &sc->sc_tinfo[sc_link->target]; 684 struct scsi_sense *ss = (void *)&acb->scsi_cmd; 685 686 SPC_MISC(("requesting sense ")); 687 /* Next, setup a request sense command block */ 688 bzero(ss, sizeof(*ss)); 689 ss->opcode = REQUEST_SENSE; 690 ss->byte2 = sc_link->lun << 5; 691 ss->length = sizeof(struct scsi_sense_data); 692 acb->scsi_cmd_length = sizeof(*ss); 693 acb->data_addr = (char *)&xs->sense; 694 acb->data_length = sizeof(struct scsi_sense_data); 695 acb->flags |= ACB_SENSE; 696 ti->senses++; 697 if (acb->flags & ACB_NEXUS) 698 ti->lubusy &= ~(1 << sc_link->lun); 699 if (acb == sc->sc_nexus) { 700 spc_select(sc, acb); 701 } else { 702 spc_dequeue(sc, acb); 703 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 704 if (sc->sc_state == SPC_IDLE) 705 spc_sched(sc); 706 } 707 } 708 709 /* 710 * POST PROCESSING OF SCSI_CMD (usually current) 711 */ 712 void 713 spc_done(struct spc_softc *sc, struct spc_acb *acb) 714 { 715 struct scsi_xfer *xs = acb->xs; 716 struct scsi_link *sc_link = xs->sc_link; 717 struct spc_tinfo *ti = &sc->sc_tinfo[sc_link->target]; 718 719 SPC_TRACE(("spc_done ")); 720 721 /* 722 * Now, if we've come here with no error code, i.e. we've kept the 723 * initial XS_NOERROR, and the status code signals that we should 724 * check sense, we'll need to set up a request sense cmd block and 725 * push the command back into the ready queue *before* any other 726 * commands for this target/lunit, else we lose the sense info. 727 * We don't support chk sense conditions for the request sense cmd. 728 */ 729 if (xs->error == XS_NOERROR) { 730 if (acb->flags & ACB_ABORT) { 731 xs->error = XS_DRIVER_STUFFUP; 732 } else if (acb->flags & ACB_SENSE) { 733 xs->error = XS_SENSE; 734 } else { 735 switch (acb->target_stat) { 736 case SCSI_CHECK: 737 /* First, save the return values */ 738 xs->resid = acb->data_length; 739 xs->status = acb->target_stat; 740 spc_sense(sc, acb); 741 return; 742 case SCSI_BUSY: 743 xs->error = XS_BUSY; 744 break; 745 case SCSI_OK: 746 xs->resid = acb->data_length; 747 break; 748 default: 749 xs->error = XS_DRIVER_STUFFUP; 750 #ifdef SPC_DEBUG 751 printf("%s: spc_done: bad stat 0x%x\n", 752 sc->sc_dev.dv_xname, acb->target_stat); 753 #endif 754 break; 755 } 756 } 757 } 758 759 #ifdef SPC_DEBUG 760 if ((spc_debug & SPC_SHOWMISC) != 0) { 761 if (xs->resid != 0) 762 printf("resid=%d ", xs->resid); 763 if (xs->error == XS_SENSE) 764 printf("sense=0x%02x\n", xs->sense.error_code); 765 else 766 printf("error=%d\n", xs->error); 767 } 768 #endif 769 770 /* 771 * Remove the ACB from whatever queue it happens to be on. 772 */ 773 if (acb->flags & ACB_NEXUS) 774 ti->lubusy &= ~(1 << sc_link->lun); 775 if (acb == sc->sc_nexus) { 776 sc->sc_nexus = NULL; 777 sc->sc_state = SPC_IDLE; 778 spc_sched(sc); 779 } else 780 spc_dequeue(sc, acb); 781 782 ti->cmds++; 783 scsi_done(xs); 784 } 785 786 void 787 spc_dequeue(struct spc_softc *sc, struct spc_acb *acb) 788 { 789 790 SPC_TRACE(("spc_dequeue ")); 791 if (acb->flags & ACB_NEXUS) 792 TAILQ_REMOVE(&sc->nexus_list, acb, chain); 793 else 794 TAILQ_REMOVE(&sc->ready_list, acb, chain); 795 } 796 797 /* 798 * INTERRUPT/PROTOCOL ENGINE 799 */ 800 801 /* 802 * Precondition: 803 * The SCSI bus is already in the MSGI phase and there is a message byte 804 * on the bus, along with an asserted REQ signal. 805 */ 806 void 807 spc_msgin(struct spc_softc *sc) 808 { 809 bus_space_tag_t iot = sc->sc_iot; 810 bus_space_handle_t ioh = sc->sc_ioh; 811 int n; 812 813 SPC_TRACE(("spc_msgin ")); 814 815 if (sc->sc_prevphase == PH_MSGIN) { 816 /* This is a continuation of the previous message. */ 817 n = sc->sc_imp - sc->sc_imess; 818 goto nextbyte; 819 } 820 821 /* This is a new MESSAGE IN phase. Clean up our state. */ 822 sc->sc_flags &= ~SPC_DROP_MSGIN; 823 824 nextmsg: 825 n = 0; 826 sc->sc_imp = &sc->sc_imess[n]; 827 828 nextbyte: 829 /* 830 * Read a whole message, but don't ack the last byte. If we reject the 831 * message, we have to assert ATN during the message transfer phase 832 * itself. 833 */ 834 for (;;) { 835 #if 0 836 for (;;) { 837 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0) 838 break; 839 /* Wait for REQINIT. XXX Need timeout. */ 840 } 841 #endif 842 if (bus_space_read_1(iot, ioh, INTS) != 0) { 843 /* 844 * Target left MESSAGE IN, probably because it 845 * a) noticed our ATN signal, or 846 * b) ran out of messages. 847 */ 848 goto out; 849 } 850 851 /* If parity error, just dump everything on the floor. */ 852 if ((bus_space_read_1(iot, ioh, SERR) & 853 (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) { 854 sc->sc_flags |= SPC_DROP_MSGIN; 855 spc_sched_msgout(sc, SEND_PARITY_ERROR); 856 } 857 858 /* send TRANSFER command. */ 859 bus_space_write_1(iot, ioh, TCH, 0); 860 bus_space_write_1(iot, ioh, TCM, 0); 861 bus_space_write_1(iot, ioh, TCL, 1); 862 bus_space_write_1(iot, ioh, PCTL, 863 sc->sc_phase | PCTL_BFINT_ENAB); 864 #ifdef x68k 865 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* | SCMD_PROG_XFR */ 866 #else 867 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR); /* XXX */ 868 #endif 869 for (;;) { 870 /*if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0 871 && (bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0)*/ 872 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) == 0) 873 break; 874 if (bus_space_read_1(iot, ioh, INTS) != 0) 875 goto out; 876 } 877 878 /* Gather incoming message bytes if needed. */ 879 if ((sc->sc_flags & SPC_DROP_MSGIN) == 0) { 880 if (n >= SPC_MAX_MSG_LEN) { 881 (void) bus_space_read_1(iot, ioh, DREG); 882 sc->sc_flags |= SPC_DROP_MSGIN; 883 spc_sched_msgout(sc, SEND_REJECT); 884 } else { 885 *sc->sc_imp++ = bus_space_read_1(iot, ioh, DREG); 886 n++; 887 /* 888 * This testing is suboptimal, but most 889 * messages will be of the one byte variety, so 890 * it should not affect performance 891 * significantly. 892 */ 893 if (n == 1 && IS1BYTEMSG(sc->sc_imess[0])) 894 break; 895 if (n == 2 && IS2BYTEMSG(sc->sc_imess[0])) 896 break; 897 if (n >= 3 && ISEXTMSG(sc->sc_imess[0]) && 898 n == sc->sc_imess[1] + 2) 899 break; 900 } 901 } else 902 (void) bus_space_read_1(iot, ioh, DREG); 903 904 /* 905 * If we reach this spot we're either: 906 * a) in the middle of a multi-byte message, or 907 * b) dropping bytes. 908 */ 909 #if 0 910 /* Ack the last byte read. */ 911 /*(void) bus_space_read_1(iot, ioh, DREG);*/ 912 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0) 913 ; 914 #endif 915 } 916 917 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0])); 918 919 /* We now have a complete message. Parse it. */ 920 switch (sc->sc_state) { 921 struct spc_acb *acb; 922 struct scsi_link *sc_link; 923 struct spc_tinfo *ti; 924 925 case SPC_CONNECTED: 926 SPC_ASSERT(sc->sc_nexus != NULL); 927 acb = sc->sc_nexus; 928 ti = &sc->sc_tinfo[acb->xs->sc_link->target]; 929 930 switch (sc->sc_imess[0]) { 931 case MSG_CMDCOMPLETE: 932 if (sc->sc_dleft < 0) { 933 sc_link = acb->xs->sc_link; 934 printf("%s: %ld extra bytes from %d:%d\n", 935 sc->sc_dev.dv_xname, -sc->sc_dleft, 936 sc_link->target, sc_link->lun); 937 acb->data_length = 0; 938 } 939 acb->xs->resid = acb->data_length = sc->sc_dleft; 940 sc->sc_state = SPC_CMDCOMPLETE; 941 break; 942 943 case MSG_PARITY_ERROR: 944 /* Resend the last message. */ 945 spc_sched_msgout(sc, sc->sc_lastmsg); 946 break; 947 948 case MSG_MESSAGE_REJECT: 949 SPC_MISC(("message rejected %02x ", sc->sc_lastmsg)); 950 switch (sc->sc_lastmsg) { 951 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE 952 case SEND_IDENTIFY: 953 ti->flags &= ~(DO_SYNC | DO_WIDE); 954 ti->period = ti->offset = 0; 955 spc_setsync(sc, ti); 956 ti->width = 0; 957 break; 958 #endif 959 #if SPC_USE_SYNCHRONOUS 960 case SEND_SDTR: 961 ti->flags &= ~DO_SYNC; 962 ti->period = ti->offset = 0; 963 spc_setsync(sc, ti); 964 break; 965 #endif 966 #if SPC_USE_WIDE 967 case SEND_WDTR: 968 ti->flags &= ~DO_WIDE; 969 ti->width = 0; 970 break; 971 #endif 972 case SEND_INIT_DET_ERR: 973 spc_sched_msgout(sc, SEND_ABORT); 974 break; 975 } 976 break; 977 978 case MSG_NOOP: 979 break; 980 981 case MSG_DISCONNECT: 982 ti->dconns++; 983 sc->sc_state = SPC_DISCONNECT; 984 break; 985 986 case MSG_SAVEDATAPOINTER: 987 acb->data_addr = sc->sc_dp; 988 acb->data_length = sc->sc_dleft; 989 break; 990 991 case MSG_RESTOREPOINTERS: 992 sc->sc_dp = acb->data_addr; 993 sc->sc_dleft = acb->data_length; 994 sc->sc_cp = (u_char *)&acb->scsi_cmd; 995 sc->sc_cleft = acb->scsi_cmd_length; 996 break; 997 998 case MSG_EXTENDED: 999 switch (sc->sc_imess[2]) { 1000 #if SPC_USE_SYNCHRONOUS 1001 case MSG_EXT_SDTR: 1002 if (sc->sc_imess[1] != 3) 1003 goto reject; 1004 ti->period = sc->sc_imess[3]; 1005 ti->offset = sc->sc_imess[4]; 1006 ti->flags &= ~DO_SYNC; 1007 if (ti->offset == 0) { 1008 } else if (ti->period < sc->sc_minsync || 1009 ti->period > sc->sc_maxsync || 1010 ti->offset > 8) { 1011 ti->period = ti->offset = 0; 1012 spc_sched_msgout(sc, SEND_SDTR); 1013 } else { 1014 sc_print_addr(acb->xs->sc_link); 1015 printf("sync, offset %d, " 1016 "period %dnsec\n", 1017 ti->offset, ti->period * 4); 1018 } 1019 spc_setsync(sc, ti); 1020 break; 1021 #endif 1022 1023 #if SPC_USE_WIDE 1024 case MSG_EXT_WDTR: 1025 if (sc->sc_imess[1] != 2) 1026 goto reject; 1027 ti->width = sc->sc_imess[3]; 1028 ti->flags &= ~DO_WIDE; 1029 if (ti->width == 0) { 1030 } else if (ti->width > SPC_MAX_WIDTH) { 1031 ti->width = 0; 1032 spc_sched_msgout(sc, SEND_WDTR); 1033 } else { 1034 sc_print_addr(acb->xs->sc_link); 1035 printf("wide, width %d\n", 1036 1 << (3 + ti->width)); 1037 } 1038 break; 1039 #endif 1040 1041 default: 1042 printf("%s: unrecognized MESSAGE EXTENDED; " 1043 "sending REJECT\n", sc->sc_dev.dv_xname); 1044 SPC_BREAK(); 1045 goto reject; 1046 } 1047 break; 1048 1049 default: 1050 printf("%s: unrecognized MESSAGE; sending REJECT\n", 1051 sc->sc_dev.dv_xname); 1052 SPC_BREAK(); 1053 reject: 1054 spc_sched_msgout(sc, SEND_REJECT); 1055 break; 1056 } 1057 break; 1058 1059 case SPC_RESELECTED: 1060 if (!MSG_ISIDENTIFY(sc->sc_imess[0])) { 1061 printf("%s: reselect without IDENTIFY; " 1062 "sending DEVICE RESET\n", sc->sc_dev.dv_xname); 1063 SPC_BREAK(); 1064 goto reset; 1065 } 1066 1067 (void) spc_reselect(sc, sc->sc_imess[0]); 1068 break; 1069 1070 default: 1071 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n", 1072 sc->sc_dev.dv_xname); 1073 SPC_BREAK(); 1074 reset: 1075 spc_sched_msgout(sc, SEND_DEV_RESET); 1076 break; 1077 1078 #ifdef notdef 1079 abort: 1080 spc_sched_msgout(sc, SEND_ABORT); 1081 break; 1082 #endif 1083 } 1084 1085 /* Ack the last message byte. */ 1086 #if 0 /* XXX? */ 1087 (void) bus_space_read_1(iot, ioh, DREG); 1088 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0) 1089 ; 1090 #endif 1091 1092 /* Go get the next message, if any. */ 1093 goto nextmsg; 1094 1095 out: 1096 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK); 1097 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0])); 1098 } 1099 1100 /* 1101 * Send the highest priority, scheduled message. 1102 */ 1103 void 1104 spc_msgout(struct spc_softc *sc) 1105 { 1106 bus_space_tag_t iot = sc->sc_iot; 1107 bus_space_handle_t ioh = sc->sc_ioh; 1108 #if SPC_USE_SYNCHRONOUS 1109 struct spc_tinfo *ti; 1110 #endif 1111 int n; 1112 1113 SPC_TRACE(("spc_msgout ")); 1114 1115 if (sc->sc_prevphase == PH_MSGOUT) { 1116 if (sc->sc_omp == sc->sc_omess) { 1117 /* 1118 * This is a retransmission. 1119 * 1120 * We get here if the target stayed in MESSAGE OUT 1121 * phase. Section 5.1.9.2 of the SCSI 2 spec indicates 1122 * that all of the previously transmitted messages must 1123 * be sent again, in the same order. Therefore, we 1124 * requeue all the previously transmitted messages, and 1125 * start again from the top. Our simple priority 1126 * scheme keeps the messages in the right order. 1127 */ 1128 SPC_MISC(("retransmitting ")); 1129 sc->sc_msgpriq |= sc->sc_msgoutq; 1130 /* 1131 * Set ATN. If we're just sending a trivial 1-byte 1132 * message, we'll clear ATN later on anyway. 1133 */ 1134 bus_space_write_1(iot, ioh, SCMD, 1135 SCMD_SET_ATN); /* XXX? */ 1136 } else { 1137 /* This is a continuation of the previous message. */ 1138 n = sc->sc_omp - sc->sc_omess; 1139 goto nextbyte; 1140 } 1141 } 1142 1143 /* No messages transmitted so far. */ 1144 sc->sc_msgoutq = 0; 1145 sc->sc_lastmsg = 0; 1146 1147 nextmsg: 1148 /* Pick up highest priority message. */ 1149 sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq; 1150 sc->sc_msgpriq &= ~sc->sc_currmsg; 1151 sc->sc_msgoutq |= sc->sc_currmsg; 1152 1153 /* Build the outgoing message data. */ 1154 switch (sc->sc_currmsg) { 1155 case SEND_IDENTIFY: 1156 SPC_ASSERT(sc->sc_nexus != NULL); 1157 sc->sc_omess[0] = 1158 MSG_IDENTIFY(sc->sc_nexus->xs->sc_link->lun, 1); 1159 n = 1; 1160 break; 1161 1162 #if SPC_USE_SYNCHRONOUS 1163 case SEND_SDTR: 1164 SPC_ASSERT(sc->sc_nexus != NULL); 1165 ti = &sc->sc_tinfo[sc->sc_nexus->xs->sc_link->target]; 1166 sc->sc_omess[4] = MSG_EXTENDED; 1167 sc->sc_omess[3] = MSG_EXT_SDTR_LEN; 1168 sc->sc_omess[2] = MSG_EXT_SDTR; 1169 sc->sc_omess[1] = ti->period >> 2; 1170 sc->sc_omess[0] = ti->offset; 1171 n = 5; 1172 break; 1173 #endif 1174 1175 #if SPC_USE_WIDE 1176 case SEND_WDTR: 1177 SPC_ASSERT(sc->sc_nexus != NULL); 1178 ti = &sc->sc_tinfo[sc->sc_nexus->xs->sc_link->target]; 1179 sc->sc_omess[3] = MSG_EXTENDED; 1180 sc->sc_omess[2] = MSG_EXT_WDTR_LEN; 1181 sc->sc_omess[1] = MSG_EXT_WDTR; 1182 sc->sc_omess[0] = ti->width; 1183 n = 4; 1184 break; 1185 #endif 1186 1187 case SEND_DEV_RESET: 1188 sc->sc_flags |= SPC_ABORTING; 1189 sc->sc_omess[0] = MSG_BUS_DEV_RESET; 1190 n = 1; 1191 break; 1192 1193 case SEND_REJECT: 1194 sc->sc_omess[0] = MSG_MESSAGE_REJECT; 1195 n = 1; 1196 break; 1197 1198 case SEND_PARITY_ERROR: 1199 sc->sc_omess[0] = MSG_PARITY_ERROR; 1200 n = 1; 1201 break; 1202 1203 case SEND_INIT_DET_ERR: 1204 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; 1205 n = 1; 1206 break; 1207 1208 case SEND_ABORT: 1209 sc->sc_flags |= SPC_ABORTING; 1210 sc->sc_omess[0] = MSG_ABORT; 1211 n = 1; 1212 break; 1213 1214 default: 1215 printf("%s: unexpected MESSAGE OUT; sending NOOP\n", 1216 sc->sc_dev.dv_xname); 1217 SPC_BREAK(); 1218 sc->sc_omess[0] = MSG_NOOP; 1219 n = 1; 1220 break; 1221 } 1222 sc->sc_omp = &sc->sc_omess[n]; 1223 1224 nextbyte: 1225 /* Send message bytes. */ 1226 /* send TRANSFER command. */ 1227 bus_space_write_1(iot, ioh, TCH, n >> 16); 1228 bus_space_write_1(iot, ioh, TCM, n >> 8); 1229 bus_space_write_1(iot, ioh, TCL, n); 1230 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB); 1231 #ifdef x68k 1232 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */ 1233 #else 1234 bus_space_write_1(iot, ioh, SCMD, 1235 SCMD_XFR | SCMD_PROG_XFR | SCMD_ICPT_XFR); 1236 #endif 1237 for (;;) { 1238 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0) 1239 break; 1240 if (bus_space_read_1(iot, ioh, INTS) != 0) 1241 goto out; 1242 } 1243 for (;;) { 1244 #if 0 1245 for (;;) { 1246 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0) 1247 break; 1248 /* Wait for REQINIT. XXX Need timeout. */ 1249 } 1250 #endif 1251 if (bus_space_read_1(iot, ioh, INTS) != 0) { 1252 /* 1253 * Target left MESSAGE OUT, possibly to reject 1254 * our message. 1255 * 1256 * If this is the last message being sent, then we 1257 * deassert ATN, since either the target is going to 1258 * ignore this message, or it's going to ask for a 1259 * retransmission via MESSAGE PARITY ERROR (in which 1260 * case we reassert ATN anyway). 1261 */ 1262 #if 0 1263 if (sc->sc_msgpriq == 0) 1264 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN); 1265 #endif 1266 goto out; 1267 } 1268 1269 #if 0 1270 /* Clear ATN before last byte if this is the last message. */ 1271 if (n == 1 && sc->sc_msgpriq == 0) 1272 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN); 1273 #endif 1274 1275 while ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_FULL) != 0) 1276 ; 1277 /* Send message byte. */ 1278 bus_space_write_1(iot, ioh, DREG, *--sc->sc_omp); 1279 --n; 1280 /* Keep track of the last message we've sent any bytes of. */ 1281 sc->sc_lastmsg = sc->sc_currmsg; 1282 #if 0 1283 /* Wait for ACK to be negated. XXX Need timeout. */ 1284 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0) 1285 ; 1286 #endif 1287 1288 if (n == 0) 1289 break; 1290 } 1291 1292 /* We get here only if the entire message has been transmitted. */ 1293 if (sc->sc_msgpriq != 0) { 1294 /* There are more outgoing messages. */ 1295 goto nextmsg; 1296 } 1297 1298 /* 1299 * The last message has been transmitted. We need to remember the last 1300 * message transmitted (in case the target switches to MESSAGE IN phase 1301 * and sends a MESSAGE REJECT), and the list of messages transmitted 1302 * this time around (in case the target stays in MESSAGE OUT phase to 1303 * request a retransmit). 1304 */ 1305 1306 out: 1307 /* Disable REQ/ACK protocol. */ 1308 return; 1309 } 1310 1311 /* 1312 * spc_dataout_pio: perform a data transfer using the FIFO datapath in the spc 1313 * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted 1314 * and ACK deasserted (i.e. waiting for a data byte). 1315 * 1316 * This new revision has been optimized (I tried) to make the common case fast, 1317 * and the rarer cases (as a result) somewhat more complex. 1318 */ 1319 int 1320 spc_dataout_pio(struct spc_softc *sc, u_char *p, int n) 1321 { 1322 bus_space_tag_t iot = sc->sc_iot; 1323 bus_space_handle_t ioh = sc->sc_ioh; 1324 u_char intstat = 0; 1325 int out = 0; 1326 #define DOUTAMOUNT 8 /* Full FIFO */ 1327 1328 SPC_TRACE(("spc_dataout_pio ")); 1329 /* send TRANSFER command. */ 1330 bus_space_write_1(iot, ioh, TCH, n >> 16); 1331 bus_space_write_1(iot, ioh, TCM, n >> 8); 1332 bus_space_write_1(iot, ioh, TCL, n); 1333 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB); 1334 #ifdef x68k 1335 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */ 1336 #else 1337 bus_space_write_1(iot, ioh, SCMD, 1338 SCMD_XFR | SCMD_PROG_XFR | SCMD_ICPT_XFR); /* XXX */ 1339 #endif 1340 for (;;) { 1341 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0) 1342 break; 1343 if (bus_space_read_1(iot, ioh, INTS) != 0) 1344 break; 1345 } 1346 1347 /* 1348 * I have tried to make the main loop as tight as possible. This 1349 * means that some of the code following the loop is a bit more 1350 * complex than otherwise. 1351 */ 1352 while (n > 0) { 1353 int xfer; 1354 1355 for (;;) { 1356 intstat = bus_space_read_1(iot, ioh, INTS); 1357 /* Wait till buffer is empty. */ 1358 if ((bus_space_read_1(iot, ioh, SSTS) & 1359 SSTS_DREG_EMPTY) != 0) 1360 break; 1361 /* Break on interrupt. */ 1362 if (intstat != 0) 1363 goto phasechange; 1364 } 1365 1366 xfer = min(DOUTAMOUNT, n); 1367 1368 SPC_MISC(("%d> ", xfer)); 1369 1370 n -= xfer; 1371 out += xfer; 1372 bus_space_write_multi_1(iot, ioh, DREG, p, xfer); 1373 p += xfer; 1374 } 1375 1376 if (out == 0) { 1377 for (;;) { 1378 if (bus_space_read_1(iot, ioh, INTS) != 0) 1379 break; 1380 } 1381 SPC_MISC(("extra data ")); 1382 } else { 1383 /* See the bytes off chip */ 1384 for (;;) { 1385 /* Wait till buffer is empty. */ 1386 if ((bus_space_read_1(iot, ioh, SSTS) & 1387 SSTS_DREG_EMPTY) != 0) 1388 break; 1389 intstat = bus_space_read_1(iot, ioh, INTS); 1390 /* Break on interrupt. */ 1391 if (intstat != 0) 1392 goto phasechange; 1393 } 1394 } 1395 1396 phasechange: 1397 /* Stop the FIFO data path. */ 1398 1399 if (intstat != 0) { 1400 /* Some sort of phase change. */ 1401 int amount; 1402 1403 amount = ((bus_space_read_1(iot, ioh, TCH) << 16) | 1404 (bus_space_read_1(iot, ioh, TCM) << 8) | 1405 bus_space_read_1(iot, ioh, TCL)); 1406 if (amount > 0) { 1407 out -= amount; 1408 SPC_MISC(("+%d ", amount)); 1409 } 1410 } 1411 1412 return out; 1413 } 1414 1415 /* 1416 * spc_datain_pio: perform data transfers using the FIFO datapath in the spc 1417 * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted 1418 * and ACK deasserted (i.e. at least one byte is ready). 1419 * 1420 * For now, uses a pretty dumb algorithm, hangs around until all data has been 1421 * transferred. This, is OK for fast targets, but not so smart for slow 1422 * targets which don't disconnect or for huge transfers. 1423 */ 1424 int 1425 spc_datain_pio(struct spc_softc *sc, u_char *p, int n) 1426 { 1427 bus_space_tag_t iot = sc->sc_iot; 1428 bus_space_handle_t ioh = sc->sc_ioh; 1429 u_int8_t intstat, sstat; 1430 int in = 0; 1431 #define DINAMOUNT 8 /* Full FIFO */ 1432 1433 SPC_TRACE(("spc_datain_pio ")); 1434 /* send TRANSFER command. */ 1435 bus_space_write_1(iot, ioh, TCH, n >> 16); 1436 bus_space_write_1(iot, ioh, TCM, n >> 8); 1437 bus_space_write_1(iot, ioh, TCL, n); 1438 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB); 1439 #ifdef x68k 1440 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */ 1441 #else 1442 bus_space_write_1(iot, ioh, SCMD, 1443 SCMD_XFR | SCMD_PROG_XFR); /* XXX */ 1444 #endif 1445 for (;;) { 1446 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0) 1447 break; 1448 if (bus_space_read_1(iot, ioh, INTS) != 0) 1449 goto phasechange; 1450 } 1451 1452 /* 1453 * We leave this loop if one or more of the following is true: 1454 * a) phase != PH_DATAIN && FIFOs are empty 1455 * b) reset has occurred or busfree is detected. 1456 */ 1457 while (n > 0) { 1458 int xfer; 1459 1460 /* Wait for fifo half full or phase mismatch */ 1461 for (;;) { 1462 intstat = bus_space_read_1(iot, ioh, INTS); 1463 sstat = bus_space_read_1(iot, ioh, SSTS); 1464 if (intstat != 0 || 1465 (sstat & SSTS_DREG_FULL) != 0 || 1466 (sstat & SSTS_DREG_EMPTY) == 0) 1467 break; 1468 } 1469 1470 #if 1 1471 if (intstat != 0) 1472 goto phasechange; 1473 #else 1474 if (intstat != 0 && 1475 (sstat & SSTS_DREG_EMPTY) != 0) 1476 goto phasechange; 1477 #endif 1478 if ((sstat & SSTS_DREG_FULL) != 0) 1479 xfer = min(DINAMOUNT, n); 1480 else 1481 xfer = 1; 1482 1483 SPC_MISC((">%d ", xfer)); 1484 1485 n -= xfer; 1486 in += xfer; 1487 bus_space_read_multi_1(iot, ioh, DREG, p, xfer); 1488 p += xfer; 1489 1490 if (intstat != 0) 1491 goto phasechange; 1492 } 1493 1494 /* 1495 * Some SCSI-devices are rude enough to transfer more data than what 1496 * was requested, e.g. 2048 bytes from a CD-ROM instead of the 1497 * requested 512. Test for progress, i.e. real transfers. If no real 1498 * transfers have been performed (n is probably already zero) and the 1499 * FIFO is not empty, waste some bytes.... 1500 */ 1501 if (in == 0) { 1502 for (;;) { 1503 /* XXX needs timeout */ 1504 if (bus_space_read_1(iot, ioh, INTS) != 0) 1505 break; 1506 } 1507 SPC_MISC(("extra data ")); 1508 } 1509 1510 phasechange: 1511 /* Stop the FIFO data path. */ 1512 1513 return in; 1514 } 1515 1516 /* 1517 * Catch an interrupt from the adaptor 1518 */ 1519 /* 1520 * This is the workhorse routine of the driver. 1521 * Deficiencies (for now): 1522 * 1) always uses programmed I/O 1523 */ 1524 int 1525 spc_intr(void *arg) 1526 { 1527 struct spc_softc *sc = arg; 1528 bus_space_tag_t iot = sc->sc_iot; 1529 bus_space_handle_t ioh = sc->sc_ioh; 1530 u_char ints; 1531 struct spc_acb *acb; 1532 struct scsi_link *sc_link; 1533 struct spc_tinfo *ti; 1534 int n; 1535 1536 /* 1537 * On LUNA-88K2, 2 spc(4)'s share the level 3 interrupt. 1538 * So, first, check if this deivce needs to process this interrupt. 1539 */ 1540 ints = bus_space_read_1(iot, ioh, INTS); 1541 if (ints == 0) /* No interrupt event on this device */ 1542 return 0; 1543 1544 /* 1545 * Disable interrupt. 1546 */ 1547 bus_space_write_1(iot, ioh, SCTL, 1548 bus_space_read_1(iot, ioh, SCTL) & ~SCTL_INTR_ENAB); 1549 1550 SPC_TRACE(("spc_intr ")); 1551 1552 loop: 1553 /* 1554 * Loop until transfer completion. 1555 */ 1556 /* 1557 * First check for abnormal conditions, such as reset. 1558 */ 1559 #ifdef x68k /* XXX? */ 1560 while ((ints = bus_space_read_1(iot, ioh, INTS)) == 0) 1561 delay(1); 1562 SPC_MISC(("ints = 0x%x ", ints)); 1563 #else 1564 ints = bus_space_read_1(iot, ioh, INTS); 1565 SPC_MISC(("ints = 0x%x ", ints)); 1566 #endif 1567 1568 if ((ints & INTS_RST) != 0) { 1569 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname); 1570 goto reset; 1571 } 1572 1573 /* 1574 * Check for less serious errors. 1575 */ 1576 if ((bus_space_read_1(iot, ioh, SERR) & (SERR_SCSI_PAR|SERR_SPC_PAR)) 1577 != 0) { 1578 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname); 1579 if (sc->sc_prevphase == PH_MSGIN) { 1580 sc->sc_flags |= SPC_DROP_MSGIN; 1581 spc_sched_msgout(sc, SEND_PARITY_ERROR); 1582 } else 1583 spc_sched_msgout(sc, SEND_INIT_DET_ERR); 1584 } 1585 1586 /* 1587 * If we're not already busy doing something test for the following 1588 * conditions: 1589 * 1) We have been reselected by something 1590 * 2) We have selected something successfully 1591 * 3) Our selection process has timed out 1592 * 4) This is really a bus free interrupt just to get a new command 1593 * going? 1594 * 5) Spurious interrupt? 1595 */ 1596 switch (sc->sc_state) { 1597 case SPC_IDLE: 1598 case SPC_SELECTING: 1599 SPC_MISC(("ints:0x%02x ", ints)); 1600 1601 if ((ints & INTS_SEL) != 0) { 1602 /* 1603 * We don't currently support target mode. 1604 */ 1605 printf("%s: target mode selected; going to BUS FREE\n", 1606 sc->sc_dev.dv_xname); 1607 1608 goto sched; 1609 } else if ((ints & INTS_RESEL) != 0) { 1610 SPC_MISC(("reselected ")); 1611 1612 /* 1613 * If we're trying to select a target ourselves, 1614 * push our command back into the ready list. 1615 */ 1616 if (sc->sc_state == SPC_SELECTING) { 1617 SPC_MISC(("backoff selector ")); 1618 SPC_ASSERT(sc->sc_nexus != NULL); 1619 acb = sc->sc_nexus; 1620 sc->sc_nexus = NULL; 1621 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 1622 } 1623 1624 /* Save reselection ID. */ 1625 sc->sc_selid = bus_space_read_1(iot, ioh, TEMP); 1626 1627 sc->sc_state = SPC_RESELECTED; 1628 } else if ((ints & INTS_CMD_DONE) != 0) { 1629 SPC_MISC(("selected ")); 1630 1631 /* 1632 * We have selected a target. Things to do: 1633 * a) Determine what message(s) to send. 1634 * b) Verify that we're still selecting the target. 1635 * c) Mark device as busy. 1636 */ 1637 if (sc->sc_state != SPC_SELECTING) { 1638 printf("%s: selection out while idle; " 1639 "resetting\n", sc->sc_dev.dv_xname); 1640 SPC_BREAK(); 1641 goto reset; 1642 } 1643 SPC_ASSERT(sc->sc_nexus != NULL); 1644 acb = sc->sc_nexus; 1645 sc_link = acb->xs->sc_link; 1646 ti = &sc->sc_tinfo[sc_link->target]; 1647 1648 sc->sc_msgpriq = SEND_IDENTIFY; 1649 if (acb->flags & ACB_RESET) 1650 sc->sc_msgpriq |= SEND_DEV_RESET; 1651 else if (acb->flags & ACB_ABORT) 1652 sc->sc_msgpriq |= SEND_ABORT; 1653 else { 1654 #if SPC_USE_SYNCHRONOUS 1655 if ((ti->flags & DO_SYNC) != 0) 1656 sc->sc_msgpriq |= SEND_SDTR; 1657 #endif 1658 #if SPC_USE_WIDE 1659 if ((ti->flags & DO_WIDE) != 0) 1660 sc->sc_msgpriq |= SEND_WDTR; 1661 #endif 1662 } 1663 1664 acb->flags |= ACB_NEXUS; 1665 ti->lubusy |= (1 << sc_link->lun); 1666 1667 /* Do an implicit RESTORE POINTERS. */ 1668 sc->sc_dp = acb->data_addr; 1669 sc->sc_dleft = acb->data_length; 1670 sc->sc_cp = (u_char *)&acb->scsi_cmd; 1671 sc->sc_cleft = acb->scsi_cmd_length; 1672 1673 /* On our first connection, schedule a timeout. */ 1674 if ((acb->xs->flags & SCSI_POLL) == 0) 1675 timeout_add_msec(&acb->xs->stimeout, 1676 acb->timeout); 1677 sc->sc_state = SPC_CONNECTED; 1678 } else if ((ints & INTS_TIMEOUT) != 0) { 1679 SPC_MISC(("selection timeout ")); 1680 1681 if (sc->sc_state != SPC_SELECTING) { 1682 printf("%s: selection timeout while idle; " 1683 "resetting\n", sc->sc_dev.dv_xname); 1684 SPC_BREAK(); 1685 goto reset; 1686 } 1687 SPC_ASSERT(sc->sc_nexus != NULL); 1688 acb = sc->sc_nexus; 1689 1690 delay(250); 1691 1692 acb->xs->error = XS_SELTIMEOUT; 1693 goto finish; 1694 } else { 1695 if (sc->sc_state != SPC_IDLE) { 1696 printf("%s: BUS FREE while not idle; " 1697 "state=%d\n", 1698 sc->sc_dev.dv_xname, sc->sc_state); 1699 SPC_BREAK(); 1700 goto out; 1701 } 1702 1703 goto sched; 1704 } 1705 1706 /* 1707 * Turn off selection stuff, and prepare to catch bus free 1708 * interrupts, parity errors, and phase changes. 1709 */ 1710 1711 sc->sc_flags = 0; 1712 sc->sc_prevphase = PH_INVALID; 1713 goto dophase; 1714 } 1715 1716 if ((ints & INTS_DISCON) != 0) { 1717 /* disable disconnect interrupt */ 1718 bus_space_write_1(iot, ioh, PCTL, 1719 bus_space_read_1(iot, ioh, PCTL) & ~PCTL_BFINT_ENAB); 1720 /* XXX reset interrput */ 1721 bus_space_write_1(iot, ioh, INTS, ints); 1722 1723 switch (sc->sc_state) { 1724 case SPC_RESELECTED: 1725 goto sched; 1726 1727 case SPC_CONNECTED: 1728 SPC_ASSERT(sc->sc_nexus != NULL); 1729 acb = sc->sc_nexus; 1730 1731 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE 1732 if (sc->sc_prevphase == PH_MSGOUT) { 1733 /* 1734 * If the target went to BUS FREE phase during 1735 * or immediately after sending a SDTR or WDTR 1736 * message, disable negotiation. 1737 */ 1738 sc_link = acb->xs->sc_link; 1739 ti = &sc->sc_tinfo[sc_link->target]; 1740 switch (sc->sc_lastmsg) { 1741 #if SPC_USE_SYNCHRONOUS 1742 case SEND_SDTR: 1743 ti->flags &= ~DO_SYNC; 1744 ti->period = ti->offset = 0; 1745 break; 1746 #endif 1747 #if SPC_USE_WIDE 1748 case SEND_WDTR: 1749 ti->flags &= ~DO_WIDE; 1750 ti->width = 0; 1751 break; 1752 #endif 1753 } 1754 } 1755 #endif 1756 1757 if ((sc->sc_flags & SPC_ABORTING) == 0) { 1758 /* 1759 * Section 5.1.1 of the SCSI 2 spec suggests 1760 * issuing a REQUEST SENSE following an 1761 * unexpected disconnect. Some devices go into 1762 * a contingent allegiance condition when 1763 * disconnecting, and this is necessary to 1764 * clean up their state. 1765 */ 1766 printf("%s: unexpected disconnect; " 1767 "sending REQUEST SENSE\n", 1768 sc->sc_dev.dv_xname); 1769 SPC_BREAK(); 1770 spc_sense(sc, acb); 1771 goto out; 1772 } 1773 1774 acb->xs->error = XS_DRIVER_STUFFUP; 1775 goto finish; 1776 1777 case SPC_DISCONNECT: 1778 SPC_ASSERT(sc->sc_nexus != NULL); 1779 acb = sc->sc_nexus; 1780 TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain); 1781 sc->sc_nexus = NULL; 1782 goto sched; 1783 1784 case SPC_CMDCOMPLETE: 1785 SPC_ASSERT(sc->sc_nexus != NULL); 1786 acb = sc->sc_nexus; 1787 goto finish; 1788 } 1789 } 1790 else if ((ints & INTS_CMD_DONE) != 0 && 1791 sc->sc_prevphase == PH_MSGIN && sc->sc_state != SPC_CONNECTED) 1792 goto out; 1793 1794 dophase: 1795 #if 0 1796 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) { 1797 /* Wait for REQINIT. */ 1798 goto out; 1799 } 1800 #else 1801 bus_space_write_1(iot, ioh, INTS, ints); 1802 ints = 0; 1803 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) 1804 delay(1); /* need timeout XXX */ 1805 #endif 1806 1807 /* 1808 * State transition. 1809 */ 1810 sc->sc_phase = bus_space_read_1(iot, ioh, PSNS) & PH_MASK; 1811 #if 0 1812 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase); 1813 #endif 1814 1815 SPC_MISC(("phase=%d\n", sc->sc_phase)); 1816 switch (sc->sc_phase) { 1817 case PH_MSGOUT: 1818 if (sc->sc_state != SPC_CONNECTED && 1819 sc->sc_state != SPC_RESELECTED) 1820 break; 1821 spc_msgout(sc); 1822 sc->sc_prevphase = PH_MSGOUT; 1823 goto loop; 1824 1825 case PH_MSGIN: 1826 if (sc->sc_state != SPC_CONNECTED && 1827 sc->sc_state != SPC_RESELECTED) 1828 break; 1829 spc_msgin(sc); 1830 sc->sc_prevphase = PH_MSGIN; 1831 goto loop; 1832 1833 case PH_CMD: 1834 if (sc->sc_state != SPC_CONNECTED) 1835 break; 1836 #ifdef SPC_DEBUG 1837 if ((spc_debug & SPC_SHOWMISC) != 0) { 1838 SPC_ASSERT(sc->sc_nexus != NULL); 1839 acb = sc->sc_nexus; 1840 printf("cmd=0x%02x+%d ", 1841 acb->scsi_cmd.opcode, acb->scsi_cmd_length - 1); 1842 } 1843 #endif 1844 n = spc_dataout_pio(sc, sc->sc_cp, sc->sc_cleft); 1845 sc->sc_cp += n; 1846 sc->sc_cleft -= n; 1847 sc->sc_prevphase = PH_CMD; 1848 goto loop; 1849 1850 case PH_DATAOUT: 1851 if (sc->sc_state != SPC_CONNECTED) 1852 break; 1853 SPC_MISC(("dataout dleft=%d ", sc->sc_dleft)); 1854 n = spc_dataout_pio(sc, sc->sc_dp, sc->sc_dleft); 1855 sc->sc_dp += n; 1856 sc->sc_dleft -= n; 1857 sc->sc_prevphase = PH_DATAOUT; 1858 goto loop; 1859 1860 case PH_DATAIN: 1861 if (sc->sc_state != SPC_CONNECTED) 1862 break; 1863 SPC_MISC(("datain ")); 1864 n = spc_datain_pio(sc, sc->sc_dp, sc->sc_dleft); 1865 sc->sc_dp += n; 1866 sc->sc_dleft -= n; 1867 sc->sc_prevphase = PH_DATAIN; 1868 goto loop; 1869 1870 case PH_STAT: 1871 if (sc->sc_state != SPC_CONNECTED) 1872 break; 1873 SPC_ASSERT(sc->sc_nexus != NULL); 1874 acb = sc->sc_nexus; 1875 /*acb->target_stat = bus_space_read_1(iot, ioh, DREG);*/ 1876 spc_datain_pio(sc, &acb->target_stat, 1); 1877 SPC_MISC(("target_stat=0x%02x ", acb->target_stat)); 1878 sc->sc_prevphase = PH_STAT; 1879 goto loop; 1880 } 1881 1882 printf("%s: unexpected bus phase; resetting\n", sc->sc_dev.dv_xname); 1883 SPC_BREAK(); 1884 reset: 1885 spc_init(sc); 1886 return 1; 1887 1888 finish: 1889 timeout_del(&acb->xs->stimeout); 1890 bus_space_write_1(iot, ioh, INTS, ints); 1891 ints = 0; 1892 spc_done(sc, acb); 1893 goto out; 1894 1895 sched: 1896 sc->sc_state = SPC_IDLE; 1897 spc_sched(sc); 1898 goto out; 1899 1900 out: 1901 if (ints) 1902 bus_space_write_1(iot, ioh, INTS, ints); 1903 bus_space_write_1(iot, ioh, SCTL, 1904 bus_space_read_1(iot, ioh, SCTL) | SCTL_INTR_ENAB); 1905 return 1; 1906 } 1907 1908 void 1909 spc_abort(struct spc_softc *sc, struct spc_acb *acb) 1910 { 1911 1912 /* 2 secs for the abort */ 1913 acb->timeout = SPC_ABORT_TIMEOUT; 1914 acb->flags |= ACB_ABORT; 1915 1916 if (acb == sc->sc_nexus) { 1917 /* 1918 * If we're still selecting, the message will be scheduled 1919 * after selection is complete. 1920 */ 1921 if (sc->sc_state == SPC_CONNECTED) 1922 spc_sched_msgout(sc, SEND_ABORT); 1923 } else { 1924 spc_dequeue(sc, acb); 1925 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 1926 if (sc->sc_state == SPC_IDLE) 1927 spc_sched(sc); 1928 } 1929 } 1930 1931 void 1932 spc_timeout(void *arg) 1933 { 1934 struct spc_acb *acb = arg; 1935 struct scsi_xfer *xs = acb->xs; 1936 struct scsi_link *sc_link = xs->sc_link; 1937 struct spc_softc *sc = sc_link->adapter_softc; 1938 int s; 1939 1940 sc_print_addr(sc_link); 1941 printf("timed out"); 1942 1943 s = splbio(); 1944 1945 if (acb->flags & ACB_ABORT) { 1946 /* abort timed out */ 1947 printf(" AGAIN\n"); 1948 /* XXX Must reset! */ 1949 } else { 1950 /* abort the operation that has timed out */ 1951 printf("\n"); 1952 acb->xs->error = XS_TIMEOUT; 1953 spc_abort(sc, acb); 1954 } 1955 1956 splx(s); 1957 } 1958 1959 #ifdef SPC_DEBUG 1960 /* 1961 * The following functions are mostly used for debugging purposes, either 1962 * directly called from the driver or from the kernel debugger. 1963 */ 1964 1965 void 1966 spc_show_scsi_cmd(spc_acb *acb) 1967 { 1968 u_char *b = (u_char *)&acb->scsi_cmd; 1969 struct scsi_link *sc_link = acb->xs->sc_link; 1970 int i; 1971 1972 sc_print_addr(sc_link); 1973 if ((acb->xs->flags & SCSI_RESET) == 0) { 1974 for (i = 0; i < acb->scsi_cmd_length; i++) { 1975 if (i) 1976 printf(","); 1977 printf("%x", b[i]); 1978 } 1979 printf("\n"); 1980 } else 1981 printf("RESET\n"); 1982 } 1983 1984 void 1985 spc_print_acb(spc_acb *acb) 1986 { 1987 1988 printf("acb@%p xs=%p flags=%x", acb, acb->xs, acb->flags); 1989 printf(" dp=%p dleft=%d target_stat=%x\n", 1990 acb->data_addr, acb->data_length, acb->target_stat); 1991 spc_show_scsi_cmd(acb); 1992 } 1993 1994 void 1995 spc_print_active_acb() 1996 { 1997 struct spc_acb *acb; 1998 struct spc_softc *sc = spc_cd.cd_devs[0]; /* XXX */ 1999 2000 printf("ready list:\n"); 2001 TAILQ_FOREACH(acb, &sc->ready_list, chain) 2002 spc_print_acb(acb); 2003 printf("nexus:\n"); 2004 if (sc->sc_nexus != NULL) 2005 spc_print_acb(sc->sc_nexus); 2006 printf("nexus list:\n"); 2007 TAILQ_FOREACH(acb, &sc->nexus_list, chain) 2008 spc_print_acb(acb); 2009 } 2010 2011 void 2012 spc_dump89352(struct spc_softc *sc) 2013 { 2014 bus_space_tag_t iot = sc->sc_iot; 2015 bus_space_handle_t ioh = sc->sc_ioh; 2016 2017 printf("mb89352: BDID=%x SCTL=%x SCMD=%x TMOD=%x\n", 2018 bus_space_read_1(iot, ioh, BDID), 2019 bus_space_read_1(iot, ioh, SCTL), 2020 bus_space_read_1(iot, ioh, SCMD), 2021 bus_space_read_1(iot, ioh, TMOD)); 2022 printf(" INTS=%x PSNS=%x SSTS=%x SERR=%x PCTL=%x\n", 2023 bus_space_read_1(iot, ioh, INTS), 2024 bus_space_read_1(iot, ioh, PSNS), 2025 bus_space_read_1(iot, ioh, SSTS), 2026 bus_space_read_1(iot, ioh, SERR), 2027 bus_space_read_1(iot, ioh, PCTL)); 2028 printf(" MBC=%x DREG=%x TEMP=%x TCH=%x TCM=%x\n", 2029 bus_space_read_1(iot, ioh, MBC), 2030 #if 0 2031 bus_space_read_1(iot, ioh, DREG), 2032 #else 2033 0, 2034 #endif 2035 bus_space_read_1(iot, ioh, TEMP), 2036 bus_space_read_1(iot, ioh, TCH), 2037 bus_space_read_1(iot, ioh, TCM)); 2038 printf(" TCL=%x EXBF=%x\n", 2039 bus_space_read_1(iot, ioh, TCL), 2040 bus_space_read_1(iot, ioh, EXBF)); 2041 } 2042 2043 void 2044 spc_dump_driver(struct spc_softc *sc) 2045 { 2046 struct spc_tinfo *ti; 2047 int i; 2048 2049 printf("nexus=%p prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase); 2050 printf("state=%x msgin=%x msgpriq=%x msgoutq=%x lastmsg=%x " 2051 "currmsg=%x\n", sc->sc_state, sc->sc_imess[0], 2052 sc->sc_msgpriq, sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg); 2053 for (i = 0; i < 7; i++) { 2054 ti = &sc->sc_tinfo[i]; 2055 printf("tinfo%d: %d cmds %d disconnects %d timeouts", 2056 i, ti->cmds, ti->dconns, ti->touts); 2057 printf(" %d senses flags=%x\n", ti->senses, ti->flags); 2058 } 2059 } 2060 #endif 2061