1 /* $OpenBSD: mb89352.c,v 1.9 2009/09/18 19:17:00 miod Exp $ */ 2 /* $NetBSD: mb89352.c,v 1.5 2000/03/23 07:01:31 thorpej Exp $ */ 3 /* NecBSD: mb89352.c,v 1.4 1998/03/14 07:31:20 kmatsuda Exp */ 4 5 #ifdef DDB 6 #define integrate 7 #else 8 #define integrate __inline static 9 #endif 10 11 /*- 12 * Copyright (c) 1996,97,98,99 The NetBSD Foundation, Inc. 13 * All rights reserved. 14 * 15 * This code is derived from software contributed to The NetBSD Foundation 16 * by Charles M. Hannum, Masaru Oki and Kouichi Matsuda. 17 * 18 * Redistribution and use in source and binary forms, with or without 19 * modification, are permitted provided that the following conditions 20 * are met: 21 * 1. Redistributions of source code must retain the above copyright 22 * notice, this list of conditions and the following disclaimer. 23 * 2. Redistributions in binary form must reproduce the above copyright 24 * notice, this list of conditions and the following disclaimer in the 25 * documentation and/or other materials provided with the distribution. 26 * 3. All advertising materials mentioning features or use of this software 27 * must display the following acknowledgement: 28 * This product includes software developed by Charles M. Hannum. 29 * 4. The name of the author may not be used to endorse or promote products 30 * derived from this software without specific prior written permission. 31 * 32 * Copyright (c) 1994 Jarle Greipsland 33 * All rights reserved. 34 * 35 * Redistribution and use in source and binary forms, with or without 36 * modification, are permitted provided that the following conditions 37 * are met: 38 * 1. Redistributions of source code must retain the above copyright 39 * notice, this list of conditions and the following disclaimer. 40 * 2. Redistributions in binary form must reproduce the above copyright 41 * notice, this list of conditions and the following disclaimer in the 42 * documentation and/or other materials provided with the distribution. 43 * 3. The name of the author may not be used to endorse or promote products 44 * derived from this software without specific prior written permission. 45 * 46 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 47 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 48 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 49 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 50 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 51 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 52 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 53 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 54 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 55 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 56 * POSSIBILITY OF SUCH DAMAGE. 57 */ 58 /* 59 * [NetBSD for NEC PC-98 series] 60 * Copyright (c) 1996, 1997, 1998 61 * NetBSD/pc98 porting staff. All rights reserved. 62 * Copyright (c) 1996, 1997, 1998 63 * Kouichi Matsuda. All rights reserved. 64 */ 65 66 /* 67 * Acknowledgements: Many of the algorithms used in this driver are 68 * inspired by the work of Julian Elischer (julian@tfs.com) and 69 * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million! 70 */ 71 72 /* TODO list: 73 * 1) Get the DMA stuff working. 74 * 2) Get the iov/uio stuff working. Is this a good thing ??? 75 * 3) Get the synch stuff working. 76 * 4) Rewrite it to use malloc for the acb structs instead of static alloc.? 77 */ 78 79 /* 80 * A few customizable items: 81 */ 82 83 /* Synchronous data transfers? */ 84 #define SPC_USE_SYNCHRONOUS 0 85 #define SPC_SYNC_REQ_ACK_OFS 8 86 87 /* Wide data transfers? */ 88 #define SPC_USE_WIDE 0 89 #define SPC_MAX_WIDTH 0 90 91 /* Max attempts made to transmit a message */ 92 #define SPC_MSG_MAX_ATTEMPT 3 /* Not used now XXX */ 93 94 /* 95 * Some spin loop parameters (essentially how long to wait some places) 96 * The problem(?) is that sometimes we expect either to be able to transmit a 97 * byte or to get a new one from the SCSI bus pretty soon. In order to avoid 98 * returning from the interrupt just to get yanked back for the next byte we 99 * may spin in the interrupt routine waiting for this byte to come. How long? 100 * This is really (SCSI) device and processor dependent. Tuneable, I guess. 101 */ 102 #define SPC_MSGIN_SPIN 1 /* Will spinwait upto ?ms for a new msg byte */ 103 #define SPC_MSGOUT_SPIN 1 104 105 /* 106 * Include debug functions? At the end of this file there are a bunch of 107 * functions that will print out various information regarding queued SCSI 108 * commands, driver state and chip contents. You can call them from the 109 * kernel debugger. If you set SPC_DEBUG to 0 they are not included (the 110 * kernel uses less memory) but you lose the debugging facilities. 111 */ 112 /* #define SPC_DEBUG */ 113 114 #define SPC_ABORT_TIMEOUT 2000 /* time to wait for abort */ 115 116 /* End of customizable parameters */ 117 118 /* 119 * MB89352 SCSI Protocol Controller (SPC) routines. 120 */ 121 122 #include <sys/param.h> 123 #include <sys/systm.h> 124 #include <sys/kernel.h> 125 #include <sys/errno.h> 126 #include <sys/ioctl.h> 127 #include <sys/device.h> 128 #include <sys/buf.h> 129 #include <sys/proc.h> 130 #include <sys/user.h> 131 #include <sys/queue.h> 132 133 #include <machine/intr.h> 134 #include <machine/bus.h> 135 136 #include <scsi/scsi_all.h> 137 #include <scsi/scsi_message.h> 138 #include <scsi/scsiconf.h> 139 140 #include <luna88k/dev/mb89352reg.h> 141 #include <luna88k/dev/mb89352var.h> 142 143 #ifndef DDB 144 #define Debugger() panic("should call debugger here (mb89352.c)") 145 #endif /* ! DDB */ 146 147 #ifdef SPC_DEBUG 148 int spc_debug = 0x00; /* SPC_SHOWSTART|SPC_SHOWMISC|SPC_SHOWTRACE; */ 149 #endif 150 151 void spc_done (struct spc_softc *, struct spc_acb *); 152 void spc_dequeue (struct spc_softc *, struct spc_acb *); 153 int spc_scsi_cmd (struct scsi_xfer *); 154 int spc_poll (struct spc_softc *, struct scsi_xfer *, int); 155 integrate void spc_sched_msgout(struct spc_softc *, u_char); 156 integrate void spc_setsync(struct spc_softc *, struct spc_tinfo *); 157 void spc_select (struct spc_softc *, struct spc_acb *); 158 void spc_timeout (void *); 159 void spc_scsi_reset (struct spc_softc *); 160 void spc_reset (struct spc_softc *); 161 void spc_free_acb (struct spc_softc *, struct spc_acb *, int); 162 struct spc_acb* spc_get_acb(struct spc_softc *, int); 163 int spc_reselect (struct spc_softc *, int); 164 void spc_sense (struct spc_softc *, struct spc_acb *); 165 void spc_msgin (struct spc_softc *); 166 void spc_abort (struct spc_softc *, struct spc_acb *); 167 void spc_msgout (struct spc_softc *); 168 int spc_dataout_pio (struct spc_softc *, u_char *, int); 169 int spc_datain_pio (struct spc_softc *, u_char *, int); 170 #ifdef SPC_DEBUG 171 void spc_print_acb (struct spc_acb *); 172 void spc_dump_driver (struct spc_softc *); 173 void spc_dump89352 (struct spc_softc *); 174 void spc_show_scsi_cmd(struct spc_acb *); 175 void spc_print_active_acb(void); 176 #endif 177 178 extern struct cfdriver spc_cd; 179 180 struct scsi_device spc_dev = { 181 NULL, /* Use default error handler */ 182 NULL, /* have a queue, served by this */ 183 NULL, /* have no async handler */ 184 NULL, /* Use default 'done' routine */ 185 }; 186 187 /* 188 * INITIALIZATION ROUTINES (probe, attach ++) 189 */ 190 191 void 192 /* spc_attach(sc) */ 193 spc_attach(sc, adapter) 194 struct spc_softc *sc; 195 struct scsi_adapter *adapter; 196 { 197 struct scsibus_attach_args saa; 198 SPC_TRACE(("spc_attach ")); 199 sc->sc_state = SPC_INIT; 200 201 sc->sc_freq = 20; /* XXXX Assume 20 MHz. */ 202 203 #if SPC_USE_SYNCHRONOUS 204 /* 205 * These are the bounds of the sync period, based on the frequency of 206 * the chip's clock input and the size and offset of the sync period 207 * register. 208 * 209 * For a 20MHz clock, this gives us 25, or 100nS, or 10MB/s, as a 210 * maximum transfer rate, and 112.5, or 450nS, or 2.22MB/s, as a 211 * minimum transfer rate. 212 */ 213 sc->sc_minsync = (2 * 250) / sc->sc_freq; 214 sc->sc_maxsync = (9 * 250) / sc->sc_freq; 215 #endif 216 217 spc_init(sc); /* Init chip and driver */ 218 219 /* 220 * Fill in the adapter. 221 */ 222 sc->sc_link.adapter_softc = sc; 223 sc->sc_link.adapter_target = sc->sc_initiator; 224 sc->sc_link.adapter = adapter; 225 sc->sc_link.device = &spc_dev; 226 sc->sc_link.openings = 2; 227 228 bzero(&saa, sizeof(saa)); 229 saa.saa_sc_link = &sc->sc_link; 230 231 /* 232 * ask the adapter what subunits are present 233 */ 234 config_found(&sc->sc_dev, &saa, scsiprint); 235 } 236 237 /* 238 * Initialize MB89352 chip itself 239 * The following conditions should hold: 240 * spc_isa_probe should have succeeded, i.e. the iobase address in spc_softc 241 * must be valid. 242 */ 243 void 244 spc_reset(sc) 245 struct spc_softc *sc; 246 { 247 bus_space_tag_t iot = sc->sc_iot; 248 bus_space_handle_t ioh = sc->sc_ioh; 249 250 SPC_TRACE(("spc_reset ")); 251 /* 252 * Disable interrupts then reset the FUJITSU chip. 253 */ 254 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST); 255 bus_space_write_1(iot, ioh, SCMD, 0); 256 bus_space_write_1(iot, ioh, TMOD, 0); 257 bus_space_write_1(iot, ioh, PCTL, 0); 258 bus_space_write_1(iot, ioh, TEMP, 0); 259 bus_space_write_1(iot, ioh, TCH, 0); 260 bus_space_write_1(iot, ioh, TCM, 0); 261 bus_space_write_1(iot, ioh, TCL, 0); 262 bus_space_write_1(iot, ioh, INTS, 0); 263 bus_space_write_1(iot, ioh, SCTL, 264 SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB); 265 bus_space_write_1(iot, ioh, BDID, sc->sc_initiator); 266 delay(400); 267 bus_space_write_1(iot, ioh, SCTL, 268 bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE); 269 } 270 271 272 /* 273 * Pull the SCSI RST line for 500us. 274 */ 275 void 276 spc_scsi_reset(sc) 277 struct spc_softc *sc; 278 { 279 bus_space_tag_t iot = sc->sc_iot; 280 bus_space_handle_t ioh = sc->sc_ioh; 281 282 SPC_TRACE(("spc_scsi_reset ")); 283 bus_space_write_1(iot, ioh, SCMD, bus_space_read_1(iot, ioh, SCMD) | SCMD_RST); 284 delay(500); 285 bus_space_write_1(iot, ioh, SCMD, bus_space_read_1(iot, ioh, SCMD) & ~SCMD_RST); 286 delay(50); 287 } 288 289 /* 290 * Initialize spc SCSI driver. 291 */ 292 void 293 spc_init(sc) 294 struct spc_softc *sc; 295 { 296 struct spc_acb *acb; 297 int r; 298 299 SPC_TRACE(("spc_init ")); 300 spc_reset(sc); 301 spc_scsi_reset(sc); 302 spc_reset(sc); 303 304 if (sc->sc_state == SPC_INIT) { 305 /* First time through; initialize. */ 306 TAILQ_INIT(&sc->ready_list); 307 TAILQ_INIT(&sc->nexus_list); 308 TAILQ_INIT(&sc->free_list); 309 sc->sc_nexus = NULL; 310 acb = sc->sc_acb; 311 bzero(acb, sizeof(sc->sc_acb)); 312 for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) { 313 TAILQ_INSERT_TAIL(&sc->free_list, acb, chain); 314 acb++; 315 } 316 bzero(&sc->sc_tinfo, sizeof(sc->sc_tinfo)); 317 } else { 318 /* Cancel any active commands. */ 319 sc->sc_state = SPC_CLEANING; 320 if ((acb = sc->sc_nexus) != NULL) { 321 acb->xs->error = XS_DRIVER_STUFFUP; 322 timeout_del(&acb->xs->stimeout); 323 spc_done(sc, acb); 324 } 325 while ((acb = TAILQ_FIRST(&sc->nexus_list)) != NULL) { 326 acb->xs->error = XS_DRIVER_STUFFUP; 327 timeout_del(&acb->xs->stimeout); 328 spc_done(sc, acb); 329 } 330 } 331 332 sc->sc_prevphase = PH_INVALID; 333 for (r = 0; r < 8; r++) { 334 struct spc_tinfo *ti = &sc->sc_tinfo[r]; 335 336 ti->flags = 0; 337 #if SPC_USE_SYNCHRONOUS 338 ti->flags |= DO_SYNC; 339 ti->period = sc->sc_minsync; 340 ti->offset = SPC_SYNC_REQ_ACK_OFS; 341 #else 342 ti->period = ti->offset = 0; 343 #endif 344 #if SPC_USE_WIDE 345 ti->flags |= DO_WIDE; 346 ti->width = SPC_MAX_WIDTH; 347 #else 348 ti->width = 0; 349 #endif 350 } 351 352 sc->sc_state = SPC_IDLE; 353 bus_space_write_1(sc->sc_iot, sc->sc_ioh, SCTL, 354 bus_space_read_1(sc->sc_iot, sc->sc_ioh, SCTL) | SCTL_INTR_ENAB); 355 } 356 357 void 358 spc_free_acb(sc, acb, flags) 359 struct spc_softc *sc; 360 struct spc_acb *acb; 361 int flags; 362 { 363 int s; 364 365 SPC_TRACE(("spc_free_acb ")); 366 s = splbio(); 367 368 acb->flags = 0; 369 TAILQ_INSERT_HEAD(&sc->free_list, acb, chain); 370 371 /* 372 * If there were none, wake anybody waiting for one to come free, 373 * starting with queued entries. 374 */ 375 if (TAILQ_NEXT(acb, chain) == NULL) 376 wakeup(&sc->free_list); 377 378 splx(s); 379 } 380 381 struct spc_acb * 382 spc_get_acb(sc, flags) 383 struct spc_softc *sc; 384 int flags; 385 { 386 struct spc_acb *acb; 387 int s; 388 389 SPC_TRACE(("spc_get_acb ")); 390 s = splbio(); 391 392 while ((acb = TAILQ_FIRST(&sc->free_list)) == NULL && 393 (flags & SCSI_NOSLEEP) == 0) 394 tsleep(&sc->free_list, PRIBIO, "spcacb", 0); 395 if (acb) { 396 TAILQ_REMOVE(&sc->free_list, acb, chain); 397 acb->flags |= ACB_ALLOC; 398 } 399 400 splx(s); 401 return acb; 402 } 403 404 /* 405 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS 406 */ 407 408 /* 409 * Expected sequence: 410 * 1) Command inserted into ready list 411 * 2) Command selected for execution 412 * 3) Command won arbitration and has selected target device 413 * 4) Send message out (identify message, eventually also sync.negotiations) 414 * 5) Send command 415 * 5a) Receive disconnect message, disconnect. 416 * 5b) Reselected by target 417 * 5c) Receive identify message from target. 418 * 6) Send or receive data 419 * 7) Receive status 420 * 8) Receive message (command complete etc.) 421 * 9) If status == SCSI_CHECK construct a synthetic request sense SCSI cmd. 422 * Repeat 2-8 (no disconnects please...) 423 */ 424 425 /* 426 * Start a SCSI-command 427 * This function is called by the higher level SCSI-driver to queue/run 428 * SCSI-commands. 429 */ 430 int 431 spc_scsi_cmd(xs) 432 struct scsi_xfer *xs; 433 { 434 struct scsi_link *sc_link = xs->sc_link; 435 struct spc_softc *sc = sc_link->adapter_softc; 436 struct spc_acb *acb; 437 int s, flags; 438 439 SPC_TRACE(("spc_scsi_cmd ")); 440 SPC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, 441 sc_link->target)); 442 443 flags = xs->flags; 444 if ((acb = spc_get_acb(sc, flags)) == NULL) { 445 return (NO_CCB); 446 } 447 448 /* Initialize acb */ 449 acb->xs = xs; 450 acb->timeout = xs->timeout; 451 timeout_set(&xs->stimeout, spc_timeout, acb); 452 453 if (xs->flags & SCSI_RESET) { 454 acb->flags |= ACB_RESET; 455 acb->scsi_cmd_length = 0; 456 acb->data_length = 0; 457 } else { 458 bcopy(xs->cmd, &acb->scsi_cmd, xs->cmdlen); 459 acb->scsi_cmd_length = xs->cmdlen; 460 acb->data_addr = xs->data; 461 acb->data_length = xs->datalen; 462 } 463 acb->target_stat = 0; 464 465 s = splbio(); 466 467 TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain); 468 /* 469 * Start scheduling unless a queue process is in progress. 470 */ 471 if (sc->sc_state == SPC_IDLE) 472 spc_sched(sc); 473 /* 474 * After successful sending, check if we should return just now. 475 * If so, return SUCCESSFULLY_QUEUED. 476 */ 477 478 splx(s); 479 480 if ((flags & SCSI_POLL) == 0) 481 return SUCCESSFULLY_QUEUED; 482 483 /* Not allowed to use interrupts, use polling instead */ 484 s = splbio(); 485 if (spc_poll(sc, xs, acb->timeout)) { 486 spc_timeout(acb); 487 if (spc_poll(sc, xs, acb->timeout)) 488 spc_timeout(acb); 489 } 490 splx(s); 491 return COMPLETE; 492 } 493 494 /* 495 * Used when interrupt driven I/O isn't allowed, e.g. during boot. 496 */ 497 int 498 spc_poll(sc, xs, count) 499 struct spc_softc *sc; 500 struct scsi_xfer *xs; 501 int count; 502 { 503 bus_space_tag_t iot = sc->sc_iot; 504 bus_space_handle_t ioh = sc->sc_ioh; 505 506 SPC_TRACE(("spc_poll ")); 507 while (count) { 508 /* 509 * If we had interrupts enabled, would we 510 * have got an interrupt? 511 */ 512 if (bus_space_read_1(iot, ioh, INTS) != 0) 513 spc_intr(sc); 514 if ((xs->flags & ITSDONE) != 0) 515 return 0; 516 delay(1000); 517 count--; 518 } 519 return 1; 520 } 521 522 /* 523 * LOW LEVEL SCSI UTILITIES 524 */ 525 526 integrate void 527 spc_sched_msgout(sc, m) 528 struct spc_softc *sc; 529 u_char m; 530 { 531 bus_space_tag_t iot = sc->sc_iot; 532 bus_space_handle_t ioh = sc->sc_ioh; 533 534 SPC_TRACE(("spc_sched_msgout ")); 535 if (sc->sc_msgpriq == 0) 536 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN); 537 sc->sc_msgpriq |= m; 538 } 539 540 /* 541 * Set synchronous transfer offset and period. 542 */ 543 integrate void 544 spc_setsync(sc, ti) 545 struct spc_softc *sc; 546 struct spc_tinfo *ti; 547 { 548 #if SPC_USE_SYNCHRONOUS 549 bus_space_tag_t iot = sc->sc_iot; 550 bus_space_handle_t ioh = sc->sc_ioh; 551 552 SPC_TRACE(("spc_setsync ")); 553 if (ti->offset != 0) 554 bus_space_write_1(iot, ioh, TMOD, 555 ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset); 556 else 557 bus_space_write_1(iot, ioh, TMOD, 0); 558 #endif 559 } 560 561 /* 562 * Start a selection. This is used by spc_sched() to select an idle target, 563 * and by spc_done() to immediately reselect a target to get sense information. 564 */ 565 void 566 spc_select(sc, acb) 567 struct spc_softc *sc; 568 struct spc_acb *acb; 569 { 570 struct scsi_link *sc_link = acb->xs->sc_link; 571 int target = sc_link->target; 572 struct spc_tinfo *ti = &sc->sc_tinfo[target]; 573 bus_space_tag_t iot = sc->sc_iot; 574 bus_space_handle_t ioh = sc->sc_ioh; 575 576 SPC_TRACE(("spc_select ")); 577 spc_setsync(sc, ti); 578 579 #if 0 580 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN); 581 #endif 582 583 bus_space_write_1(iot, ioh, PCTL, 0); 584 bus_space_write_1(iot, ioh, TEMP, 585 (1 << sc->sc_initiator) | (1 << target)); 586 /* 587 * Setup BSY timeout (selection timeout). 588 * 250ms according to the SCSI specification. 589 * T = (X * 256 + 15) * Tclf * 2 (Tclf = 200ns on x68k) 590 * To setup 256ms timeout, 591 * 128000ns/200ns = X * 256 + 15 592 * 640 - 15 = X * 256 593 * X = 625 / 256 594 * X = 2 + 113 / 256 595 * ==> tch = 2, tcm = 113 (correct?) 596 */ 597 /* Time to the information transfer phase start. */ 598 /* XXX These values should be calculated from sc_freq */ 599 bus_space_write_1(iot, ioh, TCH, 2); 600 bus_space_write_1(iot, ioh, TCM, 113); 601 bus_space_write_1(iot, ioh, TCL, 3); 602 bus_space_write_1(iot, ioh, SCMD, SCMD_SELECT); 603 604 sc->sc_state = SPC_SELECTING; 605 } 606 607 int 608 spc_reselect(sc, message) 609 struct spc_softc *sc; 610 int message; 611 { 612 u_char selid, target, lun; 613 struct spc_acb *acb; 614 struct scsi_link *sc_link; 615 struct spc_tinfo *ti; 616 617 SPC_TRACE(("spc_reselect ")); 618 /* 619 * The SCSI chip made a snapshot of the data bus while the reselection 620 * was being negotiated. This enables us to determine which target did 621 * the reselect. 622 */ 623 selid = sc->sc_selid & ~(1 << sc->sc_initiator); 624 if (selid & (selid - 1)) { 625 printf("%s: reselect with invalid selid %02x; " 626 "sending DEVICE RESET\n", sc->sc_dev.dv_xname, selid); 627 SPC_BREAK(); 628 goto reset; 629 } 630 631 /* 632 * Search wait queue for disconnected cmd 633 * The list should be short, so I haven't bothered with 634 * any more sophisticated structures than a simple 635 * singly linked list. 636 */ 637 target = ffs(selid) - 1; 638 lun = message & 0x07; 639 TAILQ_FOREACH(acb, &sc->nexus_list, chain) { 640 sc_link = acb->xs->sc_link; 641 if (sc_link->target == target && 642 sc_link->lun == lun) 643 break; 644 } 645 if (acb == NULL) { 646 printf("%s: reselect from target %d lun %d with no nexus; " 647 "sending ABORT\n", sc->sc_dev.dv_xname, target, lun); 648 SPC_BREAK(); 649 goto abort; 650 } 651 652 /* Make this nexus active again. */ 653 TAILQ_REMOVE(&sc->nexus_list, acb, chain); 654 sc->sc_state = SPC_CONNECTED; 655 sc->sc_nexus = acb; 656 ti = &sc->sc_tinfo[target]; 657 ti->lubusy |= (1 << lun); 658 spc_setsync(sc, ti); 659 660 if (acb->flags & ACB_RESET) 661 spc_sched_msgout(sc, SEND_DEV_RESET); 662 else if (acb->flags & ACB_ABORT) 663 spc_sched_msgout(sc, SEND_ABORT); 664 665 /* Do an implicit RESTORE POINTERS. */ 666 sc->sc_dp = acb->data_addr; 667 sc->sc_dleft = acb->data_length; 668 sc->sc_cp = (u_char *)&acb->scsi_cmd; 669 sc->sc_cleft = acb->scsi_cmd_length; 670 671 return (0); 672 673 reset: 674 spc_sched_msgout(sc, SEND_DEV_RESET); 675 return (1); 676 677 abort: 678 spc_sched_msgout(sc, SEND_ABORT); 679 return (1); 680 } 681 682 /* 683 * Schedule a SCSI operation. This has now been pulled out of the interrupt 684 * handler so that we may call it from spc_scsi_cmd and spc_done. This may 685 * save us an unnecessary interrupt just to get things going. Should only be 686 * called when state == SPC_IDLE and at bio pl. 687 */ 688 void 689 spc_sched(sc) 690 struct spc_softc *sc; 691 { 692 struct spc_acb *acb; 693 struct scsi_link *sc_link; 694 struct spc_tinfo *ti; 695 696 /* missing the hw, just return and wait for our hw */ 697 if (sc->sc_flags & SPC_INACTIVE) 698 return; 699 SPC_TRACE(("spc_sched ")); 700 /* 701 * Find first acb in ready queue that is for a target/lunit pair that 702 * is not busy. 703 */ 704 TAILQ_FOREACH(acb, &sc->ready_list, chain) { 705 sc_link = acb->xs->sc_link; 706 ti = &sc->sc_tinfo[sc_link->target]; 707 if ((ti->lubusy & (1 << sc_link->lun)) == 0) { 708 SPC_MISC(("selecting %d:%d ", 709 sc_link->target, sc_link->lun)); 710 TAILQ_REMOVE(&sc->ready_list, acb, chain); 711 sc->sc_nexus = acb; 712 spc_select(sc, acb); 713 return; 714 } else 715 SPC_MISC(("%d:%d busy\n", 716 sc_link->target, sc_link->lun)); 717 } 718 SPC_MISC(("idle ")); 719 /* Nothing to start; just enable reselections and wait. */ 720 } 721 722 void 723 spc_sense(sc, acb) 724 struct spc_softc *sc; 725 struct spc_acb *acb; 726 { 727 struct scsi_xfer *xs = acb->xs; 728 struct scsi_link *sc_link = xs->sc_link; 729 struct spc_tinfo *ti = &sc->sc_tinfo[sc_link->target]; 730 struct scsi_sense *ss = (void *)&acb->scsi_cmd; 731 732 SPC_MISC(("requesting sense ")); 733 /* Next, setup a request sense command block */ 734 bzero(ss, sizeof(*ss)); 735 ss->opcode = REQUEST_SENSE; 736 ss->byte2 = sc_link->lun << 5; 737 ss->length = sizeof(struct scsi_sense_data); 738 acb->scsi_cmd_length = sizeof(*ss); 739 acb->data_addr = (char *)&xs->sense; 740 acb->data_length = sizeof(struct scsi_sense_data); 741 acb->flags |= ACB_SENSE; 742 ti->senses++; 743 if (acb->flags & ACB_NEXUS) 744 ti->lubusy &= ~(1 << sc_link->lun); 745 if (acb == sc->sc_nexus) { 746 spc_select(sc, acb); 747 } else { 748 spc_dequeue(sc, acb); 749 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 750 if (sc->sc_state == SPC_IDLE) 751 spc_sched(sc); 752 } 753 } 754 755 /* 756 * POST PROCESSING OF SCSI_CMD (usually current) 757 */ 758 void 759 spc_done(sc, acb) 760 struct spc_softc *sc; 761 struct spc_acb *acb; 762 { 763 struct scsi_xfer *xs = acb->xs; 764 struct scsi_link *sc_link = xs->sc_link; 765 struct spc_tinfo *ti = &sc->sc_tinfo[sc_link->target]; 766 767 SPC_TRACE(("spc_done ")); 768 769 /* 770 * Now, if we've come here with no error code, i.e. we've kept the 771 * initial XS_NOERROR, and the status code signals that we should 772 * check sense, we'll need to set up a request sense cmd block and 773 * push the command back into the ready queue *before* any other 774 * commands for this target/lunit, else we lose the sense info. 775 * We don't support chk sense conditions for the request sense cmd. 776 */ 777 if (xs->error == XS_NOERROR) { 778 if (acb->flags & ACB_ABORT) { 779 xs->error = XS_DRIVER_STUFFUP; 780 } else if (acb->flags & ACB_SENSE) { 781 xs->error = XS_SENSE; 782 } else { 783 switch (acb->target_stat) { 784 case SCSI_CHECK: 785 /* First, save the return values */ 786 xs->resid = acb->data_length; 787 xs->status = acb->target_stat; 788 spc_sense(sc, acb); 789 return; 790 case SCSI_BUSY: 791 xs->error = XS_BUSY; 792 break; 793 case SCSI_OK: 794 xs->resid = acb->data_length; 795 break; 796 default: 797 xs->error = XS_DRIVER_STUFFUP; 798 #ifdef SPC_DEBUG 799 printf("%s: spc_done: bad stat 0x%x\n", 800 sc->sc_dev.dv_xname, acb->target_stat); 801 #endif 802 break; 803 } 804 } 805 } 806 807 xs->flags |= ITSDONE; 808 809 #ifdef SPC_DEBUG 810 if ((spc_debug & SPC_SHOWMISC) != 0) { 811 if (xs->resid != 0) 812 printf("resid=%d ", xs->resid); 813 if (xs->error == XS_SENSE) 814 printf("sense=0x%02x\n", xs->sense.error_code); 815 else 816 printf("error=%d\n", xs->error); 817 } 818 #endif 819 820 /* 821 * Remove the ACB from whatever queue it happens to be on. 822 */ 823 if (acb->flags & ACB_NEXUS) 824 ti->lubusy &= ~(1 << sc_link->lun); 825 if (acb == sc->sc_nexus) { 826 sc->sc_nexus = NULL; 827 sc->sc_state = SPC_IDLE; 828 spc_sched(sc); 829 } else 830 spc_dequeue(sc, acb); 831 832 spc_free_acb(sc, acb, xs->flags); 833 ti->cmds++; 834 scsi_done(xs); 835 } 836 837 void 838 spc_dequeue(sc, acb) 839 struct spc_softc *sc; 840 struct spc_acb *acb; 841 { 842 843 SPC_TRACE(("spc_dequeue ")); 844 if (acb->flags & ACB_NEXUS) 845 TAILQ_REMOVE(&sc->nexus_list, acb, chain); 846 else 847 TAILQ_REMOVE(&sc->ready_list, acb, chain); 848 } 849 850 /* 851 * INTERRUPT/PROTOCOL ENGINE 852 */ 853 854 #define IS1BYTEMSG(m) (((m) != 0x01 && (m) < 0x20) || (m) >= 0x80) 855 #define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20) 856 #define ISEXTMSG(m) ((m) == 0x01) 857 858 /* 859 * Precondition: 860 * The SCSI bus is already in the MSGI phase and there is a message byte 861 * on the bus, along with an asserted REQ signal. 862 */ 863 void 864 spc_msgin(sc) 865 struct spc_softc *sc; 866 { 867 bus_space_tag_t iot = sc->sc_iot; 868 bus_space_handle_t ioh = sc->sc_ioh; 869 int n; 870 871 SPC_TRACE(("spc_msgin ")); 872 873 if (sc->sc_prevphase == PH_MSGIN) { 874 /* This is a continuation of the previous message. */ 875 n = sc->sc_imp - sc->sc_imess; 876 goto nextbyte; 877 } 878 879 /* This is a new MESSAGE IN phase. Clean up our state. */ 880 sc->sc_flags &= ~SPC_DROP_MSGIN; 881 882 nextmsg: 883 n = 0; 884 sc->sc_imp = &sc->sc_imess[n]; 885 886 nextbyte: 887 /* 888 * Read a whole message, but don't ack the last byte. If we reject the 889 * message, we have to assert ATN during the message transfer phase 890 * itself. 891 */ 892 for (;;) { 893 #if 0 894 for (;;) { 895 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0) 896 break; 897 /* Wait for REQINIT. XXX Need timeout. */ 898 } 899 #endif 900 if (bus_space_read_1(iot, ioh, INTS) != 0) { 901 /* 902 * Target left MESSAGE IN, probably because it 903 * a) noticed our ATN signal, or 904 * b) ran out of messages. 905 */ 906 goto out; 907 } 908 909 /* If parity error, just dump everything on the floor. */ 910 if ((bus_space_read_1(iot, ioh, SERR) & 911 (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) { 912 sc->sc_flags |= SPC_DROP_MSGIN; 913 spc_sched_msgout(sc, SEND_PARITY_ERROR); 914 } 915 916 /* send TRANSFER command. */ 917 bus_space_write_1(iot, ioh, TCH, 0); 918 bus_space_write_1(iot, ioh, TCM, 0); 919 bus_space_write_1(iot, ioh, TCL, 1); 920 bus_space_write_1(iot, ioh, PCTL, 921 sc->sc_phase | PCTL_BFINT_ENAB); 922 #ifdef x68k 923 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* | SCMD_PROG_XFR */ 924 #else 925 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR); /* XXX */ 926 #endif 927 for (;;) { 928 /*if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0 929 && (bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0)*/ 930 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) == 0) 931 break; 932 if (bus_space_read_1(iot, ioh, INTS) != 0) 933 goto out; 934 } 935 936 /* Gather incoming message bytes if needed. */ 937 if ((sc->sc_flags & SPC_DROP_MSGIN) == 0) { 938 if (n >= SPC_MAX_MSG_LEN) { 939 (void) bus_space_read_1(iot, ioh, DREG); 940 sc->sc_flags |= SPC_DROP_MSGIN; 941 spc_sched_msgout(sc, SEND_REJECT); 942 } else { 943 *sc->sc_imp++ = bus_space_read_1(iot, ioh, DREG); 944 n++; 945 /* 946 * This testing is suboptimal, but most 947 * messages will be of the one byte variety, so 948 * it should not affect performance 949 * significantly. 950 */ 951 if (n == 1 && IS1BYTEMSG(sc->sc_imess[0])) 952 break; 953 if (n == 2 && IS2BYTEMSG(sc->sc_imess[0])) 954 break; 955 if (n >= 3 && ISEXTMSG(sc->sc_imess[0]) && 956 n == sc->sc_imess[1] + 2) 957 break; 958 } 959 } else 960 (void) bus_space_read_1(iot, ioh, DREG); 961 962 /* 963 * If we reach this spot we're either: 964 * a) in the middle of a multi-byte message, or 965 * b) dropping bytes. 966 */ 967 #if 0 968 /* Ack the last byte read. */ 969 /*(void) bus_space_read_1(iot, ioh, DREG);*/ 970 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0) 971 ; 972 #endif 973 } 974 975 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0])); 976 977 /* We now have a complete message. Parse it. */ 978 switch (sc->sc_state) { 979 struct spc_acb *acb; 980 struct scsi_link *sc_link; 981 struct spc_tinfo *ti; 982 983 case SPC_CONNECTED: 984 SPC_ASSERT(sc->sc_nexus != NULL); 985 acb = sc->sc_nexus; 986 ti = &sc->sc_tinfo[acb->xs->sc_link->target]; 987 988 switch (sc->sc_imess[0]) { 989 case MSG_CMDCOMPLETE: 990 if (sc->sc_dleft < 0) { 991 sc_link = acb->xs->sc_link; 992 printf("%s: %d extra bytes from %d:%d\n", 993 sc->sc_dev.dv_xname, -sc->sc_dleft, 994 sc_link->target, sc_link->lun); 995 acb->data_length = 0; 996 } 997 acb->xs->resid = acb->data_length = sc->sc_dleft; 998 sc->sc_state = SPC_CMDCOMPLETE; 999 break; 1000 1001 case MSG_PARITY_ERROR: 1002 /* Resend the last message. */ 1003 spc_sched_msgout(sc, sc->sc_lastmsg); 1004 break; 1005 1006 case MSG_MESSAGE_REJECT: 1007 SPC_MISC(("message rejected %02x ", sc->sc_lastmsg)); 1008 switch (sc->sc_lastmsg) { 1009 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE 1010 case SEND_IDENTIFY: 1011 ti->flags &= ~(DO_SYNC | DO_WIDE); 1012 ti->period = ti->offset = 0; 1013 spc_setsync(sc, ti); 1014 ti->width = 0; 1015 break; 1016 #endif 1017 #if SPC_USE_SYNCHRONOUS 1018 case SEND_SDTR: 1019 ti->flags &= ~DO_SYNC; 1020 ti->period = ti->offset = 0; 1021 spc_setsync(sc, ti); 1022 break; 1023 #endif 1024 #if SPC_USE_WIDE 1025 case SEND_WDTR: 1026 ti->flags &= ~DO_WIDE; 1027 ti->width = 0; 1028 break; 1029 #endif 1030 case SEND_INIT_DET_ERR: 1031 spc_sched_msgout(sc, SEND_ABORT); 1032 break; 1033 } 1034 break; 1035 1036 case MSG_NOOP: 1037 break; 1038 1039 case MSG_DISCONNECT: 1040 ti->dconns++; 1041 sc->sc_state = SPC_DISCONNECT; 1042 break; 1043 1044 case MSG_SAVEDATAPOINTER: 1045 acb->data_addr = sc->sc_dp; 1046 acb->data_length = sc->sc_dleft; 1047 break; 1048 1049 case MSG_RESTOREPOINTERS: 1050 sc->sc_dp = acb->data_addr; 1051 sc->sc_dleft = acb->data_length; 1052 sc->sc_cp = (u_char *)&acb->scsi_cmd; 1053 sc->sc_cleft = acb->scsi_cmd_length; 1054 break; 1055 1056 case MSG_EXTENDED: 1057 switch (sc->sc_imess[2]) { 1058 #if SPC_USE_SYNCHRONOUS 1059 case MSG_EXT_SDTR: 1060 if (sc->sc_imess[1] != 3) 1061 goto reject; 1062 ti->period = sc->sc_imess[3]; 1063 ti->offset = sc->sc_imess[4]; 1064 ti->flags &= ~DO_SYNC; 1065 if (ti->offset == 0) { 1066 } else if (ti->period < sc->sc_minsync || 1067 ti->period > sc->sc_maxsync || 1068 ti->offset > 8) { 1069 ti->period = ti->offset = 0; 1070 spc_sched_msgout(sc, SEND_SDTR); 1071 } else { 1072 sc_print_addr(acb->xs->sc_link); 1073 printf("sync, offset %d, " 1074 "period %dnsec\n", 1075 ti->offset, ti->period * 4); 1076 } 1077 spc_setsync(sc, ti); 1078 break; 1079 #endif 1080 1081 #if SPC_USE_WIDE 1082 case MSG_EXT_WDTR: 1083 if (sc->sc_imess[1] != 2) 1084 goto reject; 1085 ti->width = sc->sc_imess[3]; 1086 ti->flags &= ~DO_WIDE; 1087 if (ti->width == 0) { 1088 } else if (ti->width > SPC_MAX_WIDTH) { 1089 ti->width = 0; 1090 spc_sched_msgout(sc, SEND_WDTR); 1091 } else { 1092 sc_print_addr(acb->xs->sc_link); 1093 printf("wide, width %d\n", 1094 1 << (3 + ti->width)); 1095 } 1096 break; 1097 #endif 1098 1099 default: 1100 printf("%s: unrecognized MESSAGE EXTENDED; " 1101 "sending REJECT\n", sc->sc_dev.dv_xname); 1102 SPC_BREAK(); 1103 goto reject; 1104 } 1105 break; 1106 1107 default: 1108 printf("%s: unrecognized MESSAGE; sending REJECT\n", 1109 sc->sc_dev.dv_xname); 1110 SPC_BREAK(); 1111 reject: 1112 spc_sched_msgout(sc, SEND_REJECT); 1113 break; 1114 } 1115 break; 1116 1117 case SPC_RESELECTED: 1118 if (!MSG_ISIDENTIFY(sc->sc_imess[0])) { 1119 printf("%s: reselect without IDENTIFY; " 1120 "sending DEVICE RESET\n", sc->sc_dev.dv_xname); 1121 SPC_BREAK(); 1122 goto reset; 1123 } 1124 1125 (void) spc_reselect(sc, sc->sc_imess[0]); 1126 break; 1127 1128 default: 1129 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n", 1130 sc->sc_dev.dv_xname); 1131 SPC_BREAK(); 1132 reset: 1133 spc_sched_msgout(sc, SEND_DEV_RESET); 1134 break; 1135 1136 #ifdef notdef 1137 abort: 1138 spc_sched_msgout(sc, SEND_ABORT); 1139 break; 1140 #endif 1141 } 1142 1143 /* Ack the last message byte. */ 1144 #if 0 /* XXX? */ 1145 (void) bus_space_read_1(iot, ioh, DREG); 1146 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0) 1147 ; 1148 #endif 1149 1150 /* Go get the next message, if any. */ 1151 goto nextmsg; 1152 1153 out: 1154 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK); 1155 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0])); 1156 } 1157 1158 /* 1159 * Send the highest priority, scheduled message. 1160 */ 1161 void 1162 spc_msgout(sc) 1163 struct spc_softc *sc; 1164 { 1165 bus_space_tag_t iot = sc->sc_iot; 1166 bus_space_handle_t ioh = sc->sc_ioh; 1167 #if SPC_USE_SYNCHRONOUS 1168 struct spc_tinfo *ti; 1169 #endif 1170 int n; 1171 1172 SPC_TRACE(("spc_msgout ")); 1173 1174 if (sc->sc_prevphase == PH_MSGOUT) { 1175 if (sc->sc_omp == sc->sc_omess) { 1176 /* 1177 * This is a retransmission. 1178 * 1179 * We get here if the target stayed in MESSAGE OUT 1180 * phase. Section 5.1.9.2 of the SCSI 2 spec indicates 1181 * that all of the previously transmitted messages must 1182 * be sent again, in the same order. Therefore, we 1183 * requeue all the previously transmitted messages, and 1184 * start again from the top. Our simple priority 1185 * scheme keeps the messages in the right order. 1186 */ 1187 SPC_MISC(("retransmitting ")); 1188 sc->sc_msgpriq |= sc->sc_msgoutq; 1189 /* 1190 * Set ATN. If we're just sending a trivial 1-byte 1191 * message, we'll clear ATN later on anyway. 1192 */ 1193 bus_space_write_1(iot, ioh, SCMD, 1194 SCMD_SET_ATN); /* XXX? */ 1195 } else { 1196 /* This is a continuation of the previous message. */ 1197 n = sc->sc_omp - sc->sc_omess; 1198 goto nextbyte; 1199 } 1200 } 1201 1202 /* No messages transmitted so far. */ 1203 sc->sc_msgoutq = 0; 1204 sc->sc_lastmsg = 0; 1205 1206 nextmsg: 1207 /* Pick up highest priority message. */ 1208 sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq; 1209 sc->sc_msgpriq &= ~sc->sc_currmsg; 1210 sc->sc_msgoutq |= sc->sc_currmsg; 1211 1212 /* Build the outgoing message data. */ 1213 switch (sc->sc_currmsg) { 1214 case SEND_IDENTIFY: 1215 SPC_ASSERT(sc->sc_nexus != NULL); 1216 sc->sc_omess[0] = 1217 MSG_IDENTIFY(sc->sc_nexus->xs->sc_link->lun, 1); 1218 n = 1; 1219 break; 1220 1221 #if SPC_USE_SYNCHRONOUS 1222 case SEND_SDTR: 1223 SPC_ASSERT(sc->sc_nexus != NULL); 1224 ti = &sc->sc_tinfo[sc->sc_nexus->xs->sc_link->target]; 1225 sc->sc_omess[4] = MSG_EXTENDED; 1226 sc->sc_omess[3] = MSG_EXT_SDTR_LEN; 1227 sc->sc_omess[2] = MSG_EXT_SDTR; 1228 sc->sc_omess[1] = ti->period >> 2; 1229 sc->sc_omess[0] = ti->offset; 1230 n = 5; 1231 break; 1232 #endif 1233 1234 #if SPC_USE_WIDE 1235 case SEND_WDTR: 1236 SPC_ASSERT(sc->sc_nexus != NULL); 1237 ti = &sc->sc_tinfo[sc->sc_nexus->xs->sc_link->target]; 1238 sc->sc_omess[3] = MSG_EXTENDED; 1239 sc->sc_omess[2] = MSG_EXT_WDTR_LEN; 1240 sc->sc_omess[1] = MSG_EXT_WDTR; 1241 sc->sc_omess[0] = ti->width; 1242 n = 4; 1243 break; 1244 #endif 1245 1246 case SEND_DEV_RESET: 1247 sc->sc_flags |= SPC_ABORTING; 1248 sc->sc_omess[0] = MSG_BUS_DEV_RESET; 1249 n = 1; 1250 break; 1251 1252 case SEND_REJECT: 1253 sc->sc_omess[0] = MSG_MESSAGE_REJECT; 1254 n = 1; 1255 break; 1256 1257 case SEND_PARITY_ERROR: 1258 sc->sc_omess[0] = MSG_PARITY_ERROR; 1259 n = 1; 1260 break; 1261 1262 case SEND_INIT_DET_ERR: 1263 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; 1264 n = 1; 1265 break; 1266 1267 case SEND_ABORT: 1268 sc->sc_flags |= SPC_ABORTING; 1269 sc->sc_omess[0] = MSG_ABORT; 1270 n = 1; 1271 break; 1272 1273 default: 1274 printf("%s: unexpected MESSAGE OUT; sending NOOP\n", 1275 sc->sc_dev.dv_xname); 1276 SPC_BREAK(); 1277 sc->sc_omess[0] = MSG_NOOP; 1278 n = 1; 1279 break; 1280 } 1281 sc->sc_omp = &sc->sc_omess[n]; 1282 1283 nextbyte: 1284 /* Send message bytes. */ 1285 /* send TRANSFER command. */ 1286 bus_space_write_1(iot, ioh, TCH, n >> 16); 1287 bus_space_write_1(iot, ioh, TCM, n >> 8); 1288 bus_space_write_1(iot, ioh, TCL, n); 1289 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB); 1290 #ifdef x68k 1291 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */ 1292 #else 1293 bus_space_write_1(iot, ioh, SCMD, 1294 SCMD_XFR | SCMD_PROG_XFR | SCMD_ICPT_XFR); 1295 #endif 1296 for (;;) { 1297 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0) 1298 break; 1299 if (bus_space_read_1(iot, ioh, INTS) != 0) 1300 goto out; 1301 } 1302 for (;;) { 1303 #if 0 1304 for (;;) { 1305 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0) 1306 break; 1307 /* Wait for REQINIT. XXX Need timeout. */ 1308 } 1309 #endif 1310 if (bus_space_read_1(iot, ioh, INTS) != 0) { 1311 /* 1312 * Target left MESSAGE OUT, possibly to reject 1313 * our message. 1314 * 1315 * If this is the last message being sent, then we 1316 * deassert ATN, since either the target is going to 1317 * ignore this message, or it's going to ask for a 1318 * retransmission via MESSAGE PARITY ERROR (in which 1319 * case we reassert ATN anyway). 1320 */ 1321 #if 0 1322 if (sc->sc_msgpriq == 0) 1323 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN); 1324 #endif 1325 goto out; 1326 } 1327 1328 #if 0 1329 /* Clear ATN before last byte if this is the last message. */ 1330 if (n == 1 && sc->sc_msgpriq == 0) 1331 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN); 1332 #endif 1333 1334 while ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_FULL) != 0) 1335 ; 1336 /* Send message byte. */ 1337 bus_space_write_1(iot, ioh, DREG, *--sc->sc_omp); 1338 --n; 1339 /* Keep track of the last message we've sent any bytes of. */ 1340 sc->sc_lastmsg = sc->sc_currmsg; 1341 #if 0 1342 /* Wait for ACK to be negated. XXX Need timeout. */ 1343 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0) 1344 ; 1345 #endif 1346 1347 if (n == 0) 1348 break; 1349 } 1350 1351 /* We get here only if the entire message has been transmitted. */ 1352 if (sc->sc_msgpriq != 0) { 1353 /* There are more outgoing messages. */ 1354 goto nextmsg; 1355 } 1356 1357 /* 1358 * The last message has been transmitted. We need to remember the last 1359 * message transmitted (in case the target switches to MESSAGE IN phase 1360 * and sends a MESSAGE REJECT), and the list of messages transmitted 1361 * this time around (in case the target stays in MESSAGE OUT phase to 1362 * request a retransmit). 1363 */ 1364 1365 out: 1366 /* Disable REQ/ACK protocol. */ 1367 return; 1368 } 1369 1370 /* 1371 * spc_dataout_pio: perform a data transfer using the FIFO datapath in the spc 1372 * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted 1373 * and ACK deasserted (i.e. waiting for a data byte). 1374 * 1375 * This new revision has been optimized (I tried) to make the common case fast, 1376 * and the rarer cases (as a result) somewhat more complex. 1377 */ 1378 int 1379 spc_dataout_pio(sc, p, n) 1380 struct spc_softc *sc; 1381 u_char *p; 1382 int n; 1383 { 1384 bus_space_tag_t iot = sc->sc_iot; 1385 bus_space_handle_t ioh = sc->sc_ioh; 1386 u_char intstat = 0; 1387 int out = 0; 1388 #define DOUTAMOUNT 8 /* Full FIFO */ 1389 1390 SPC_TRACE(("spc_dataout_pio ")); 1391 /* send TRANSFER command. */ 1392 bus_space_write_1(iot, ioh, TCH, n >> 16); 1393 bus_space_write_1(iot, ioh, TCM, n >> 8); 1394 bus_space_write_1(iot, ioh, TCL, n); 1395 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB); 1396 #ifdef x68k 1397 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */ 1398 #else 1399 bus_space_write_1(iot, ioh, SCMD, 1400 SCMD_XFR | SCMD_PROG_XFR | SCMD_ICPT_XFR); /* XXX */ 1401 #endif 1402 for (;;) { 1403 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0) 1404 break; 1405 if (bus_space_read_1(iot, ioh, INTS) != 0) 1406 break; 1407 } 1408 1409 /* 1410 * I have tried to make the main loop as tight as possible. This 1411 * means that some of the code following the loop is a bit more 1412 * complex than otherwise. 1413 */ 1414 while (n > 0) { 1415 int xfer; 1416 1417 for (;;) { 1418 intstat = bus_space_read_1(iot, ioh, INTS); 1419 /* Wait till buffer is empty. */ 1420 if ((bus_space_read_1(iot, ioh, SSTS) & 1421 SSTS_DREG_EMPTY) != 0) 1422 break; 1423 /* Break on interrupt. */ 1424 if (intstat != 0) 1425 goto phasechange; 1426 } 1427 1428 xfer = min(DOUTAMOUNT, n); 1429 1430 SPC_MISC(("%d> ", xfer)); 1431 1432 n -= xfer; 1433 out += xfer; 1434 bus_space_write_multi_1(iot, ioh, DREG, p, xfer); 1435 p += xfer; 1436 } 1437 1438 if (out == 0) { 1439 for (;;) { 1440 if (bus_space_read_1(iot, ioh, INTS) != 0) 1441 break; 1442 } 1443 SPC_MISC(("extra data ")); 1444 } else { 1445 /* See the bytes off chip */ 1446 for (;;) { 1447 /* Wait till buffer is empty. */ 1448 if ((bus_space_read_1(iot, ioh, SSTS) & 1449 SSTS_DREG_EMPTY) != 0) 1450 break; 1451 intstat = bus_space_read_1(iot, ioh, INTS); 1452 /* Break on interrupt. */ 1453 if (intstat != 0) 1454 goto phasechange; 1455 } 1456 } 1457 1458 phasechange: 1459 /* Stop the FIFO data path. */ 1460 1461 if (intstat != 0) { 1462 /* Some sort of phase change. */ 1463 int amount; 1464 1465 amount = ((bus_space_read_1(iot, ioh, TCH) << 16) | 1466 (bus_space_read_1(iot, ioh, TCM) << 8) | 1467 bus_space_read_1(iot, ioh, TCL)); 1468 if (amount > 0) { 1469 out -= amount; 1470 SPC_MISC(("+%d ", amount)); 1471 } 1472 } 1473 1474 return out; 1475 } 1476 1477 /* 1478 * spc_datain_pio: perform data transfers using the FIFO datapath in the spc 1479 * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted 1480 * and ACK deasserted (i.e. at least one byte is ready). 1481 * 1482 * For now, uses a pretty dumb algorithm, hangs around until all data has been 1483 * transferred. This, is OK for fast targets, but not so smart for slow 1484 * targets which don't disconnect or for huge transfers. 1485 */ 1486 int 1487 spc_datain_pio(sc, p, n) 1488 struct spc_softc *sc; 1489 u_char *p; 1490 int n; 1491 { 1492 bus_space_tag_t iot = sc->sc_iot; 1493 bus_space_handle_t ioh = sc->sc_ioh; 1494 u_int8_t intstat, sstat; 1495 int in = 0; 1496 #define DINAMOUNT 8 /* Full FIFO */ 1497 1498 SPC_TRACE(("spc_datain_pio ")); 1499 /* send TRANSFER command. */ 1500 bus_space_write_1(iot, ioh, TCH, n >> 16); 1501 bus_space_write_1(iot, ioh, TCM, n >> 8); 1502 bus_space_write_1(iot, ioh, TCL, n); 1503 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB); 1504 #ifdef x68k 1505 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */ 1506 #else 1507 bus_space_write_1(iot, ioh, SCMD, 1508 SCMD_XFR | SCMD_PROG_XFR); /* XXX */ 1509 #endif 1510 for (;;) { 1511 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0) 1512 break; 1513 if (bus_space_read_1(iot, ioh, INTS) != 0) 1514 goto phasechange; 1515 } 1516 1517 /* 1518 * We leave this loop if one or more of the following is true: 1519 * a) phase != PH_DATAIN && FIFOs are empty 1520 * b) reset has occurred or busfree is detected. 1521 */ 1522 while (n > 0) { 1523 int xfer; 1524 1525 /* Wait for fifo half full or phase mismatch */ 1526 for (;;) { 1527 intstat = bus_space_read_1(iot, ioh, INTS); 1528 sstat = bus_space_read_1(iot, ioh, SSTS); 1529 if (intstat != 0 || 1530 (sstat & SSTS_DREG_FULL) != 0 || 1531 (sstat & SSTS_DREG_EMPTY) == 0) 1532 break; 1533 } 1534 1535 #if 1 1536 if (intstat != 0) 1537 goto phasechange; 1538 #else 1539 if (intstat != 0 && 1540 (sstat & SSTS_DREG_EMPTY) != 0) 1541 goto phasechange; 1542 #endif 1543 if ((sstat & SSTS_DREG_FULL) != 0) 1544 xfer = min(DINAMOUNT, n); 1545 else 1546 xfer = 1; 1547 1548 SPC_MISC((">%d ", xfer)); 1549 1550 n -= xfer; 1551 in += xfer; 1552 bus_space_read_multi_1(iot, ioh, DREG, p, xfer); 1553 p += xfer; 1554 1555 if (intstat != 0) 1556 goto phasechange; 1557 } 1558 1559 /* 1560 * Some SCSI-devices are rude enough to transfer more data than what 1561 * was requested, e.g. 2048 bytes from a CD-ROM instead of the 1562 * requested 512. Test for progress, i.e. real transfers. If no real 1563 * transfers have been performed (n is probably already zero) and the 1564 * FIFO is not empty, waste some bytes.... 1565 */ 1566 if (in == 0) { 1567 for (;;) { 1568 /* XXX needs timeout */ 1569 if (bus_space_read_1(iot, ioh, INTS) != 0) 1570 break; 1571 } 1572 SPC_MISC(("extra data ")); 1573 } 1574 1575 phasechange: 1576 /* Stop the FIFO data path. */ 1577 1578 return in; 1579 } 1580 1581 /* 1582 * Catch an interrupt from the adaptor 1583 */ 1584 /* 1585 * This is the workhorse routine of the driver. 1586 * Deficiencies (for now): 1587 * 1) always uses programmed I/O 1588 */ 1589 int 1590 spc_intr(arg) 1591 void *arg; 1592 { 1593 struct spc_softc *sc = arg; 1594 bus_space_tag_t iot = sc->sc_iot; 1595 bus_space_handle_t ioh = sc->sc_ioh; 1596 u_char ints; 1597 struct spc_acb *acb; 1598 struct scsi_link *sc_link; 1599 struct spc_tinfo *ti; 1600 int n; 1601 1602 /* 1603 * Disable interrupt. 1604 */ 1605 bus_space_write_1(iot, ioh, SCTL, 1606 bus_space_read_1(iot, ioh, SCTL) & ~SCTL_INTR_ENAB); 1607 1608 SPC_TRACE(("spc_intr ")); 1609 1610 loop: 1611 /* 1612 * Loop until transfer completion. 1613 */ 1614 /* 1615 * First check for abnormal conditions, such as reset. 1616 */ 1617 #ifdef x68k /* XXX? */ 1618 while ((ints = bus_space_read_1(iot, ioh, INTS)) == 0) 1619 delay(1); 1620 SPC_MISC(("ints = 0x%x ", ints)); 1621 #else 1622 ints = bus_space_read_1(iot, ioh, INTS); 1623 SPC_MISC(("ints = 0x%x ", ints)); 1624 #endif 1625 1626 if ((ints & INTS_RST) != 0) { 1627 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname); 1628 goto reset; 1629 } 1630 1631 /* 1632 * Check for less serious errors. 1633 */ 1634 if ((bus_space_read_1(iot, ioh, SERR) & (SERR_SCSI_PAR|SERR_SPC_PAR)) 1635 != 0) { 1636 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname); 1637 if (sc->sc_prevphase == PH_MSGIN) { 1638 sc->sc_flags |= SPC_DROP_MSGIN; 1639 spc_sched_msgout(sc, SEND_PARITY_ERROR); 1640 } else 1641 spc_sched_msgout(sc, SEND_INIT_DET_ERR); 1642 } 1643 1644 /* 1645 * If we're not already busy doing something test for the following 1646 * conditions: 1647 * 1) We have been reselected by something 1648 * 2) We have selected something successfully 1649 * 3) Our selection process has timed out 1650 * 4) This is really a bus free interrupt just to get a new command 1651 * going? 1652 * 5) Spurious interrupt? 1653 */ 1654 switch (sc->sc_state) { 1655 case SPC_IDLE: 1656 case SPC_SELECTING: 1657 SPC_MISC(("ints:0x%02x ", ints)); 1658 1659 if ((ints & INTS_SEL) != 0) { 1660 /* 1661 * We don't currently support target mode. 1662 */ 1663 printf("%s: target mode selected; going to BUS FREE\n", 1664 sc->sc_dev.dv_xname); 1665 1666 goto sched; 1667 } else if ((ints & INTS_RESEL) != 0) { 1668 SPC_MISC(("reselected ")); 1669 1670 /* 1671 * If we're trying to select a target ourselves, 1672 * push our command back into the ready list. 1673 */ 1674 if (sc->sc_state == SPC_SELECTING) { 1675 SPC_MISC(("backoff selector ")); 1676 SPC_ASSERT(sc->sc_nexus != NULL); 1677 acb = sc->sc_nexus; 1678 sc->sc_nexus = NULL; 1679 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 1680 } 1681 1682 /* Save reselection ID. */ 1683 sc->sc_selid = bus_space_read_1(iot, ioh, TEMP); 1684 1685 sc->sc_state = SPC_RESELECTED; 1686 } else if ((ints & INTS_CMD_DONE) != 0) { 1687 SPC_MISC(("selected ")); 1688 1689 /* 1690 * We have selected a target. Things to do: 1691 * a) Determine what message(s) to send. 1692 * b) Verify that we're still selecting the target. 1693 * c) Mark device as busy. 1694 */ 1695 if (sc->sc_state != SPC_SELECTING) { 1696 printf("%s: selection out while idle; " 1697 "resetting\n", sc->sc_dev.dv_xname); 1698 SPC_BREAK(); 1699 goto reset; 1700 } 1701 SPC_ASSERT(sc->sc_nexus != NULL); 1702 acb = sc->sc_nexus; 1703 sc_link = acb->xs->sc_link; 1704 ti = &sc->sc_tinfo[sc_link->target]; 1705 1706 sc->sc_msgpriq = SEND_IDENTIFY; 1707 if (acb->flags & ACB_RESET) 1708 sc->sc_msgpriq |= SEND_DEV_RESET; 1709 else if (acb->flags & ACB_ABORT) 1710 sc->sc_msgpriq |= SEND_ABORT; 1711 else { 1712 #if SPC_USE_SYNCHRONOUS 1713 if ((ti->flags & DO_SYNC) != 0) 1714 sc->sc_msgpriq |= SEND_SDTR; 1715 #endif 1716 #if SPC_USE_WIDE 1717 if ((ti->flags & DO_WIDE) != 0) 1718 sc->sc_msgpriq |= SEND_WDTR; 1719 #endif 1720 } 1721 1722 acb->flags |= ACB_NEXUS; 1723 ti->lubusy |= (1 << sc_link->lun); 1724 1725 /* Do an implicit RESTORE POINTERS. */ 1726 sc->sc_dp = acb->data_addr; 1727 sc->sc_dleft = acb->data_length; 1728 sc->sc_cp = (u_char *)&acb->scsi_cmd; 1729 sc->sc_cleft = acb->scsi_cmd_length; 1730 1731 /* On our first connection, schedule a timeout. */ 1732 if ((acb->xs->flags & SCSI_POLL) == 0) 1733 timeout_add_msec(&acb->xs->stimeout, 1734 acb->timeout); 1735 sc->sc_state = SPC_CONNECTED; 1736 } else if ((ints & INTS_TIMEOUT) != 0) { 1737 SPC_MISC(("selection timeout ")); 1738 1739 if (sc->sc_state != SPC_SELECTING) { 1740 printf("%s: selection timeout while idle; " 1741 "resetting\n", sc->sc_dev.dv_xname); 1742 SPC_BREAK(); 1743 goto reset; 1744 } 1745 SPC_ASSERT(sc->sc_nexus != NULL); 1746 acb = sc->sc_nexus; 1747 1748 delay(250); 1749 1750 acb->xs->error = XS_SELTIMEOUT; 1751 goto finish; 1752 } else { 1753 if (sc->sc_state != SPC_IDLE) { 1754 printf("%s: BUS FREE while not idle; " 1755 "state=%d\n", 1756 sc->sc_dev.dv_xname, sc->sc_state); 1757 SPC_BREAK(); 1758 goto out; 1759 } 1760 1761 goto sched; 1762 } 1763 1764 /* 1765 * Turn off selection stuff, and prepare to catch bus free 1766 * interrupts, parity errors, and phase changes. 1767 */ 1768 1769 sc->sc_flags = 0; 1770 sc->sc_prevphase = PH_INVALID; 1771 goto dophase; 1772 } 1773 1774 if ((ints & INTS_DISCON) != 0) { 1775 /* disable disconnect interrupt */ 1776 bus_space_write_1(iot, ioh, PCTL, 1777 bus_space_read_1(iot, ioh, PCTL) & ~PCTL_BFINT_ENAB); 1778 /* XXX reset interrput */ 1779 bus_space_write_1(iot, ioh, INTS, ints); 1780 1781 switch (sc->sc_state) { 1782 case SPC_RESELECTED: 1783 goto sched; 1784 1785 case SPC_CONNECTED: 1786 SPC_ASSERT(sc->sc_nexus != NULL); 1787 acb = sc->sc_nexus; 1788 1789 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE 1790 if (sc->sc_prevphase == PH_MSGOUT) { 1791 /* 1792 * If the target went to BUS FREE phase during 1793 * or immediately after sending a SDTR or WDTR 1794 * message, disable negotiation. 1795 */ 1796 sc_link = acb->xs->sc_link; 1797 ti = &sc->sc_tinfo[sc_link->target]; 1798 switch (sc->sc_lastmsg) { 1799 #if SPC_USE_SYNCHRONOUS 1800 case SEND_SDTR: 1801 ti->flags &= ~DO_SYNC; 1802 ti->period = ti->offset = 0; 1803 break; 1804 #endif 1805 #if SPC_USE_WIDE 1806 case SEND_WDTR: 1807 ti->flags &= ~DO_WIDE; 1808 ti->width = 0; 1809 break; 1810 #endif 1811 } 1812 } 1813 #endif 1814 1815 if ((sc->sc_flags & SPC_ABORTING) == 0) { 1816 /* 1817 * Section 5.1.1 of the SCSI 2 spec suggests 1818 * issuing a REQUEST SENSE following an 1819 * unexpected disconnect. Some devices go into 1820 * a contingent allegiance condition when 1821 * disconnecting, and this is necessary to 1822 * clean up their state. 1823 */ 1824 printf("%s: unexpected disconnect; " 1825 "sending REQUEST SENSE\n", 1826 sc->sc_dev.dv_xname); 1827 SPC_BREAK(); 1828 spc_sense(sc, acb); 1829 goto out; 1830 } 1831 1832 acb->xs->error = XS_DRIVER_STUFFUP; 1833 goto finish; 1834 1835 case SPC_DISCONNECT: 1836 SPC_ASSERT(sc->sc_nexus != NULL); 1837 acb = sc->sc_nexus; 1838 TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain); 1839 sc->sc_nexus = NULL; 1840 goto sched; 1841 1842 case SPC_CMDCOMPLETE: 1843 SPC_ASSERT(sc->sc_nexus != NULL); 1844 acb = sc->sc_nexus; 1845 goto finish; 1846 } 1847 } 1848 else if ((ints & INTS_CMD_DONE) != 0 && 1849 sc->sc_prevphase == PH_MSGIN && sc->sc_state != SPC_CONNECTED) 1850 goto out; 1851 1852 dophase: 1853 #if 0 1854 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) { 1855 /* Wait for REQINIT. */ 1856 goto out; 1857 } 1858 #else 1859 bus_space_write_1(iot, ioh, INTS, ints); 1860 ints = 0; 1861 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) 1862 delay(1); /* need timeout XXX */ 1863 #endif 1864 1865 /* 1866 * State transition. 1867 */ 1868 sc->sc_phase = bus_space_read_1(iot, ioh, PSNS) & PH_MASK; 1869 #if 0 1870 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase); 1871 #endif 1872 1873 SPC_MISC(("phase=%d\n", sc->sc_phase)); 1874 switch (sc->sc_phase) { 1875 case PH_MSGOUT: 1876 if (sc->sc_state != SPC_CONNECTED && 1877 sc->sc_state != SPC_RESELECTED) 1878 break; 1879 spc_msgout(sc); 1880 sc->sc_prevphase = PH_MSGOUT; 1881 goto loop; 1882 1883 case PH_MSGIN: 1884 if (sc->sc_state != SPC_CONNECTED && 1885 sc->sc_state != SPC_RESELECTED) 1886 break; 1887 spc_msgin(sc); 1888 sc->sc_prevphase = PH_MSGIN; 1889 goto loop; 1890 1891 case PH_CMD: 1892 if (sc->sc_state != SPC_CONNECTED) 1893 break; 1894 #ifdef SPC_DEBUG 1895 if ((spc_debug & SPC_SHOWMISC) != 0) { 1896 SPC_ASSERT(sc->sc_nexus != NULL); 1897 acb = sc->sc_nexus; 1898 printf("cmd=0x%02x+%d ", 1899 acb->scsi_cmd.opcode, acb->scsi_cmd_length - 1); 1900 } 1901 #endif 1902 n = spc_dataout_pio(sc, sc->sc_cp, sc->sc_cleft); 1903 sc->sc_cp += n; 1904 sc->sc_cleft -= n; 1905 sc->sc_prevphase = PH_CMD; 1906 goto loop; 1907 1908 case PH_DATAOUT: 1909 if (sc->sc_state != SPC_CONNECTED) 1910 break; 1911 SPC_MISC(("dataout dleft=%d ", sc->sc_dleft)); 1912 n = spc_dataout_pio(sc, sc->sc_dp, sc->sc_dleft); 1913 sc->sc_dp += n; 1914 sc->sc_dleft -= n; 1915 sc->sc_prevphase = PH_DATAOUT; 1916 goto loop; 1917 1918 case PH_DATAIN: 1919 if (sc->sc_state != SPC_CONNECTED) 1920 break; 1921 SPC_MISC(("datain ")); 1922 n = spc_datain_pio(sc, sc->sc_dp, sc->sc_dleft); 1923 sc->sc_dp += n; 1924 sc->sc_dleft -= n; 1925 sc->sc_prevphase = PH_DATAIN; 1926 goto loop; 1927 1928 case PH_STAT: 1929 if (sc->sc_state != SPC_CONNECTED) 1930 break; 1931 SPC_ASSERT(sc->sc_nexus != NULL); 1932 acb = sc->sc_nexus; 1933 /*acb->target_stat = bus_space_read_1(iot, ioh, DREG);*/ 1934 spc_datain_pio(sc, &acb->target_stat, 1); 1935 SPC_MISC(("target_stat=0x%02x ", acb->target_stat)); 1936 sc->sc_prevphase = PH_STAT; 1937 goto loop; 1938 } 1939 1940 printf("%s: unexpected bus phase; resetting\n", sc->sc_dev.dv_xname); 1941 SPC_BREAK(); 1942 reset: 1943 spc_init(sc); 1944 return 1; 1945 1946 finish: 1947 timeout_del(&acb->xs->stimeout); 1948 bus_space_write_1(iot, ioh, INTS, ints); 1949 ints = 0; 1950 spc_done(sc, acb); 1951 goto out; 1952 1953 sched: 1954 sc->sc_state = SPC_IDLE; 1955 spc_sched(sc); 1956 goto out; 1957 1958 out: 1959 if (ints) 1960 bus_space_write_1(iot, ioh, INTS, ints); 1961 bus_space_write_1(iot, ioh, SCTL, 1962 bus_space_read_1(iot, ioh, SCTL) | SCTL_INTR_ENAB); 1963 return 1; 1964 } 1965 1966 void 1967 spc_abort(sc, acb) 1968 struct spc_softc *sc; 1969 struct spc_acb *acb; 1970 { 1971 1972 /* 2 secs for the abort */ 1973 acb->timeout = SPC_ABORT_TIMEOUT; 1974 acb->flags |= ACB_ABORT; 1975 1976 if (acb == sc->sc_nexus) { 1977 /* 1978 * If we're still selecting, the message will be scheduled 1979 * after selection is complete. 1980 */ 1981 if (sc->sc_state == SPC_CONNECTED) 1982 spc_sched_msgout(sc, SEND_ABORT); 1983 } else { 1984 spc_dequeue(sc, acb); 1985 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 1986 if (sc->sc_state == SPC_IDLE) 1987 spc_sched(sc); 1988 } 1989 } 1990 1991 void 1992 spc_timeout(arg) 1993 void *arg; 1994 { 1995 struct spc_acb *acb = arg; 1996 struct scsi_xfer *xs = acb->xs; 1997 struct scsi_link *sc_link = xs->sc_link; 1998 struct spc_softc *sc = sc_link->adapter_softc; 1999 int s; 2000 2001 sc_print_addr(sc_link); 2002 printf("timed out"); 2003 2004 s = splbio(); 2005 2006 if (acb->flags & ACB_ABORT) { 2007 /* abort timed out */ 2008 printf(" AGAIN\n"); 2009 /* XXX Must reset! */ 2010 } else { 2011 /* abort the operation that has timed out */ 2012 printf("\n"); 2013 acb->xs->error = XS_TIMEOUT; 2014 spc_abort(sc, acb); 2015 } 2016 2017 splx(s); 2018 } 2019 2020 #ifdef SPC_DEBUG 2021 /* 2022 * The following functions are mostly used for debugging purposes, either 2023 * directly called from the driver or from the kernel debugger. 2024 */ 2025 2026 void 2027 spc_show_scsi_cmd(acb) 2028 struct spc_acb *acb; 2029 { 2030 u_char *b = (u_char *)&acb->scsi_cmd; 2031 struct scsi_link *sc_link = acb->xs->sc_link; 2032 int i; 2033 2034 sc_print_addr(sc_link); 2035 if ((acb->xs->flags & SCSI_RESET) == 0) { 2036 for (i = 0; i < acb->scsi_cmd_length; i++) { 2037 if (i) 2038 printf(","); 2039 printf("%x", b[i]); 2040 } 2041 printf("\n"); 2042 } else 2043 printf("RESET\n"); 2044 } 2045 2046 void 2047 spc_print_acb(acb) 2048 struct spc_acb *acb; 2049 { 2050 2051 printf("acb@%p xs=%p flags=%x", acb, acb->xs, acb->flags); 2052 printf(" dp=%p dleft=%d target_stat=%x\n", 2053 acb->data_addr, acb->data_length, acb->target_stat); 2054 spc_show_scsi_cmd(acb); 2055 } 2056 2057 void 2058 spc_print_active_acb() 2059 { 2060 struct spc_acb *acb; 2061 struct spc_softc *sc = spc_cd.cd_devs[0]; /* XXX */ 2062 2063 printf("ready list:\n"); 2064 TAILQ_FOREACH(acb, &sc->ready_list, chain) 2065 spc_print_acb(acb); 2066 printf("nexus:\n"); 2067 if (sc->sc_nexus != NULL) 2068 spc_print_acb(sc->sc_nexus); 2069 printf("nexus list:\n"); 2070 TAILQ_FOREACH(acb, &sc->nexus_list, chain) 2071 spc_print_acb(acb); 2072 } 2073 2074 void 2075 spc_dump89352(sc) 2076 struct spc_softc *sc; 2077 { 2078 bus_space_tag_t iot = sc->sc_iot; 2079 bus_space_handle_t ioh = sc->sc_ioh; 2080 2081 printf("mb89352: BDID=%x SCTL=%x SCMD=%x TMOD=%x\n", 2082 bus_space_read_1(iot, ioh, BDID), 2083 bus_space_read_1(iot, ioh, SCTL), 2084 bus_space_read_1(iot, ioh, SCMD), 2085 bus_space_read_1(iot, ioh, TMOD)); 2086 printf(" INTS=%x PSNS=%x SSTS=%x SERR=%x PCTL=%x\n", 2087 bus_space_read_1(iot, ioh, INTS), 2088 bus_space_read_1(iot, ioh, PSNS), 2089 bus_space_read_1(iot, ioh, SSTS), 2090 bus_space_read_1(iot, ioh, SERR), 2091 bus_space_read_1(iot, ioh, PCTL)); 2092 printf(" MBC=%x DREG=%x TEMP=%x TCH=%x TCM=%x\n", 2093 bus_space_read_1(iot, ioh, MBC), 2094 #if 0 2095 bus_space_read_1(iot, ioh, DREG), 2096 #else 2097 0, 2098 #endif 2099 bus_space_read_1(iot, ioh, TEMP), 2100 bus_space_read_1(iot, ioh, TCH), 2101 bus_space_read_1(iot, ioh, TCM)); 2102 printf(" TCL=%x EXBF=%x\n", 2103 bus_space_read_1(iot, ioh, TCL), 2104 bus_space_read_1(iot, ioh, EXBF)); 2105 } 2106 2107 void 2108 spc_dump_driver(sc) 2109 struct spc_softc *sc; 2110 { 2111 struct spc_tinfo *ti; 2112 int i; 2113 2114 printf("nexus=%p prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase); 2115 printf("state=%x msgin=%x msgpriq=%x msgoutq=%x lastmsg=%x " 2116 "currmsg=%x\n", sc->sc_state, sc->sc_imess[0], 2117 sc->sc_msgpriq, sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg); 2118 for (i = 0; i < 7; i++) { 2119 ti = &sc->sc_tinfo[i]; 2120 printf("tinfo%d: %d cmds %d disconnects %d timeouts", 2121 i, ti->cmds, ti->dconns, ti->touts); 2122 printf(" %d senses flags=%x\n", ti->senses, ti->flags); 2123 } 2124 } 2125 #endif 2126