1/* $OpenBSD: locore.S,v 1.2 2013/10/29 21:49:07 miod Exp $ */ 2 3/* 4 * Copyright (c) 2013 Miodrag Vallat. 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18/* 19 * Mach Operating System 20 * Copyright (c) 1993-1991 Carnegie Mellon University 21 * Copyright (c) 1991 OMRON Corporation 22 * All Rights Reserved. 23 * 24 * Permission to use, copy, modify and distribute this software and its 25 * documentation is hereby granted, provided that both the copyright 26 * notice and this permission notice appear in all copies of the 27 * software, derivative works or modified versions, and any portions 28 * thereof, and that both notices appear in supporting documentation. 29 * 30 * CARNEGIE MELLON AND OMRON ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS IS" 31 * CONDITION. CARNEGIE MELLON AND OMRON DISCLAIM ANY LIABILITY OF ANY KIND 32 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 33 * 34 * Carnegie Mellon requests users of this software to return to 35 * 36 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 37 * School of Computer Science 38 * Carnegie Mellon University 39 * Pittsburgh PA 15213-3890 40 * 41 * any improvements or extensions that they make and grant Carnegie the 42 * rights to redistribute these changes. 43 */ 44 45#define _KERNEL 46#define _LOCORE 47 48#include <machine/asm.h> 49#include <machine/board.h> 50#include <machine/psl.h> 51 52 .text 53 54ASGLOBAL(__start) 55 NOP 56 NOP 57 58ASLOCAL(main_start) 59 /* 60 * We want to only run on one processors, but still allow the 61 * other processors to run the kernel after it is loaded. 62 * 63 * To achieve this, we will `park' secondary processors into 64 * a spin loop, which they will exit once the kernel entry 65 * point and arguments are known. 66 * 67 * They will then proceed to run the kernel, as if the kernel 68 * had been directly booted from the PROM. 69 */ 70 or.u %r3, %r0, %hi16(_ASM_LABEL(cpu_park_address)) 71 or %r3, %r3, %lo16(_ASM_LABEL(cpu_park_address)) 72 73 or.u %r2, %r0, %hi16(_ASM_LABEL(cpu_park)) 74 or %r2, %r2, %lo16(_ASM_LABEL(cpu_park)) 75 FLUSH_PIPELINE 76 xmem %r2, %r3, %r0 77 78 bcnd eq0, %r2, 1f /* master! causing all the others to park */ 79 jmp %r2 /* park ourselves */ 80 811: 82 /* clear BSS */ 83 or.u %r2, %r0, %hi16(_C_LABEL(edata)) 84 or %r2, %r2, %lo16(_C_LABEL(edata)) 85 or.u %r4, %r0, %hi16(_C_LABEL(end)) 86 or %r4, %r4, %lo16(_C_LABEL(end)) 871: st %r0, %r2, %r0 88 addu %r2, %r2, 4 89 cmp %r3, %r2, %r4 90 bb1 ne, %r3, 1b 91 92 /* setup stack, below our image */ 93 or.u %r31, %r0, %hi16(_ASM_LABEL(__start)) 94 or %r31, %r31, %lo16(_ASM_LABEL(__start)) 95 96 /* read dip switch settings */ 97 or.u %r11, %r0, %hi16(OBIO_PIO0A) 98 ld.bu %r10, %r11, %lo16(OBIO_PIO0A) 99 mak %r10, %r10, 0<8> 100 ld.bu %r12, %r11, %lo16(OBIO_PIO0B) 101 or %r10, %r10, %r12 102 103 or.u %r11, %r0, %hi16(_C_LABEL(dipswitch)) 104 st.h %r10, %r11, %lo16(_C_LABEL(dipswitch)) 105 106 bsr _C_LABEL(main) 107 bsr _C_LABEL(_rtt) 1081: br 1b 109 110ASLOCAL(cpu_park) 111 /* spin a while */ 112 or.u %r2, %r0, 1 1139: 114 subu %r2, %r2, 1 115 bcnd ne0, %r2, 9b 116 117 /* if kernel entry point is known, exit */ 118 or.u %r1, %r0, %hi16(_C_LABEL(cpu_boot)) 119 ld %r1, %r1, %lo16(_C_LABEL(cpu_boot)) 120 bcnd eq0, %r1, _ASM_LABEL(cpu_park) 121 122 or.u %r2, %r0, 1 1239: 124 subu %r2, %r2, 1 125 bcnd ne0, %r2, 9b 126 127 or.u %r2, %r0, %hi16(_C_LABEL(cpu_bootarg1)) 128 ld %r2, %r2, %lo16(_C_LABEL(cpu_bootarg1)) 129 or.u %r3, %r0, %hi16(_C_LABEL(cpu_bootarg2)) 130 ld %r3, %r3, %lo16(_C_LABEL(cpu_bootarg2)) 131 132 jmp %r1 133 134GLOBAL(delay) 135 bcnd eq0, %r2, 2f 136 or.u %r3, %r0, %hi16(_C_LABEL(cpuspeed)) 137 ld %r3, %r3, %lo16(_C_LABEL(cpuspeed)) 138 mul %r4, %r2, %r3 139 subu %r4, %r4, 4 1401: 141 bcnd.n gt0, %r4, 1b 142 subu %r4, %r4, 2 1432: 144 jmp %r1 145 146 .data 147 148ASLOCAL(cpu_park_address) 149 .word 0 150