1 /* $OpenBSD: i2s.c,v 1.33 2016/08/30 11:20:09 ratchov Exp $ */ 2 /* $NetBSD: i2s.c,v 1.1 2003/12/27 02:19:34 grant Exp $ */ 3 4 /*- 5 * Copyright (c) 2002 Tsubai Masanari. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #include <sys/param.h> 31 #include <sys/audioio.h> 32 #include <sys/device.h> 33 #include <sys/malloc.h> 34 #include <sys/systm.h> 35 36 #include <dev/audio_if.h> 37 #include <dev/ofw/openfirm.h> 38 #include <macppc/dev/dbdma.h> 39 40 #include <uvm/uvm_extern.h> 41 42 #include <machine/autoconf.h> 43 #include <machine/pio.h> 44 45 #include <macppc/dev/i2svar.h> 46 #include <macppc/dev/i2sreg.h> 47 #include <macppc/pci/macobio.h> 48 49 #ifdef I2S_DEBUG 50 # define DPRINTF(x) printf x 51 #else 52 # define DPRINTF(x) 53 #endif 54 55 struct audio_params i2s_audio_default = { 56 44100, /* sample_rate */ 57 AUDIO_ENCODING_SLINEAR_BE, /* encoding */ 58 16, /* precision */ 59 2, /* bps */ 60 1, /* msb */ 61 2 /* channels */ 62 }; 63 64 void i2s_mute(u_int, int); 65 int i2s_cint(void *); 66 u_int i2s_gpio_offset(struct i2s_softc *, char *, int *); 67 void i2s_init(struct i2s_softc *, int); 68 69 int i2s_intr(void *); 70 int i2s_iintr(void *); 71 72 struct cfdriver i2s_cd = { 73 NULL, "i2s", DV_DULL 74 }; 75 76 void 77 i2s_attach(struct device *parent, struct i2s_softc *sc, struct confargs *ca) 78 { 79 int cirq, oirq, iirq, cirq_type, oirq_type, iirq_type; 80 u_int32_t reg[6], intr[6]; 81 char compat[32]; 82 int child; 83 84 sc->sc_node = OF_child(ca->ca_node); 85 sc->sc_baseaddr = ca->ca_baseaddr; 86 87 OF_getprop(sc->sc_node, "reg", reg, sizeof reg); 88 89 child = OF_child(sc->sc_node); 90 memset(compat, 0, sizeof(compat)); 91 OF_getprop(child, "compatible", compat, sizeof(compat)); 92 93 /* Deal with broken device-tree on PowerMac7,2 and 7,3. */ 94 if (strcmp(compat, "AOAK2") == 0) { 95 reg[0] += ca->ca_reg[0]; 96 reg[2] += ca->ca_reg[2]; 97 reg[4] += ca->ca_reg[2]; 98 } 99 100 reg[0] += sc->sc_baseaddr; 101 reg[2] += sc->sc_baseaddr; 102 reg[4] += sc->sc_baseaddr; 103 104 sc->sc_reg = mapiodev(reg[0], reg[1]); 105 106 sc->sc_dmat = ca->ca_dmat; 107 sc->sc_odma = mapiodev(reg[2], reg[3]); /* out */ 108 sc->sc_idma = mapiodev(reg[4], reg[5]); /* in */ 109 sc->sc_odbdma = dbdma_alloc(sc->sc_dmat, I2S_DMALIST_MAX); 110 sc->sc_odmacmd = sc->sc_odbdma->d_addr; 111 sc->sc_idbdma = dbdma_alloc(sc->sc_dmat, I2S_DMALIST_MAX); 112 sc->sc_idmacmd = sc->sc_idbdma->d_addr; 113 114 OF_getprop(sc->sc_node, "interrupts", intr, sizeof intr); 115 cirq = intr[0]; 116 oirq = intr[2]; 117 iirq = intr[4]; 118 cirq_type = (intr[1] & 1) ? IST_LEVEL : IST_EDGE; 119 oirq_type = (intr[3] & 1) ? IST_LEVEL : IST_EDGE; 120 iirq_type = (intr[5] & 1) ? IST_LEVEL : IST_EDGE; 121 122 /* intr_establish(cirq, cirq_type, IPL_AUDIO, i2s_intr, sc); */ 123 mac_intr_establish(parent, oirq, oirq_type, IPL_AUDIO | IPL_MPSAFE, 124 i2s_intr, sc, sc->sc_dev.dv_xname); 125 mac_intr_establish(parent, iirq, iirq_type, IPL_AUDIO | IPL_MPSAFE, 126 i2s_iintr, sc, sc->sc_dev.dv_xname); 127 128 printf(": irq %d,%d,%d\n", cirq, oirq, iirq); 129 130 /* Need to be explicitly turned on some G5. */ 131 macobio_enable(I2SClockOffset, I2S0CLKEN|I2S0EN); 132 133 i2s_set_rate(sc, 44100); 134 sc->sc_mute = 0; 135 i2s_gpio_init(sc, ca->ca_node, parent); 136 } 137 138 int 139 i2s_intr(v) 140 void *v; 141 { 142 struct i2s_softc *sc = v; 143 struct dbdma_command *cmd = sc->sc_odmap; 144 u_int16_t c, status; 145 146 mtx_enter(&audio_lock); 147 148 /* if not set we are not running */ 149 if (!cmd) { 150 mtx_leave(&audio_lock); 151 return (0); 152 } 153 DPRINTF(("i2s_intr: cmd %p\n", cmd)); 154 155 c = in16rb(&cmd->d_command); 156 status = in16rb(&cmd->d_status); 157 158 if (c >> 12 == DBDMA_CMD_OUT_LAST) 159 sc->sc_odmap = sc->sc_odmacmd; 160 else 161 sc->sc_odmap++; 162 163 if (c & (DBDMA_INT_ALWAYS << 4)) { 164 cmd->d_status = 0; 165 if (status) /* status == 0x8400 */ 166 if (sc->sc_ointr) 167 (*sc->sc_ointr)(sc->sc_oarg); 168 } 169 mtx_leave(&audio_lock); 170 return 1; 171 } 172 173 int 174 i2s_iintr(v) 175 void *v; 176 { 177 struct i2s_softc *sc = v; 178 struct dbdma_command *cmd = sc->sc_idmap; 179 u_int16_t c, status; 180 181 mtx_enter(&audio_lock); 182 183 /* if not set we are not running */ 184 if (!cmd) { 185 mtx_leave(&audio_lock); 186 return (0); 187 } 188 DPRINTF(("i2s_intr: cmd %p\n", cmd)); 189 190 c = in16rb(&cmd->d_command); 191 status = in16rb(&cmd->d_status); 192 193 if (c >> 12 == DBDMA_CMD_IN_LAST) 194 sc->sc_idmap = sc->sc_idmacmd; 195 else 196 sc->sc_idmap++; 197 198 if (c & (DBDMA_INT_ALWAYS << 4)) { 199 cmd->d_status = 0; 200 if (status) /* status == 0x8400 */ 201 if (sc->sc_iintr) 202 (*sc->sc_iintr)(sc->sc_iarg); 203 } 204 mtx_leave(&audio_lock); 205 return 1; 206 } 207 208 int 209 i2s_open(h, flags) 210 void *h; 211 int flags; 212 { 213 return 0; 214 } 215 216 /* 217 * Close function is called at splaudio(). 218 */ 219 void 220 i2s_close(h) 221 void *h; 222 { 223 struct i2s_softc *sc = h; 224 225 i2s_halt_output(sc); 226 i2s_halt_input(sc); 227 228 sc->sc_ointr = 0; 229 sc->sc_iintr = 0; 230 } 231 232 int 233 i2s_query_encoding(h, ae) 234 void *h; 235 struct audio_encoding *ae; 236 { 237 int err = 0; 238 239 switch (ae->index) { 240 case 0: 241 strlcpy(ae->name, AudioEslinear_be, sizeof(ae->name)); 242 ae->encoding = AUDIO_ENCODING_SLINEAR_BE; 243 ae->precision = 16; 244 ae->flags = 0; 245 break; 246 default: 247 err = EINVAL; 248 break; 249 } 250 ae->bps = AUDIO_BPS(ae->precision); 251 ae->msb = 1; 252 return (err); 253 } 254 255 256 int 257 i2s_set_params(h, setmode, usemode, play, rec) 258 void *h; 259 int setmode, usemode; 260 struct audio_params *play, *rec; 261 { 262 struct i2s_softc *sc = h; 263 struct audio_params *p; 264 int mode; 265 266 p = play; /* default to play */ 267 268 /* 269 * This device only has one clock, so make the sample rates match. 270 */ 271 if (play->sample_rate != rec->sample_rate && 272 usemode == (AUMODE_PLAY | AUMODE_RECORD)) { 273 if (setmode == AUMODE_PLAY) { 274 rec->sample_rate = play->sample_rate; 275 setmode |= AUMODE_RECORD; 276 } else if (setmode == AUMODE_RECORD) { 277 play->sample_rate = rec->sample_rate; 278 setmode |= AUMODE_PLAY; 279 } else 280 return EINVAL; 281 } 282 283 for (mode = AUMODE_RECORD; mode != -1; 284 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 285 if ((setmode & mode) == 0) 286 continue; 287 288 p = mode == AUMODE_PLAY ? play : rec; 289 290 if (p->sample_rate < 4000) 291 p->sample_rate = 4000; 292 if (p->sample_rate > 50000) 293 p->sample_rate = 50000; 294 if (p->precision > 16) 295 p->precision = 16; 296 if (p->channels > 2) 297 p->channels = 2; 298 p->bps = AUDIO_BPS(p->precision); 299 p->msb = 1; 300 p->encoding = AUDIO_ENCODING_SLINEAR_BE; 301 } 302 303 /* Set the speed */ 304 if (i2s_set_rate(sc, play->sample_rate)) 305 return EINVAL; 306 307 p->sample_rate = sc->sc_rate; 308 return 0; 309 } 310 311 void 312 i2s_get_default_params(struct audio_params *params) 313 { 314 *params = i2s_audio_default; 315 } 316 317 int 318 i2s_round_blocksize(h, size) 319 void *h; 320 int size; 321 { 322 if (size < NBPG) 323 size = NBPG; 324 return size & ~PGOFSET; 325 } 326 327 int 328 i2s_halt_output(h) 329 void *h; 330 { 331 struct i2s_softc *sc = h; 332 333 dbdma_stop(sc->sc_odma); 334 dbdma_reset(sc->sc_odma); 335 return 0; 336 } 337 338 int 339 i2s_halt_input(h) 340 void *h; 341 { 342 struct i2s_softc *sc = h; 343 344 dbdma_stop(sc->sc_idma); 345 dbdma_reset(sc->sc_idma); 346 return 0; 347 } 348 349 enum { 350 I2S_OUTPUT_CLASS, 351 I2S_RECORD_CLASS, 352 I2S_OUTPUT_SELECT, 353 I2S_VOL_OUTPUT, 354 I2S_INPUT_SELECT, 355 I2S_VOL_INPUT, 356 I2S_MUTE, /* should be before bass/treble */ 357 I2S_BASS, 358 I2S_TREBLE, 359 I2S_ENUM_LAST 360 }; 361 362 int 363 i2s_set_port(void *h, mixer_ctrl_t *mc) 364 { 365 struct i2s_softc *sc = h; 366 int l, r; 367 368 DPRINTF(("i2s_set_port dev = %d, type = %d\n", mc->dev, mc->type)); 369 370 l = mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT]; 371 r = mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]; 372 373 switch (mc->dev) { 374 case I2S_OUTPUT_SELECT: 375 /* No change necessary? */ 376 if (mc->un.mask == sc->sc_output_mask) 377 return 0; 378 379 i2s_mute(sc->sc_spkr, 1); 380 i2s_mute(sc->sc_hp, 1); 381 i2s_mute(sc->sc_line, 1); 382 if (mc->un.mask & I2S_SELECT_SPEAKER) 383 i2s_mute(sc->sc_spkr, 0); 384 if (mc->un.mask & I2S_SELECT_HEADPHONE) 385 i2s_mute(sc->sc_hp, 0); 386 if (mc->un.mask & I2S_SELECT_LINEOUT) 387 i2s_mute(sc->sc_line, 0); 388 389 sc->sc_output_mask = mc->un.mask; 390 return 0; 391 392 case I2S_VOL_OUTPUT: 393 (*sc->sc_setvolume)(sc, l, r); 394 return 0; 395 396 case I2S_MUTE: 397 if (mc->type != AUDIO_MIXER_ENUM) 398 return (EINVAL); 399 400 sc->sc_mute = (mc->un.ord != 0); 401 402 if (sc->sc_mute) { 403 if (sc->sc_output_mask & I2S_SELECT_SPEAKER) 404 i2s_mute(sc->sc_spkr, 1); 405 if (sc->sc_output_mask & I2S_SELECT_HEADPHONE) 406 i2s_mute(sc->sc_hp, 1); 407 if (sc->sc_output_mask & I2S_SELECT_LINEOUT) 408 i2s_mute(sc->sc_line, 1); 409 } else { 410 if (sc->sc_output_mask & I2S_SELECT_SPEAKER) 411 i2s_mute(sc->sc_spkr, 0); 412 if (sc->sc_output_mask & I2S_SELECT_HEADPHONE) 413 i2s_mute(sc->sc_hp, 0); 414 if (sc->sc_output_mask & I2S_SELECT_LINEOUT) 415 i2s_mute(sc->sc_line, 0); 416 } 417 418 return (0); 419 420 case I2S_BASS: 421 if (sc->sc_setbass != NULL) 422 (*sc->sc_setbass)(sc, l); 423 return (0); 424 425 case I2S_TREBLE: 426 if (sc->sc_settreble != NULL) 427 (*sc->sc_settreble)(sc, l); 428 return (0); 429 430 case I2S_INPUT_SELECT: 431 /* no change necessary? */ 432 if (mc->un.mask == sc->sc_record_source) 433 return 0; 434 switch (mc->un.mask) { 435 case I2S_SELECT_SPEAKER: 436 case I2S_SELECT_HEADPHONE: 437 /* XXX TO BE DONE */ 438 break; 439 default: /* invalid argument */ 440 return EINVAL; 441 } 442 if (sc->sc_setinput != NULL) 443 (*sc->sc_setinput)(sc, mc->un.mask); 444 sc->sc_record_source = mc->un.mask; 445 return 0; 446 447 case I2S_VOL_INPUT: 448 /* XXX TO BE DONE */ 449 return 0; 450 } 451 452 return ENXIO; 453 } 454 455 int 456 i2s_get_port(void *h, mixer_ctrl_t *mc) 457 { 458 struct i2s_softc *sc = h; 459 460 DPRINTF(("i2s_get_port dev = %d, type = %d\n", mc->dev, mc->type)); 461 462 switch (mc->dev) { 463 case I2S_OUTPUT_SELECT: 464 mc->un.mask = sc->sc_output_mask; 465 return 0; 466 467 case I2S_VOL_OUTPUT: 468 mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = sc->sc_vol_l; 469 mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = sc->sc_vol_r; 470 return 0; 471 472 case I2S_MUTE: 473 mc->un.ord = sc->sc_mute; 474 return (0); 475 476 case I2S_INPUT_SELECT: 477 mc->un.mask = sc->sc_record_source; 478 return 0; 479 480 case I2S_BASS: 481 if (mc->un.value.num_channels != 1) 482 return ENXIO; 483 mc->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->sc_bass; 484 return 0; 485 486 case I2S_TREBLE: 487 if (mc->un.value.num_channels != 1) 488 return ENXIO; 489 mc->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->sc_treble; 490 return 0; 491 492 case I2S_VOL_INPUT: 493 /* XXX TO BE DONE */ 494 mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = 0; 495 mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = 0; 496 return 0; 497 498 default: 499 return ENXIO; 500 } 501 502 return 0; 503 } 504 505 int 506 i2s_query_devinfo(void *h, mixer_devinfo_t *dip) 507 { 508 struct i2s_softc *sc = h; 509 int n = 0; 510 511 switch (dip->index) { 512 513 case I2S_OUTPUT_SELECT: 514 dip->mixer_class = I2S_OUTPUT_CLASS; 515 strlcpy(dip->label.name, AudioNselect, sizeof(dip->label.name)); 516 dip->type = AUDIO_MIXER_SET; 517 dip->prev = dip->next = AUDIO_MIXER_LAST; 518 strlcpy(dip->un.s.member[n].label.name, AudioNspeaker, 519 sizeof(dip->un.s.member[n].label.name)); 520 dip->un.s.member[n++].mask = I2S_SELECT_SPEAKER; 521 if (sc->sc_hp) { 522 strlcpy(dip->un.s.member[n].label.name, 523 AudioNheadphone, 524 sizeof(dip->un.s.member[n].label.name)); 525 dip->un.s.member[n++].mask = I2S_SELECT_HEADPHONE; 526 } 527 if (sc->sc_line) { 528 strlcpy(dip->un.s.member[n].label.name, AudioNline, 529 sizeof(dip->un.s.member[n].label.name)); 530 dip->un.s.member[n++].mask = I2S_SELECT_LINEOUT; 531 } 532 dip->un.s.num_mem = n; 533 return 0; 534 535 case I2S_VOL_OUTPUT: 536 dip->mixer_class = I2S_OUTPUT_CLASS; 537 strlcpy(dip->label.name, AudioNmaster, sizeof(dip->label.name)); 538 dip->type = AUDIO_MIXER_VALUE; 539 dip->prev = AUDIO_MIXER_LAST; 540 dip->next = I2S_MUTE; 541 dip->un.v.num_channels = 2; 542 dip->un.v.delta = 8; 543 strlcpy(dip->un.v.units.name, AudioNvolume, 544 sizeof(dip->un.v.units.name)); 545 return 0; 546 547 case I2S_MUTE: 548 dip->mixer_class = I2S_OUTPUT_CLASS; 549 dip->prev = I2S_VOL_OUTPUT; 550 dip->next = AUDIO_MIXER_LAST; 551 strlcpy(dip->label.name, AudioNmute, sizeof(dip->label.name)); 552 dip->type = AUDIO_MIXER_ENUM; 553 dip->un.e.num_mem = 2; 554 strlcpy(dip->un.e.member[0].label.name, AudioNoff, 555 sizeof dip->un.e.member[0].label.name); 556 dip->un.e.member[0].ord = 0; 557 strlcpy(dip->un.e.member[1].label.name, AudioNon, 558 sizeof dip->un.e.member[1].label.name); 559 dip->un.e.member[1].ord = 1; 560 return (0); 561 562 case I2S_INPUT_SELECT: 563 dip->mixer_class = I2S_RECORD_CLASS; 564 strlcpy(dip->label.name, AudioNsource, sizeof(dip->label.name)); 565 dip->type = AUDIO_MIXER_SET; 566 dip->prev = dip->next = AUDIO_MIXER_LAST; 567 dip->un.s.num_mem = 2; 568 strlcpy(dip->un.s.member[0].label.name, AudioNmicrophone, 569 sizeof(dip->un.s.member[0].label.name)); 570 dip->un.s.member[0].mask = I2S_SELECT_SPEAKER; 571 strlcpy(dip->un.s.member[1].label.name, AudioNline, 572 sizeof(dip->un.s.member[1].label.name)); 573 dip->un.s.member[1].mask = I2S_SELECT_HEADPHONE; 574 return 0; 575 576 case I2S_VOL_INPUT: 577 dip->mixer_class = I2S_RECORD_CLASS; 578 strlcpy(dip->label.name, AudioNrecord, sizeof(dip->label.name)); 579 dip->type = AUDIO_MIXER_VALUE; 580 dip->prev = dip->next = AUDIO_MIXER_LAST; 581 dip->un.v.num_channels = 2; 582 strlcpy(dip->un.v.units.name, AudioNvolume, 583 sizeof(dip->un.v.units.name)); 584 return 0; 585 586 case I2S_OUTPUT_CLASS: 587 dip->mixer_class = I2S_OUTPUT_CLASS; 588 strlcpy(dip->label.name, AudioCoutputs, 589 sizeof(dip->label.name)); 590 dip->type = AUDIO_MIXER_CLASS; 591 dip->next = dip->prev = AUDIO_MIXER_LAST; 592 return 0; 593 594 case I2S_RECORD_CLASS: 595 dip->mixer_class = I2S_RECORD_CLASS; 596 strlcpy(dip->label.name, AudioCrecord, sizeof(dip->label.name)); 597 dip->type = AUDIO_MIXER_CLASS; 598 dip->next = dip->prev = AUDIO_MIXER_LAST; 599 return 0; 600 601 case I2S_BASS: 602 if (sc->sc_setbass == NULL) 603 return (ENXIO); 604 dip->mixer_class = I2S_OUTPUT_CLASS; 605 strlcpy(dip->label.name, AudioNbass, sizeof(dip->label.name)); 606 dip->type = AUDIO_MIXER_VALUE; 607 dip->prev = dip->next = AUDIO_MIXER_LAST; 608 dip->un.v.num_channels = 1; 609 return (0); 610 611 case I2S_TREBLE: 612 if (sc->sc_settreble == NULL) 613 return (ENXIO); 614 dip->mixer_class = I2S_OUTPUT_CLASS; 615 strlcpy(dip->label.name, AudioNtreble, sizeof(dip->label.name)); 616 dip->type = AUDIO_MIXER_VALUE; 617 dip->prev = dip->next = AUDIO_MIXER_LAST; 618 dip->un.v.num_channels = 1; 619 return (0); 620 } 621 622 return ENXIO; 623 } 624 625 size_t 626 i2s_round_buffersize(h, dir, size) 627 void *h; 628 int dir; 629 size_t size; 630 { 631 if (size > 65536) 632 size = 65536; 633 return size; 634 } 635 636 paddr_t 637 i2s_mappage(h, mem, off, prot) 638 void *h; 639 void *mem; 640 off_t off; 641 int prot; 642 { 643 if (off < 0) 644 return -1; 645 return -1; /* XXX */ 646 } 647 648 int 649 i2s_get_props(h) 650 void *h; 651 { 652 return AUDIO_PROP_FULLDUPLEX /* | AUDIO_PROP_MMAP */; 653 } 654 655 int 656 i2s_trigger_output(h, start, end, bsize, intr, arg, param) 657 void *h; 658 void *start, *end; 659 int bsize; 660 void (*intr)(void *); 661 void *arg; 662 struct audio_params *param; 663 { 664 struct i2s_softc *sc = h; 665 struct i2s_dma *p; 666 struct dbdma_command *cmd = sc->sc_odmacmd; 667 vaddr_t spa, pa, epa; 668 int c; 669 670 DPRINTF(("trigger_output %p %p 0x%x\n", start, end, bsize)); 671 672 for (p = sc->sc_dmas; p && p->addr != start; p = p->next); 673 if (!p) 674 return -1; 675 676 sc->sc_ointr = intr; 677 sc->sc_oarg = arg; 678 sc->sc_odmap = sc->sc_odmacmd; 679 680 spa = p->segs[0].ds_addr; 681 c = DBDMA_CMD_OUT_MORE; 682 for (pa = spa, epa = spa + (end - start); 683 pa < epa; pa += bsize, cmd++) { 684 685 if (pa + bsize == epa) 686 c = DBDMA_CMD_OUT_LAST; 687 688 DBDMA_BUILD(cmd, c, 0, bsize, pa, DBDMA_INT_ALWAYS, 689 DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 690 } 691 692 DBDMA_BUILD(cmd, DBDMA_CMD_NOP, 0, 0, 0, 693 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_ALWAYS); 694 dbdma_st32(&cmd->d_cmddep, sc->sc_odbdma->d_paddr); 695 696 dbdma_start(sc->sc_odma, sc->sc_odbdma); 697 698 return 0; 699 } 700 701 int 702 i2s_trigger_input(h, start, end, bsize, intr, arg, param) 703 void *h; 704 void *start, *end; 705 int bsize; 706 void (*intr)(void *); 707 void *arg; 708 struct audio_params *param; 709 { 710 struct i2s_softc *sc = h; 711 struct i2s_dma *p; 712 struct dbdma_command *cmd = sc->sc_idmacmd; 713 vaddr_t spa, pa, epa; 714 int c; 715 716 DPRINTF(("trigger_input %p %p 0x%x\n", start, end, bsize)); 717 718 for (p = sc->sc_dmas; p && p->addr != start; p = p->next); 719 if (!p) 720 return -1; 721 722 sc->sc_iintr = intr; 723 sc->sc_iarg = arg; 724 sc->sc_idmap = sc->sc_idmacmd; 725 726 spa = p->segs[0].ds_addr; 727 c = DBDMA_CMD_IN_MORE; 728 for (pa = spa, epa = spa + (end - start); 729 pa < epa; pa += bsize, cmd++) { 730 731 if (pa + bsize == epa) 732 c = DBDMA_CMD_IN_LAST; 733 734 DBDMA_BUILD(cmd, c, 0, bsize, pa, DBDMA_INT_ALWAYS, 735 DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 736 } 737 738 DBDMA_BUILD(cmd, DBDMA_CMD_NOP, 0, 0, 0, 739 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_ALWAYS); 740 dbdma_st32(&cmd->d_cmddep, sc->sc_idbdma->d_paddr); 741 742 dbdma_start(sc->sc_idma, sc->sc_idbdma); 743 744 return 0; 745 } 746 747 748 /* rate = fs = LRCLK 749 * SCLK = 64*LRCLK (I2S) 750 * MCLK = 256fs (typ. -- changeable) 751 * MCLK = clksrc / mdiv 752 * SCLK = MCLK / sdiv 753 * rate = SCLK / 64 ( = LRCLK = fs) 754 */ 755 int 756 i2s_set_rate(sc, rate) 757 struct i2s_softc *sc; 758 int rate; 759 { 760 u_int reg = 0; 761 int MCLK; 762 int clksrc, mdiv, sdiv; 763 int mclk_fs; 764 int timo; 765 766 /* sanify */ 767 if (rate > (48000 + 44100) / 2) 768 rate = 48000; 769 else 770 rate = 44100; 771 772 switch (rate) { 773 case 44100: 774 clksrc = 45158400; /* 45MHz */ 775 reg = CLKSRC_45MHz; 776 mclk_fs = 256; 777 break; 778 779 case 48000: 780 clksrc = 49152000; /* 49MHz */ 781 reg = CLKSRC_49MHz; 782 mclk_fs = 256; 783 break; 784 785 default: 786 return EINVAL; 787 } 788 789 MCLK = rate * mclk_fs; 790 mdiv = clksrc / MCLK; /* 4 */ 791 sdiv = mclk_fs / 64; /* 4 */ 792 793 switch (mdiv) { 794 case 1: 795 reg |= MCLK_DIV1; 796 break; 797 case 3: 798 reg |= MCLK_DIV3; 799 break; 800 case 5: 801 reg |= MCLK_DIV5; 802 break; 803 default: 804 reg |= ((mdiv / 2 - 1) << 24) & 0x1f000000; 805 break; 806 } 807 808 switch (sdiv) { 809 case 1: 810 reg |= SCLK_DIV1; 811 break; 812 case 3: 813 reg |= SCLK_DIV3; 814 break; 815 default: 816 reg |= ((sdiv / 2 - 1) << 20) & 0x00f00000; 817 break; 818 } 819 820 reg |= SCLK_MASTER; /* XXX master mode */ 821 822 reg |= SERIAL_64x; 823 824 if (sc->sc_rate == rate) 825 return (0); 826 827 /* stereo input and output */ 828 DPRINTF(("I2SSetDataWordSizeReg 0x%08x -> 0x%08x\n", 829 in32rb(sc->sc_reg + I2S_WORDSIZE), 0x02000200)); 830 out32rb(sc->sc_reg + I2S_WORDSIZE, 0x02000200); 831 832 /* Clear CLKSTOPPEND */ 833 out32rb(sc->sc_reg + I2S_INT, I2S_INT_CLKSTOPPEND); 834 835 macobio_disable(I2SClockOffset, I2S0CLKEN); 836 837 /* Wait until clock is stopped */ 838 for (timo = 50; timo > 0; timo--) { 839 if (in32rb(sc->sc_reg + I2S_INT) & I2S_INT_CLKSTOPPEND) 840 goto done; 841 delay(10); 842 } 843 844 printf("i2s_set_rate: timeout\n"); 845 846 done: 847 DPRINTF(("I2SSetSerialFormatReg 0x%x -> 0x%x\n", 848 in32rb(sc->sc_reg + I2S_FORMAT), reg)); 849 out32rb(sc->sc_reg + I2S_FORMAT, reg); 850 851 macobio_enable(I2SClockOffset, I2S0CLKEN); 852 853 sc->sc_rate = rate; 854 855 return 0; 856 } 857 858 void 859 i2s_mute(u_int offset, int mute) 860 { 861 if (offset == 0) 862 return; 863 864 DPRINTF(("gpio: %x, %d -> ", offset, macobio_read(offset) & GPIO_DATA)); 865 866 /* 0 means mute */ 867 if (mute == (macobio_read(offset) & GPIO_DATA)) 868 macobio_write(offset, !mute | GPIO_DDR_OUTPUT); 869 870 DPRINTF(("%d\n", macobio_read(offset) & GPIO_DATA)); 871 } 872 873 int 874 i2s_cint(void *v) 875 { 876 struct i2s_softc *sc = v; 877 u_int sense; 878 879 sc->sc_output_mask = 0; 880 i2s_mute(sc->sc_spkr, 1); 881 i2s_mute(sc->sc_hp, 1); 882 i2s_mute(sc->sc_line, 1); 883 884 if (sc->sc_hp_detect) 885 sense = macobio_read(sc->sc_hp_detect); 886 else 887 sense = !sc->sc_hp_active << 1; 888 DPRINTF(("headphone detect = 0x%x\n", sense)); 889 890 if (((sense & 0x02) >> 1) == sc->sc_hp_active) { 891 DPRINTF(("headphone is inserted\n")); 892 sc->sc_output_mask |= I2S_SELECT_HEADPHONE; 893 if (!sc->sc_mute) 894 i2s_mute(sc->sc_hp, 0); 895 } else { 896 DPRINTF(("headphone is NOT inserted\n")); 897 } 898 899 if (sc->sc_line_detect) 900 sense = macobio_read(sc->sc_line_detect); 901 else 902 sense = !sc->sc_line_active << 1; 903 DPRINTF(("lineout detect = 0x%x\n", sense)); 904 905 if (((sense & 0x02) >> 1) == sc->sc_line_active) { 906 DPRINTF(("lineout is inserted\n")); 907 sc->sc_output_mask |= I2S_SELECT_LINEOUT; 908 if (!sc->sc_mute) 909 i2s_mute(sc->sc_line, 0); 910 } else { 911 DPRINTF(("lineout is NOT inserted\n")); 912 } 913 914 if (sc->sc_output_mask == 0) { 915 sc->sc_output_mask |= I2S_SELECT_SPEAKER; 916 if (!sc->sc_mute) 917 i2s_mute(sc->sc_spkr, 0); 918 } 919 920 return 1; 921 } 922 923 u_int 924 i2s_gpio_offset(struct i2s_softc *sc, char *name, int *irq) 925 { 926 u_int32_t reg[2]; 927 u_int32_t intr[2]; 928 int gpio; 929 930 if (OF_getprop(sc->sc_node, name, &gpio, 931 sizeof(gpio)) != sizeof(gpio) || 932 OF_getprop(gpio, "reg", ®[0], 933 sizeof(reg[0])) != sizeof(reg[0]) || 934 OF_getprop(OF_parent(gpio), "reg", ®[1], 935 sizeof(reg[1])) != sizeof(reg[1])) 936 return (0); 937 938 if (irq && OF_getprop(gpio, "interrupts", 939 intr, sizeof(intr)) == sizeof(intr)) { 940 *irq = intr[0]; 941 } 942 943 return (reg[0] + reg[1]); 944 } 945 946 void 947 i2s_gpio_init(struct i2s_softc *sc, int node, struct device *parent) 948 { 949 int gpio; 950 int hp_detect_intr = -1, line_detect_intr = -1; 951 952 sc->sc_spkr = i2s_gpio_offset(sc, "platform-amp-mute", NULL); 953 sc->sc_hp = i2s_gpio_offset(sc, "platform-headphone-mute", NULL); 954 sc->sc_hp_detect = i2s_gpio_offset(sc, "platform-headphone-detect", 955 &hp_detect_intr); 956 sc->sc_line = i2s_gpio_offset(sc, "platform-lineout-mute", NULL); 957 sc->sc_line_detect = i2s_gpio_offset(sc, "platform-lineout-detect", 958 &line_detect_intr); 959 sc->sc_hw_reset = i2s_gpio_offset(sc, "platform-hw-reset", NULL); 960 961 gpio = OF_getnodebyname(OF_parent(node), "gpio"); 962 DPRINTF((" /gpio 0x%x\n", gpio)); 963 for (gpio = OF_child(gpio); gpio; gpio = OF_peer(gpio)) { 964 char name[64], audio_gpio[64]; 965 int intr[2]; 966 uint32_t reg; 967 968 reg = 0; 969 bzero(name, sizeof name); 970 bzero(audio_gpio, sizeof audio_gpio); 971 OF_getprop(gpio, "name", name, sizeof name); 972 OF_getprop(gpio, "audio-gpio", audio_gpio, sizeof audio_gpio); 973 if (OF_getprop(gpio, "reg", ®, sizeof(reg)) == -1) 974 OF_getprop(gpio, "AAPL,address", ®, sizeof(reg)); 975 976 if (reg > sc->sc_baseaddr) 977 reg = (reg - sc->sc_baseaddr); 978 979 /* gpio5 */ 980 if (sc->sc_hp == 0 && strcmp(audio_gpio, "headphone-mute") == 0) 981 sc->sc_hp = reg; 982 983 /* gpio6 */ 984 if (sc->sc_spkr == 0 && strcmp(audio_gpio, "amp-mute") == 0) 985 sc->sc_spkr = reg; 986 987 /* extint-gpio15 */ 988 if (sc->sc_hp_detect == 0 && 989 strcmp(audio_gpio, "headphone-detect") == 0) { 990 sc->sc_hp_detect = reg; 991 OF_getprop(gpio, "audio-gpio-active-state", 992 &sc->sc_hp_active, 4); 993 OF_getprop(gpio, "interrupts", intr, 8); 994 hp_detect_intr = intr[0]; 995 } 996 997 /* gpio11 (keywest-11) */ 998 if (sc->sc_hw_reset == 0 && 999 strcmp(audio_gpio, "audio-hw-reset") == 0) 1000 sc->sc_hw_reset = reg; 1001 } 1002 DPRINTF((" amp-mute 0x%x\n", sc->sc_spkr)); 1003 DPRINTF((" headphone-mute 0x%x\n", sc->sc_hp)); 1004 DPRINTF((" headphone-detect 0x%x\n", sc->sc_hp_detect)); 1005 DPRINTF((" headphone-detect active %x\n", sc->sc_hp_active)); 1006 DPRINTF((" headphone-detect intr %x\n", hp_detect_intr)); 1007 DPRINTF((" lineout-mute 0x%x\n", sc->sc_line)); 1008 DPRINTF((" lineout-detect 0x%x\n", sc->sc_line_detect)); 1009 DPRINTF((" lineout-detect active 0x%x\n", sc->sc_line_active)); 1010 DPRINTF((" lineout-detect intr 0x%x\n", line_detect_intr)); 1011 DPRINTF((" audio-hw-reset 0x%x\n", sc->sc_hw_reset)); 1012 1013 if (hp_detect_intr != -1) 1014 mac_intr_establish(parent, hp_detect_intr, IST_EDGE, 1015 IPL_AUDIO | IPL_MPSAFE, i2s_cint, sc, sc->sc_dev.dv_xname); 1016 1017 if (line_detect_intr != -1) 1018 mac_intr_establish(parent, line_detect_intr, IST_EDGE, 1019 IPL_AUDIO | IPL_MPSAFE, i2s_cint, sc, sc->sc_dev.dv_xname); 1020 1021 /* Enable headphone interrupt? */ 1022 macobio_write(sc->sc_hp_detect, 0x80); 1023 1024 /* Update headphone status. */ 1025 i2s_cint(sc); 1026 } 1027 1028 void * 1029 i2s_allocm(void *h, int dir, size_t size, int type, int flags) 1030 { 1031 struct i2s_softc *sc = h; 1032 struct i2s_dma *p; 1033 int error; 1034 1035 if (size > I2S_DMALIST_MAX * I2S_DMASEG_MAX) 1036 return (NULL); 1037 1038 p = malloc(sizeof(*p), type, flags | M_ZERO); 1039 if (!p) 1040 return (NULL); 1041 1042 /* convert to the bus.h style, not used otherwise */ 1043 if (flags & M_NOWAIT) 1044 flags = BUS_DMA_NOWAIT; 1045 1046 p->size = size; 1047 if ((error = bus_dmamem_alloc(sc->sc_dmat, p->size, NBPG, 0, p->segs, 1048 1, &p->nsegs, flags)) != 0) { 1049 printf("%s: unable to allocate dma, error = %d\n", 1050 sc->sc_dev.dv_xname, error); 1051 free(p, type, sizeof *p); 1052 return NULL; 1053 } 1054 1055 if ((error = bus_dmamem_map(sc->sc_dmat, p->segs, p->nsegs, p->size, 1056 &p->addr, flags | BUS_DMA_COHERENT)) != 0) { 1057 printf("%s: unable to map dma, error = %d\n", 1058 sc->sc_dev.dv_xname, error); 1059 bus_dmamem_free(sc->sc_dmat, p->segs, p->nsegs); 1060 free(p, type, sizeof *p); 1061 return NULL; 1062 } 1063 1064 if ((error = bus_dmamap_create(sc->sc_dmat, p->size, 1, 1065 p->size, 0, flags, &p->map)) != 0) { 1066 printf("%s: unable to create dma map, error = %d\n", 1067 sc->sc_dev.dv_xname, error); 1068 bus_dmamem_unmap(sc->sc_dmat, p->addr, size); 1069 bus_dmamem_free(sc->sc_dmat, p->segs, p->nsegs); 1070 free(p, type, sizeof *p); 1071 return NULL; 1072 } 1073 1074 if ((error = bus_dmamap_load(sc->sc_dmat, p->map, p->addr, p->size, 1075 NULL, flags)) != 0) { 1076 printf("%s: unable to load dma map, error = %d\n", 1077 sc->sc_dev.dv_xname, error); 1078 bus_dmamap_destroy(sc->sc_dmat, p->map); 1079 bus_dmamem_unmap(sc->sc_dmat, p->addr, size); 1080 bus_dmamem_free(sc->sc_dmat, p->segs, p->nsegs); 1081 free(p, type, sizeof *p); 1082 return NULL; 1083 } 1084 1085 p->next = sc->sc_dmas; 1086 sc->sc_dmas = p; 1087 1088 return p->addr; 1089 } 1090 1091 #define reset_active 0 1092 1093 int 1094 deq_reset(struct i2s_softc *sc) 1095 { 1096 if (sc->sc_hw_reset == 0) 1097 return (-1); 1098 1099 macobio_write(sc->sc_hw_reset, !reset_active | GPIO_DDR_OUTPUT); 1100 delay(1000000); 1101 1102 macobio_write(sc->sc_hw_reset, reset_active | GPIO_DDR_OUTPUT); 1103 delay(1); 1104 1105 macobio_write(sc->sc_hw_reset, !reset_active | GPIO_DDR_OUTPUT); 1106 delay(10000); 1107 1108 return (0); 1109 } 1110