xref: /openbsd/sys/arch/macppc/dev/if_bmreg.h (revision 8730a84a)
1*8730a84aSbrad /*	$OpenBSD: if_bmreg.h,v 1.3 2005/10/09 04:24:50 brad Exp $	*/
2408231c3Sdrahn /*	$NetBSD: if_bmreg.h,v 1.2 2000/01/25 14:38:50 tsubai Exp $	*/
3d9a5f17fSdrahn 
4d9a5f17fSdrahn /*
5d9a5f17fSdrahn  * Copyright 1991-1998 by Open Software Foundation, Inc.
6d9a5f17fSdrahn  *              All Rights Reserved
7d9a5f17fSdrahn  *
8d9a5f17fSdrahn  * Permission to use, copy, modify, and distribute this software and
9d9a5f17fSdrahn  * its documentation for any purpose and without fee is hereby granted,
10d9a5f17fSdrahn  * provided that the above copyright notice appears in all copies and
11d9a5f17fSdrahn  * that both the copyright notice and this permission notice appear in
12d9a5f17fSdrahn  * supporting documentation.
13d9a5f17fSdrahn  *
14d9a5f17fSdrahn  * OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
15d9a5f17fSdrahn  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
16d9a5f17fSdrahn  * FOR A PARTICULAR PURPOSE.
17d9a5f17fSdrahn  *
18d9a5f17fSdrahn  * IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
19d9a5f17fSdrahn  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
20d9a5f17fSdrahn  * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
21d9a5f17fSdrahn  * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
22d9a5f17fSdrahn  * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
23d9a5f17fSdrahn  */
24d9a5f17fSdrahn 
25d9a5f17fSdrahn /* -------------------------------------------------------------------- */
26d9a5f17fSdrahn /* Heathrow (F)eature (C)ontrol (R)egister Addresses			*/
27d9a5f17fSdrahn /* -------------------------------------------------------------------- */
28d9a5f17fSdrahn #define EnetEnable	0x60000000	/* enable Enet Xcvr/Controller */
29d9a5f17fSdrahn #define ResetEnetCell	0x80000000	/* reset Enet cell */
30d9a5f17fSdrahn 
31d9a5f17fSdrahn /* -------------------------------------------------------------------- */
32d9a5f17fSdrahn /*	BigMac Register Numbers & Bit Assignments			*/
33d9a5f17fSdrahn /* -------------------------------------------------------------------- */
34d9a5f17fSdrahn #define XIFC		0x0000
35d9a5f17fSdrahn #define  TxOutputEnable		0x0001
36d9a5f17fSdrahn #define  MIILoopbackBits	0x0006
37d9a5f17fSdrahn #define  MIIBufferEnable	0x0008
38d9a5f17fSdrahn #define  SQETestEnable		0x0010
39d9a5f17fSdrahn #define LinkStatus	0x0100
40d9a5f17fSdrahn #define TXFIFOCSR	0x0100
41d9a5f17fSdrahn #define  TxFIFOEnable		0x0001
42d9a5f17fSdrahn #define  TxFIFO128		0x0000
43d9a5f17fSdrahn #define TXTH		0x0110
44d9a5f17fSdrahn #define RXFIFOCSR	0x0120
45d9a5f17fSdrahn #define  RxFIFOEnable		TxFIFOEnable
46d9a5f17fSdrahn #define  RxFIFO128		TxFIFO128
47d9a5f17fSdrahn #define MEMADD		0x0130
48d9a5f17fSdrahn #define MEMDATAHI	0x0140
49d9a5f17fSdrahn #define MEMDATALO	0x0150
50d9a5f17fSdrahn #define XCVRIF		0x0160
51d9a5f17fSdrahn #define  COLActiveLow		0x0002
52d9a5f17fSdrahn #define  SerialMode		0x0004
53d9a5f17fSdrahn #define  ClkBit			0x0008
54d9a5f17fSdrahn #define CHIPID		0x0170
55d9a5f17fSdrahn #define MIFCSR		0x0180
56408231c3Sdrahn #define  MIFDC			0x0001	/* MII clock */
57408231c3Sdrahn #define  MIFDO			0x0002	/* MII data out */
58408231c3Sdrahn #define  MIFDIR			0x0004	/* MII direction (1: write) */
59408231c3Sdrahn #define  MIFDI			0x0008	/* MII data in */
60d9a5f17fSdrahn #define SROMCSR		0x0190
61d9a5f17fSdrahn #define TXPNTR		0x01A0
62d9a5f17fSdrahn #define RXPNTR		0x01B0
63d9a5f17fSdrahn #define STATUS		0x0200
64d9a5f17fSdrahn #define INTDISABLE	0x0210
65d9a5f17fSdrahn #define  IntFrameReceived	0x0001
66d9a5f17fSdrahn #define  IntRxFrameCntExp	0x0002
67d9a5f17fSdrahn #define  IntRxAlignCntExp	0x0004
68d9a5f17fSdrahn #define  IntRxCRCCntExp		0x0008
69d9a5f17fSdrahn #define  IntRxLenCntExp		0x0010
70d9a5f17fSdrahn #define  IntRxOverFlow		0x0020
71d9a5f17fSdrahn #define  IntRxCodeViolation	0x0040
72d9a5f17fSdrahn #define  IntSQETestError	0x0080
73d9a5f17fSdrahn #define  IntFrameSent		0x0100
74d9a5f17fSdrahn #define  IntTxUnderrun		0x0200
75d9a5f17fSdrahn #define  IntTxMaxSizeError	0x0400
76d9a5f17fSdrahn #define  IntTxNormalCollExp	0x0800
77d9a5f17fSdrahn #define  IntTxExcessCollExp	0x1000
78d9a5f17fSdrahn #define  IntTxLateCollExp	0x2000
79d9a5f17fSdrahn #define  IntTxNetworkCollExp	0x4000
80d9a5f17fSdrahn #define  IntTxDeferTimerExp	0x8000
81d9a5f17fSdrahn #define  NormalIntEvents	~(IntFrameSent)
82d9a5f17fSdrahn #define  NoEventsMask		0xFFFF
83d9a5f17fSdrahn 
84d9a5f17fSdrahn #define TxNeverGiveUp	0x0400
85d9a5f17fSdrahn #define TXRST		0x0420
86d9a5f17fSdrahn #define  TxResetBit		0x0001
87d9a5f17fSdrahn #define TXCFG		0x0430
88d9a5f17fSdrahn #define  TxMACEnable		0x0001
89d9a5f17fSdrahn #define  TxThreshold		0x0004
90408231c3Sdrahn #define  TxFullDuplex		0x0200
91d9a5f17fSdrahn #define IPG1		0x0440
92d9a5f17fSdrahn #define IPG2		0x0450
93d9a5f17fSdrahn #define ALIMIT		0x0460
94d9a5f17fSdrahn #define SLOT		0x0470
95d9a5f17fSdrahn #define PALEN		0x0480
96d9a5f17fSdrahn #define PAPAT		0x0490
97d9a5f17fSdrahn #define TXSFD		0x04A0
98d9a5f17fSdrahn #define JAM		0x04B0
99d9a5f17fSdrahn #define TXMAX		0x04C0
100d9a5f17fSdrahn #define TXMIN		0x04D0
101d9a5f17fSdrahn #define PAREG		0x04E0
102d9a5f17fSdrahn #define DCNT		0x04F0
103d9a5f17fSdrahn #define NCCNT		0x0500
104d9a5f17fSdrahn #define NTCNT		0x0510
105d9a5f17fSdrahn #define EXCNT		0x0520
106d9a5f17fSdrahn #define LTCNT		0x0530
107d9a5f17fSdrahn #define RSEED		0x0540
108d9a5f17fSdrahn #define TXSM		0x0550
109d9a5f17fSdrahn #define RXRST		0x0620
110d9a5f17fSdrahn #define  RxResetValue		0x0000
111d9a5f17fSdrahn #define RXCFG		0x0630
112d9a5f17fSdrahn #define  RxMACEnable		0x0001
113d9a5f17fSdrahn #define  ReservedValue		0x0004
114d9a5f17fSdrahn #define  RxPromiscEnable	0x0040
115d9a5f17fSdrahn #define  RxCRCEnable		0x0100
116d9a5f17fSdrahn #define  RxRejectOwnPackets	0x0200
117d9a5f17fSdrahn #define  RxHashFilterEnable	0x0800
118d9a5f17fSdrahn #define  RxAddrFilterEnable	0x1000
119d9a5f17fSdrahn #define RXMAX		0x0640
120d9a5f17fSdrahn #define RXMIN		0x0650
121d9a5f17fSdrahn #define MADD2		0x0660
122d9a5f17fSdrahn #define MADD1		0x0670
123d9a5f17fSdrahn #define MADD0		0x0680
124d9a5f17fSdrahn #define FRCNT		0x0690
125d9a5f17fSdrahn #define LECNT		0x06A0
126d9a5f17fSdrahn #define AECNT		0x06B0
127d9a5f17fSdrahn #define FECNT		0x06C0
128d9a5f17fSdrahn #define RXSM		0x06D0
129d9a5f17fSdrahn #define RXCV		0x06E0
130d9a5f17fSdrahn #define HASH3		0x0700
131d9a5f17fSdrahn #define HASH2		0x0710
132d9a5f17fSdrahn #define HASH1		0x0720
133d9a5f17fSdrahn #define HASH0		0x0730
134d9a5f17fSdrahn #define AFR2		0x0740
135d9a5f17fSdrahn #define AFR1		0x0750
136d9a5f17fSdrahn #define AFR0		0x0760
137d9a5f17fSdrahn #define AFCR		0x0770
138d9a5f17fSdrahn #define  EnableAllCompares	0x0fff
139d9a5f17fSdrahn 
140d9a5f17fSdrahn /* -------------------------------------------------------------------- */
141d9a5f17fSdrahn /*	Misc. Bit definitions for BMac Status word			*/
142d9a5f17fSdrahn /* -------------------------------------------------------------------- */
143d9a5f17fSdrahn #define RxAbortBit	0x8000	/* status bit in BMac status for rx packets */
144d9a5f17fSdrahn #define RxLengthMask	0x3FFF	/* bits that determine length of rx packets */
145