1 /* $OpenBSD: zs.c,v 1.24 2015/05/07 02:17:16 jsg Exp $ */ 2 /* $NetBSD: zs.c,v 1.17 2001/06/19 13:42:15 wiz Exp $ */ 3 4 /* 5 * Copyright (c) 1996, 1998 Bill Studenmund 6 * Copyright (c) 1995 Gordon W. Ross 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 4. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Gordon Ross 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 /* 36 * Zilog Z8530 Dual UART driver (machine-dependent part) 37 * 38 * Runs two serial lines per chip using slave drivers. 39 * Plain tty/async lines use the zstty slave. 40 * Sun keyboard/mouse uses the zskbd/zsms slaves. 41 * Other ports use their own mice & keyboard slaves. 42 * 43 * Credits & history: 44 * 45 * With NetBSD 1.1, port-mac68k started using a port of the port-sparc 46 * (port-sun3?) zs.c driver (which was in turn based on code in the 47 * Berkeley 4.4 Lite release). Bill Studenmund did the port, with 48 * help from Allen Briggs and Gordon Ross <gwr@netbsd.org>. Noud de 49 * Brouwer field-tested the driver at a local ISP. 50 * 51 * Bill Studenmund and Gordon Ross then ported the machine-independent 52 * z8530 driver to work with port-mac68k. NetBSD 1.2 contained an 53 * intermediate version (mac68k using a local, patched version of 54 * the m.i. drivers), with NetBSD 1.3 containing a full version. 55 */ 56 57 #include <sys/param.h> 58 #include <sys/systm.h> 59 #include <sys/proc.h> 60 #include <sys/device.h> 61 #include <sys/conf.h> 62 #include <sys/file.h> 63 #include <sys/ioctl.h> 64 #include <sys/tty.h> 65 #include <sys/time.h> 66 #include <sys/kernel.h> 67 #include <sys/syslog.h> 68 69 #include <dev/cons.h> 70 #include <dev/ofw/openfirm.h> 71 #include <dev/ic/z8530reg.h> 72 73 #include <machine/z8530var.h> 74 #include <machine/autoconf.h> 75 #include <machine/cpu.h> 76 77 #include "zsc.h" /* get the # of zs chips defined */ 78 79 /* 80 * Some warts needed by z8530tty.c - 81 */ 82 int zs_def_cflag = (CREAD | CS8 | HUPCL); 83 int zs_major = 7; 84 85 struct zsdevice { 86 /* Yes, they are backwards. */ 87 struct zschan zs_chan_b; 88 struct zschan zs_chan_a; 89 }; 90 91 /* Flags from cninit() */ 92 static int zs_hwflags[NZSC][2]; 93 /* Default speed for each channel */ 94 static int zs_defspeed[NZSC][2] = { 95 { 38400, /* tty00 */ 96 38400 }, /* tty01 */ 97 }; 98 99 /* console stuff */ 100 void *zs_conschan = 0; 101 #ifdef ZS_CONSOLE_ABORT 102 int zs_cons_canabort = 1; 103 #else 104 int zs_cons_canabort = 0; 105 #endif /* ZS_CONSOLE_ABORT*/ 106 107 /* device to which the console is attached--if serial. */ 108 /* Mac stuff */ 109 110 int zs_get_speed(struct zs_chanstate *); 111 112 /* 113 * Even though zsparam will set up the clock multiples, etc., we 114 * still set them here as: 1) mice & keyboards don't use zsparam, 115 * and 2) the console stuff uses these defaults before device 116 * attach. 117 */ 118 119 static u_char zs_init_reg[16] = { 120 0, /* 0: CMD (reset, etc.) */ 121 ZSWR1_RIE | ZSWR1_TIE | ZSWR1_SIE, /* 1: No interrupts yet. ??? */ 122 0, /* IVECT */ 123 ZSWR3_RX_8 | ZSWR3_RX_ENABLE, 124 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP, 125 ZSWR5_TX_8 | ZSWR5_TX_ENABLE, 126 0, /* 6: TXSYNC/SYNCLO */ 127 0, /* 7: RXSYNC/SYNCHI */ 128 0, /* 8: alias for data port */ 129 ZSWR9_MASTER_IE, 130 0, /*10: Misc. TX/RX control bits */ 131 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 132 ((PCLK/32)/38400)-2, /*12: BAUDLO (default=38400) */ 133 0, /*13: BAUDHI (default=38400) */ 134 ZSWR14_BAUD_ENA, 135 ZSWR15_BREAK_IE, 136 }; 137 138 /**************************************************************** 139 * Autoconfig 140 ****************************************************************/ 141 142 struct cfdriver zsc_cd = { 143 NULL, "zsc", DV_TTY 144 }; 145 146 /* Definition of the driver for autoconfig. */ 147 int zsc_match(struct device *, void *, void *); 148 void zsc_attach(struct device *, struct device *, void *); 149 int zsc_print(void *, const char *name); 150 151 /* Power management hooks */ 152 int zs_enable (struct zs_chanstate *); 153 void zs_disable (struct zs_chanstate *); 154 155 struct cfattach zsc_ca = { 156 sizeof(struct zsc_softc), zsc_match, zsc_attach 157 }; 158 159 int zshard(void *); 160 void zssoft(void *); 161 #ifdef ZS_TXDMA 162 int zs_txdma_int(void *); 163 #endif 164 165 /* 166 * Is the zs chip present? 167 */ 168 int 169 zsc_match(struct device *parent, void *match, void *aux) 170 { 171 struct confargs *ca = aux; 172 struct cfdata *cf = match; 173 174 if (strcmp(ca->ca_name, "escc") != 0) 175 return 0; 176 177 if (ca->ca_nreg < 8) 178 return 0; 179 180 if (cf->cf_unit > 1) 181 return 0; 182 183 return 1; 184 } 185 186 /* 187 * Attach a found zs. 188 * 189 * Match slave number to zs unit number, so that misconfiguration will 190 * not set up the keyboard as ttya, etc. 191 */ 192 void 193 zsc_attach(struct device *parent, struct device *self, void *aux) 194 { 195 struct zsc_softc *zsc = (void *)self; 196 struct confargs *ca = aux; 197 struct zsc_attach_args zsc_args; 198 volatile struct zschan *zc; 199 struct xzs_chanstate *xcs; 200 struct zs_chanstate *cs; 201 struct zsdevice *zsd; 202 int zsc_unit, channel; 203 int s; 204 int node, intr[3][3]; 205 u_int regs[16]; 206 207 zsc_unit = zsc->zsc_dev.dv_unit; 208 209 zsd = mapiodev(ca->ca_baseaddr + ca->ca_reg[0], ca->ca_reg[1]); 210 node = OF_child(ca->ca_node); /* ch-a */ 211 212 for (channel = 0; channel < 2; channel++) { 213 if (OF_getprop(node, "AAPL,interrupts", 214 intr[channel], sizeof(intr[0])) == -1 && 215 OF_getprop(node, "interrupts", 216 intr[channel], sizeof(intr[0])) == -1) { 217 printf(": cannot find interrupt property\n"); 218 return; 219 } 220 221 if (OF_getprop(node, "reg", regs, sizeof(regs)) < 24) { 222 printf(": cannot find reg property\n"); 223 return; 224 } 225 regs[2] += ca->ca_baseaddr; 226 regs[4] += ca->ca_baseaddr; 227 #ifdef ZS_TXDMA 228 zsc->zsc_txdmareg[channel] = mapiodev(regs[2], regs[3]); 229 zsc->zsc_txdmacmd[channel] = 230 dbdma_alloc(sizeof(dbdma_command_t) * 3); 231 memset(zsc->zsc_txdmacmd[channel], 0, 232 sizeof(dbdma_command_t) * 3); 233 dbdma_reset(zsc->zsc_txdmareg[channel]); 234 #endif 235 node = OF_peer(node); /* ch-b */ 236 } 237 238 printf(": irq %d,%d\n", intr[0][0], intr[1][0]); 239 240 /* 241 * Initialize software state for each channel. 242 */ 243 for (channel = 0; channel < 2; channel++) { 244 zsc_args.channel = channel; 245 zsc_args.hwflags = zs_hwflags[zsc_unit][channel]; 246 xcs = &zsc->xzsc_xcs_store[channel]; 247 cs = &xcs->xzs_cs; 248 zsc->zsc_cs[channel] = cs; 249 250 cs->cs_channel = channel; 251 cs->cs_private = NULL; 252 cs->cs_ops = &zsops_null; 253 254 zc = (channel == 0) ? &zsd->zs_chan_a : &zsd->zs_chan_b; 255 256 cs->cs_reg_csr = &zc->zc_csr; 257 cs->cs_reg_data = &zc->zc_data; 258 259 memcpy(cs->cs_creg, zs_init_reg, 16); 260 memcpy(cs->cs_preg, zs_init_reg, 16); 261 262 /* Current BAUD rate generator clock. */ 263 /* RTxC is 230400*16, so use 230400 */ 264 cs->cs_brg_clk = PCLK / 16; 265 if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) 266 cs->cs_defspeed = zs_get_speed(cs); 267 else 268 cs->cs_defspeed = 269 zs_defspeed[zsc_unit][channel]; 270 cs->cs_defcflag = zs_def_cflag; 271 272 /* Make these correspond to cs_defcflag (-crtscts) */ 273 cs->cs_rr0_dcd = ZSRR0_DCD; 274 cs->cs_rr0_cts = 0; 275 cs->cs_wr5_dtr = ZSWR5_DTR; 276 cs->cs_wr5_rts = 0; 277 278 #ifdef __notyet__ 279 cs->cs_slave_type = ZS_SLAVE_NONE; 280 #endif 281 282 /* Define BAUD rate stuff. */ 283 xcs->cs_clocks[0].clk = PCLK; 284 xcs->cs_clocks[0].flags = ZSC_RTXBRG | ZSC_RTXDIV; 285 xcs->cs_clocks[1].flags = 286 ZSC_RTXBRG | ZSC_RTXDIV | ZSC_VARIABLE | ZSC_EXTERN; 287 xcs->cs_clocks[2].flags = ZSC_TRXDIV | ZSC_VARIABLE; 288 xcs->cs_clock_count = 3; 289 if (channel == 0) { 290 /*xcs->cs_clocks[1].clk = mac68k_machine.modem_dcd_clk;*/ 291 /*xcs->cs_clocks[2].clk = mac68k_machine.modem_cts_clk;*/ 292 xcs->cs_clocks[1].clk = 0; 293 xcs->cs_clocks[2].clk = 0; 294 } else { 295 xcs->cs_clocks[1].flags = ZSC_VARIABLE; 296 /* 297 * Yes, we aren't defining ANY clock source enables for the 298 * printer's DCD clock in. The hardware won't let us 299 * use it. But a clock will freak out the chip, so we 300 * let you set it, telling us to bar interrupts on the line. 301 */ 302 /*xcs->cs_clocks[1].clk = mac68k_machine.print_dcd_clk;*/ 303 /*xcs->cs_clocks[2].clk = mac68k_machine.print_cts_clk;*/ 304 xcs->cs_clocks[1].clk = 0; 305 xcs->cs_clocks[2].clk = 0; 306 } 307 if (xcs->cs_clocks[1].clk) 308 zsc_args.hwflags |= ZS_HWFLAG_NO_DCD; 309 if (xcs->cs_clocks[2].clk) 310 zsc_args.hwflags |= ZS_HWFLAG_NO_CTS; 311 312 /* Set defaults in our "extended" chanstate. */ 313 xcs->cs_csource = 0; 314 xcs->cs_psource = 0; 315 xcs->cs_cclk_flag = 0; /* Nothing fancy by default */ 316 xcs->cs_pclk_flag = 0; 317 318 /* 319 * We used to disable chip interrupts here, but we now 320 * do that in zscnprobe, just in case MacOS left the chip on. 321 */ 322 323 xcs->cs_chip = 0; 324 325 /* Stash away a copy of the final H/W flags. */ 326 xcs->cs_hwflags = zsc_args.hwflags; 327 328 /* 329 * Look for a child driver for this channel. 330 * The child attach will setup the hardware. 331 */ 332 if (!config_found(self, (void *)&zsc_args, zsc_print)) { 333 /* No sub-driver. Just reset it. */ 334 u_char reset = (channel == 0) ? 335 ZSWR9_A_RESET : ZSWR9_B_RESET; 336 s = splzs(); 337 zs_write_reg(cs, 9, reset); 338 splx(s); 339 } 340 } 341 342 /* XXX - Now safe to install interrupt handlers. */ 343 mac_intr_establish(parent, intr[0][0], IST_LEVEL, IPL_TTY, 344 zshard, NULL, "zs0"); 345 mac_intr_establish(parent, intr[1][0], IST_LEVEL, IPL_TTY, 346 zshard, NULL, "zs1"); 347 #ifdef ZS_TXDMA 348 mac_intr_establish(parent, intr[0][1], IST_LEVEL, IPL_TTY, 349 zs_txdma_int, (void *)0, "zsdma0"); 350 mac_intr_establish(parent, intr[1][1], IST_LEVEL, IPL_TTY, 351 zs_txdma_int, (void *)1, "zsdma1"); 352 #endif 353 zsc->zsc_softintr = softintr_establish(IPL_SOFTTTY, zssoft, zsc); 354 if (zsc->zsc_softintr == NULL) 355 panic("zsattach: could not establish soft interrupt"); 356 357 /* 358 * Set the master interrupt enable and interrupt vector. 359 * (common to both channels, do it on A) 360 */ 361 cs = zsc->zsc_cs[0]; 362 s = splzs(); 363 /* interrupt vector */ 364 zs_write_reg(cs, 2, zs_init_reg[2]); 365 /* master interrupt control (enable) */ 366 zs_write_reg(cs, 9, zs_init_reg[9]); 367 splx(s); 368 369 /* connect power management for port 0 */ 370 cs->enable = zs_enable; 371 cs->disable = zs_disable; 372 } 373 374 int 375 zsc_print(void *aux, const char *name) 376 { 377 struct zsc_attach_args *args = aux; 378 379 if (name != NULL) 380 printf("%s: ", name); 381 382 if (args->channel != -1) 383 printf(" channel %d", args->channel); 384 385 return UNCONF; 386 } 387 388 int 389 zsmdioctl(struct zs_chanstate *cs, u_long cmd, caddr_t data) 390 { 391 switch (cmd) { 392 default: 393 return (-1); 394 } 395 return (0); 396 } 397 398 void 399 zsmd_setclock(struct zs_chanstate *cs) 400 { 401 #ifdef NOTYET 402 struct xzs_chanstate *xcs = (void *)cs; 403 404 if (cs->cs_channel != 0) 405 return; 406 407 /* 408 * If the new clock has the external bit set, then select the 409 * external source. 410 */ 411 via_set_modem((xcs->cs_pclk_flag & ZSC_EXTERN) ? 1 : 0); 412 #endif 413 } 414 415 static int zssoftpending; 416 417 /* 418 * Our ZS chips all share a common, autovectored interrupt, 419 * so we have to look at all of them on each interrupt. 420 */ 421 int 422 zshard(void *arg) 423 { 424 struct zsc_softc *zsc; 425 int unit, rval; 426 427 rval = 0; 428 for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) { 429 zsc = zsc_cd.cd_devs[unit]; 430 if (zsc == NULL) 431 continue; 432 rval |= zsc_intr_hard(zsc); 433 if (zsc->zsc_cs[0]->cs_softreq) 434 { 435 /* zsc_req_softint(zsc); */ 436 /* We are at splzs here, so no need to lock. */ 437 if (zssoftpending == 0) { 438 zssoftpending = 1; 439 softintr_schedule(zsc->zsc_softintr); 440 } 441 } 442 } 443 return (rval); 444 } 445 446 /* 447 * Similar scheme as for zshard (look at all of them) 448 */ 449 void 450 zssoft(arg) 451 void *arg; 452 { 453 struct zsc_softc *zsc; 454 int unit; 455 456 /* This is not the only ISR on this IPL. */ 457 if (zssoftpending == 0) 458 return; 459 460 /* 461 * The soft intr. bit will be set by zshard only if 462 * the variable zssoftpending is zero. 463 */ 464 zssoftpending = 0; 465 466 for (unit = 0; unit < zsc_cd.cd_ndevs; ++unit) { 467 zsc = zsc_cd.cd_devs[unit]; 468 if (zsc == NULL) 469 continue; 470 (void) zsc_intr_soft(zsc); 471 } 472 } 473 474 #ifdef ZS_TXDMA 475 int 476 zs_txdma_int(arg) 477 void *arg; 478 { 479 int ch = (int)arg; 480 struct zsc_softc *zsc; 481 struct zs_chanstate *cs; 482 int unit = 0; /* XXX */ 483 extern int zstty_txdma_int(); 484 485 zsc = zsc_cd.cd_devs[unit]; 486 if (zsc == NULL) 487 panic("zs_txdma_int"); 488 489 cs = zsc->zsc_cs[ch]; 490 zstty_txdma_int(cs); 491 492 if (cs->cs_softreq) { 493 if (zssoftpending == 0) { 494 zssoftpending = 1; 495 softintr_schedule(zsc->zsc_softintr); 496 } 497 } 498 return 1; 499 } 500 501 void 502 zs_dma_setup(cs, pa, len) 503 struct zs_chanstate *cs; 504 caddr_t pa; 505 int len; 506 { 507 struct zsc_softc *zsc; 508 dbdma_command_t *cmdp; 509 int ch = cs->cs_channel; 510 511 zsc = zsc_cd.cd_devs[ch]; 512 cmdp = zsc->zsc_txdmacmd[ch]; 513 514 DBDMA_BUILD(cmdp, DBDMA_CMD_OUT_LAST, 0, len, kvtop(pa), 515 DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 516 cmdp++; 517 DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0, 518 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 519 520 __asm volatile("eieio"); 521 522 dbdma_start(zsc->zsc_txdmareg[ch], zsc->zsc_txdmacmd[ch]); 523 } 524 #endif 525 526 /* 527 * Compute the current baud rate given a ZS channel. 528 * XXX Assume internal BRG. 529 */ 530 int 531 zs_get_speed(cs) 532 struct zs_chanstate *cs; 533 { 534 int tconst; 535 536 tconst = zs_read_reg(cs, 12); 537 tconst |= zs_read_reg(cs, 13) << 8; 538 return TCONST_TO_BPS(cs->cs_brg_clk, tconst); 539 } 540 541 #ifndef ZS_TOLERANCE 542 #define ZS_TOLERANCE 51 543 /* 5% in tenths of a %, plus 1 so that exactly 5% will be ok. */ 544 #endif 545 546 /* 547 * Search through the signal sources in the channel, and 548 * pick the best one for the baud rate requested. Return 549 * a -1 if not achievable in tolerance. Otherwise return 0 550 * and fill in the values. 551 * 552 * This routine draws inspiration from the Atari port's zs.c 553 * driver in NetBSD 1.1 which did the same type of source switching. 554 * Tolerance code inspired by comspeed routine in isa/com.c. 555 * 556 * By Bill Studenmund, 1996-05-12 557 */ 558 int 559 zs_set_speed(cs, bps) 560 struct zs_chanstate *cs; 561 int bps; /* bits per second */ 562 { 563 struct xzs_chanstate *xcs = (void *)cs; 564 int i, tc, tc0 = 0, tc1, s, sf = 0; 565 int src, rate0, rate1, err, tol; 566 567 if (bps == 0) 568 return (0); 569 570 src = -1; /* no valid source yet */ 571 tol = ZS_TOLERANCE; 572 573 /* 574 * Step through all the sources and see which one matches 575 * the best. A source has to match BETTER than tol to be chosen. 576 * Thus if two sources give the same error, the first one will be 577 * chosen. Also, allow for the possability that one source might run 578 * both the BRG and the direct divider (i.e. RTxC). 579 */ 580 for (i = 0; i < xcs->cs_clock_count; i++) { 581 if (xcs->cs_clocks[i].clk <= 0) 582 continue; /* skip non-existent or bad clocks */ 583 if (xcs->cs_clocks[i].flags & ZSC_BRG) { 584 /* check out BRG at /16 */ 585 tc1 = BPS_TO_TCONST(xcs->cs_clocks[i].clk >> 4, bps); 586 if (tc1 >= 0) { 587 rate1 = TCONST_TO_BPS(xcs->cs_clocks[i].clk >> 4, tc1); 588 err = abs(((rate1 - bps)*1000)/bps); 589 if (err < tol) { 590 tol = err; 591 src = i; 592 sf = xcs->cs_clocks[i].flags & ~ZSC_DIV; 593 tc0 = tc1; 594 rate0 = rate1; 595 } 596 } 597 } 598 if (xcs->cs_clocks[i].flags & ZSC_DIV) { 599 /* 600 * Check out either /1, /16, /32, or /64 601 * Note: for /1, you'd better be using a synchronized 602 * clock! 603 */ 604 int b0 = xcs->cs_clocks[i].clk, e0 = abs(b0-bps); 605 int b1 = b0 >> 4, e1 = abs(b1-bps); 606 int b2 = b1 >> 1, e2 = abs(b2-bps); 607 int b3 = b2 >> 1, e3 = abs(b3-bps); 608 609 if (e0 < e1 && e0 < e2 && e0 < e3) { 610 err = e0; 611 rate1 = b0; 612 tc1 = ZSWR4_CLK_X1; 613 } else if (e0 > e1 && e1 < e2 && e1 < e3) { 614 err = e1; 615 rate1 = b1; 616 tc1 = ZSWR4_CLK_X16; 617 } else if (e0 > e2 && e1 > e2 && e2 < e3) { 618 err = e2; 619 rate1 = b2; 620 tc1 = ZSWR4_CLK_X32; 621 } else { 622 err = e3; 623 rate1 = b3; 624 tc1 = ZSWR4_CLK_X64; 625 } 626 627 err = (err * 1000)/bps; 628 if (err < tol) { 629 tol = err; 630 src = i; 631 sf = xcs->cs_clocks[i].flags & ~ZSC_BRG; 632 tc0 = tc1; 633 rate0 = rate1; 634 } 635 } 636 } 637 #ifdef ZSMACDEBUG 638 printf("Checking for rate %d. Found source #%d.\n",bps, src); 639 #endif 640 if (src == -1) 641 return (EINVAL); /* no can do */ 642 643 /* 644 * The M.I. layer likes to keep cs_brg_clk current, even though 645 * we are the only ones who should be touching the BRG's rate. 646 * 647 * Note: we are assuming that any ZSC_EXTERN signal source comes in 648 * on the RTxC pin. Correct for the mac68k obio zsc. 649 */ 650 if (sf & ZSC_EXTERN) 651 cs->cs_brg_clk = xcs->cs_clocks[i].clk >> 4; 652 else 653 cs->cs_brg_clk = PCLK / 16; 654 655 /* 656 * Now we have a source, so set it up. 657 */ 658 s = splzs(); 659 xcs->cs_psource = src; 660 xcs->cs_pclk_flag = sf; 661 bps = rate0; 662 if (sf & ZSC_BRG) { 663 cs->cs_preg[4] = ZSWR4_CLK_X16; 664 cs->cs_preg[11]= ZSWR11_RXCLK_BAUD | ZSWR11_TXCLK_BAUD; 665 if (sf & ZSC_PCLK) { 666 cs->cs_preg[14] = ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK; 667 } else { 668 cs->cs_preg[14] = ZSWR14_BAUD_ENA; 669 } 670 tc = tc0; 671 } else { 672 cs->cs_preg[4] = tc0; 673 if (sf & ZSC_RTXDIV) { 674 cs->cs_preg[11] = ZSWR11_RXCLK_RTXC | ZSWR11_TXCLK_RTXC; 675 } else { 676 cs->cs_preg[11] = ZSWR11_RXCLK_TRXC | ZSWR11_TXCLK_TRXC; 677 } 678 cs->cs_preg[14]= 0; 679 tc = 0xffff; 680 } 681 /* Set the BAUD rate divisor. */ 682 cs->cs_preg[12] = tc; 683 cs->cs_preg[13] = tc >> 8; 684 splx(s); 685 686 #ifdef ZSMACDEBUG 687 printf("Rate is %7d, tc is %7d, source no. %2d, flags %4x\n", \ 688 bps, tc, src, sf); 689 printf("Registers are: 4 %x, 11 %x, 14 %x\n\n", 690 cs->cs_preg[4], cs->cs_preg[11], cs->cs_preg[14]); 691 #endif 692 693 cs->cs_preg[5] |= ZSWR5_RTS; /* Make sure the drivers are on! */ 694 695 /* Caller will stuff the pending registers. */ 696 return (0); 697 } 698 699 int 700 zs_set_modes(cs, cflag) 701 struct zs_chanstate *cs; 702 int cflag; 703 { 704 struct xzs_chanstate *xcs = (void*)cs; 705 int s; 706 707 /* 708 * Make sure we don't enable hfc on a signal line we're ignoring. 709 * As we enable CTS interrupts only if we have CRTSCTS or CDTRCTS, 710 * this code also effectivly turns off ZSWR15_CTS_IE. 711 * 712 * Also, disable DCD interrupts if we've been told to ignore 713 * the DCD pin. Happens on mac68k because the input line for 714 * DCD can also be used as a clock input. (Just set CLOCAL.) 715 * 716 * If someone tries to turn an invalid flow mode on, Just Say No 717 * (Suggested by gwr) 718 */ 719 if (xcs->cs_hwflags & ZS_HWFLAG_NO_DCD) { 720 if (cflag & MDMBUF) 721 return (EINVAL); 722 cflag |= CLOCAL; 723 } 724 #if 0 725 if ((xcs->cs_hwflags & ZS_HWFLAG_NO_CTS) && (cflag & CRTSCTS)) 726 return (EINVAL); 727 #endif 728 729 /* 730 * Output hardware flow control on the chip is horrendous: 731 * if carrier detect drops, the receiver is disabled, and if 732 * CTS drops, the transmitter is stopped IN MID CHARACTER! 733 * Therefore, NEVER set the HFC bit, and instead use the 734 * status interrupt to detect CTS changes. 735 */ 736 s = splzs(); 737 if ((cflag & (CLOCAL | MDMBUF)) != 0) 738 cs->cs_rr0_dcd = 0; 739 else 740 cs->cs_rr0_dcd = ZSRR0_DCD; 741 /* 742 * The mac hardware only has one output, DTR (HSKo in Mac 743 * parlance). In HFC mode, we use it for the functions 744 * typically served by RTS and DTR on other ports, so we 745 * have to fake the upper layer out some. 746 * 747 * CRTSCTS we use CTS as an input which tells us when to shut up. 748 * We make no effort to shut up the other side of the connection. 749 * DTR is used to hang up the modem. 750 * 751 * In CDTRCTS, we use CTS to tell us to stop, but we use DTR to 752 * shut up the other side. 753 */ 754 if ((cflag & CRTSCTS) != 0) { 755 cs->cs_wr5_dtr = ZSWR5_DTR; 756 cs->cs_wr5_rts = 0; 757 cs->cs_rr0_cts = ZSRR0_CTS; 758 #if 0 759 } else if ((cflag & CDTRCTS) != 0) { 760 cs->cs_wr5_dtr = 0; 761 cs->cs_wr5_rts = ZSWR5_DTR; 762 cs->cs_rr0_cts = ZSRR0_CTS; 763 #endif 764 } else if ((cflag & MDMBUF) != 0) { 765 cs->cs_wr5_dtr = 0; 766 cs->cs_wr5_rts = ZSWR5_DTR; 767 cs->cs_rr0_cts = ZSRR0_DCD; 768 } else { 769 cs->cs_wr5_dtr = ZSWR5_DTR; 770 cs->cs_wr5_rts = 0; 771 cs->cs_rr0_cts = 0; 772 } 773 splx(s); 774 775 /* Caller will stuff the pending registers. */ 776 return (0); 777 } 778 779 780 /* 781 * Read or write the chip with suitable delays. 782 * MacII hardware has the delay built in. 783 * No need for extra delay. :-) However, some clock-chirped 784 * macs, or zsc's on serial add-on boards might need it. 785 */ 786 #define ZS_DELAY() 787 788 u_char 789 zs_read_reg(cs, reg) 790 struct zs_chanstate *cs; 791 u_char reg; 792 { 793 u_char val; 794 795 out8(cs->cs_reg_csr, reg); 796 ZS_DELAY(); 797 val = in8(cs->cs_reg_csr); 798 ZS_DELAY(); 799 return val; 800 } 801 802 void 803 zs_write_reg(cs, reg, val) 804 struct zs_chanstate *cs; 805 u_char reg, val; 806 { 807 out8(cs->cs_reg_csr, reg); 808 ZS_DELAY(); 809 out8(cs->cs_reg_csr, val); 810 ZS_DELAY(); 811 } 812 813 u_char 814 zs_read_csr(cs) 815 struct zs_chanstate *cs; 816 { 817 u_char val; 818 819 val = in8(cs->cs_reg_csr); 820 ZS_DELAY(); 821 /* make up for the fact CTS is wired backwards */ 822 val ^= ZSRR0_CTS; 823 return val; 824 } 825 826 void 827 zs_write_csr(cs, val) 828 struct zs_chanstate *cs; 829 u_char val; 830 { 831 /* Note, the csr does not write CTS... */ 832 out8(cs->cs_reg_csr, val); 833 ZS_DELAY(); 834 } 835 836 u_char 837 zs_read_data(cs) 838 struct zs_chanstate *cs; 839 { 840 u_char val; 841 842 val = in8(cs->cs_reg_data); 843 ZS_DELAY(); 844 return val; 845 } 846 847 void 848 zs_write_data(cs, val) 849 struct zs_chanstate *cs; 850 u_char val; 851 { 852 out8(cs->cs_reg_data, val); 853 ZS_DELAY(); 854 } 855 856 /* 857 * Power management hooks for zsopen() and zsclose(). 858 * We use them to power on/off the ports, if necessary. 859 * This should be modified to turn on/off modem in PBG4, etc. 860 */ 861 void macobio_modem_power(int enable); 862 863 int 864 zs_enable(cs) 865 struct zs_chanstate *cs; 866 { 867 macobio_modem_power(1); /* Whee */ 868 cs->enabled = 1; 869 return(0); 870 } 871 872 void 873 zs_disable(cs) 874 struct zs_chanstate *cs; 875 { 876 macobio_modem_power(0); /* Whee */ 877 cs->enabled = 0; 878 } 879 880 881 /**************************************************************** 882 * Console support functions (powermac specific!) 883 * Note: this code is allowed to know about the layout of 884 * the chip registers, and uses that to keep things simple. 885 * XXX - I think I like the mvme167 code better. -gwr 886 * XXX - Well :-P :-) -wrs 887 ****************************************************************/ 888 889 cons_decl(zs); 890 891 void zs_putc(volatile struct zschan *, int); 892 int zs_getc(volatile struct zschan *); 893 extern int zsopen( dev_t dev, int flags, int mode, struct proc *p); 894 895 static int stdin, stdout; 896 897 /* 898 * Console functions. 899 */ 900 901 /* 902 * zscnprobe is the routine which gets called as the kernel is trying to 903 * figure out where the console should be. Each io driver which might 904 * be the console (as defined in mac68k/conf.c) gets probed. The probe 905 * fills in the consdev structure. Important parts are the device #, 906 * and the console priority. Values are CN_DEAD (don't touch me), 907 * CN_LOWPRI (I'm here, but elsewhere might be better), CN_MIDPRI 908 * (the video, better than CN_LOWPRI), and CN_HIGHPRI (pick me!) 909 * 910 * As the mac's a bit different, we do extra work here. We mainly check 911 * to see if we have serial echo going on. Also chould check for default 912 * speeds. 913 */ 914 915 /* 916 * Polled input char. 917 */ 918 int 919 zs_getc(zc) 920 register volatile struct zschan *zc; 921 { 922 register int s, c, rr0; 923 924 s = splhigh(); 925 /* Wait for a character to arrive. */ 926 do { 927 rr0 = in8(&zc->zc_csr); 928 ZS_DELAY(); 929 } while ((rr0 & ZSRR0_RX_READY) == 0); 930 931 c = in8(&zc->zc_data); 932 ZS_DELAY(); 933 splx(s); 934 935 return (c); 936 } 937 938 /* 939 * Polled output char. 940 */ 941 void 942 zs_putc(zc, c) 943 register volatile struct zschan *zc; 944 int c; 945 { 946 register int s, rr0; 947 register long wait = 0; 948 949 s = splhigh(); 950 /* Wait for transmitter to become ready. */ 951 do { 952 rr0 = in8(&zc->zc_csr); 953 ZS_DELAY(); 954 } while (((rr0 & ZSRR0_TX_READY) == 0) && (wait++ < 1000000)); 955 956 if ((rr0 & ZSRR0_TX_READY) != 0) { 957 out8(&zc->zc_data, c); 958 ZS_DELAY(); 959 } 960 splx(s); 961 } 962 963 964 /* 965 * Polled console input putchar. 966 */ 967 int 968 zscngetc(dev) 969 dev_t dev; 970 { 971 register volatile struct zschan *zc = zs_conschan; 972 register int c; 973 974 if (zc) { 975 c = zs_getc(zc); 976 } else { 977 char ch = 0; 978 OF_read(stdin, &ch, 1); 979 c = ch; 980 } 981 return c; 982 } 983 984 /* 985 * Polled console output putchar. 986 */ 987 void 988 zscnputc(dev, c) 989 dev_t dev; 990 int c; 991 { 992 register volatile struct zschan *zc = zs_conschan; 993 994 if (zc) { 995 zs_putc(zc, c); 996 } else { 997 char ch = c; 998 OF_write(stdout, &ch, 1); 999 } 1000 } 1001 1002 void 1003 zscnprobe(cp) 1004 struct consdev *cp; 1005 { 1006 int chosen, pkg; 1007 int unit = 0; 1008 int maj; 1009 char name[16]; 1010 1011 if ((chosen = OF_finddevice("/chosen")) == -1) 1012 return; 1013 1014 if (OF_getprop(chosen, "stdin", &stdin, sizeof(stdin)) == -1) 1015 return; 1016 if (OF_getprop(chosen, "stdout", &stdout, sizeof(stdout)) == -1) 1017 return; 1018 1019 if ((pkg = OF_instance_to_package(stdin)) == -1) 1020 return; 1021 1022 bzero(name, sizeof(name)); 1023 if (OF_getprop(pkg, "device_type", name, sizeof(name)) == -1) 1024 return; 1025 1026 if (strcmp(name, "serial") != 0) 1027 return; 1028 1029 bzero(name, sizeof(name)); 1030 if (OF_getprop(pkg, "name", name, sizeof(name)) == -1) 1031 return; 1032 1033 if (strcmp(name, "ch-b") == 0) 1034 unit = 1; 1035 1036 /* locate the major number */ 1037 for (maj = 0; maj < nchrdev; maj++) 1038 if (cdevsw[maj].d_open == zsopen) 1039 break; 1040 1041 cp->cn_dev = makedev(maj, unit); 1042 cp->cn_pri = CN_HIGHPRI; 1043 } 1044 1045 1046 void 1047 zscninit(cp) 1048 struct consdev *cp; 1049 { 1050 int escc, escc_ch, obio; 1051 unsigned int zs_offset, zs_size; 1052 int ch = 0; 1053 u_int32_t reg[5]; 1054 char name[16]; 1055 1056 if ((escc_ch = OF_instance_to_package(stdin)) == -1) 1057 return; 1058 1059 bzero(name, sizeof(name)); 1060 if (OF_getprop(escc_ch, "name", name, sizeof(name)) == -1) 1061 return; 1062 1063 if (strcmp(name, "ch-b") == 0) 1064 ch = 1; 1065 1066 if (OF_getprop(escc_ch, "reg", reg, sizeof(reg)) < 8) 1067 return; 1068 zs_offset = reg[0]; 1069 zs_size = reg[1]; 1070 1071 escc = OF_parent(escc_ch); 1072 obio = OF_parent(escc); 1073 1074 if (OF_getprop(obio, "assigned-addresses", reg, sizeof(reg)) < 12) 1075 return; 1076 zs_conschan = mapiodev(reg[2] + zs_offset, zs_size); 1077 1078 zs_hwflags[0][ch] = ZS_HWFLAG_CONSOLE; 1079 } 1080 1081 void 1082 zs_abort(struct zs_chanstate *channel) 1083 { 1084 volatile struct zschan *zc = zs_conschan; 1085 int rr0; 1086 1087 /* Wait for end of break to avoid PROM abort. */ 1088 /* XXX - Limit the wait? */ 1089 do { 1090 rr0 = zc->zc_csr; 1091 ZS_DELAY(); 1092 } while (rr0 & ZSRR0_BREAK); 1093 1094 #if defined(DDB) 1095 { 1096 extern int db_active; 1097 1098 if (!db_active) 1099 Debugger(); 1100 } 1101 #endif 1102 } 1103 1104 /* copied from sparc - XXX? */ 1105 void 1106 zscnpollc(dev, on) 1107 dev_t dev; 1108 int on; 1109 { 1110 /* 1111 * Need to tell zs driver to acknowledge all interrupts or we get 1112 * annoying spurious interrupt messages. This is because mucking 1113 * with spl() levels during polling does not prevent interrupts from 1114 * being generated. 1115 */ 1116 1117 #if 0 1118 if (on) 1119 swallow_zsintrs++; 1120 else 1121 swallow_zsintrs--; 1122 #endif 1123 } 1124